efm32jg12b_pac/efm32jg12b500/adc0/
scanctrlx.rs

1#[doc = "Register `SCANCTRLX` reader"]
2pub struct R(crate::R<SCANCTRLX_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SCANCTRLX_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SCANCTRLX_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SCANCTRLX_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SCANCTRLX` writer"]
17pub struct W(crate::W<SCANCTRLX_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SCANCTRLX_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SCANCTRLX_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SCANCTRLX_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `VREFSEL` reader - Scan Channel Reference Selection"]
38pub type VREFSEL_R = crate::FieldReader<u8, VREFSEL_A>;
39#[doc = "Scan Channel Reference Selection\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum VREFSEL_A {
43    #[doc = "0: Internal 0.83V Bandgap reference"]
44    VBGR = 0,
45    #[doc = "1: Scaled AVDD: AVDD*(the VREF attenuation factor)"]
46    VDDXWATT = 1,
47    #[doc = "2: Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
48    VREFPWATT = 2,
49    #[doc = "3: Raw single ended external Vref: ADCn_EXTP"]
50    VREFP = 3,
51    #[doc = "5: Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
52    VREFPNWATT = 5,
53    #[doc = "6: Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
54    VREFPN = 6,
55    #[doc = "7: Internal Bandgap reference at low setting 0.78V"]
56    VBGRLOW = 7,
57}
58impl From<VREFSEL_A> for u8 {
59    #[inline(always)]
60    fn from(variant: VREFSEL_A) -> Self {
61        variant as _
62    }
63}
64impl VREFSEL_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<VREFSEL_A> {
68        match self.bits {
69            0 => Some(VREFSEL_A::VBGR),
70            1 => Some(VREFSEL_A::VDDXWATT),
71            2 => Some(VREFSEL_A::VREFPWATT),
72            3 => Some(VREFSEL_A::VREFP),
73            5 => Some(VREFSEL_A::VREFPNWATT),
74            6 => Some(VREFSEL_A::VREFPN),
75            7 => Some(VREFSEL_A::VBGRLOW),
76            _ => None,
77        }
78    }
79    #[doc = "Checks if the value of the field is `VBGR`"]
80    #[inline(always)]
81    pub fn is_vbgr(&self) -> bool {
82        *self == VREFSEL_A::VBGR
83    }
84    #[doc = "Checks if the value of the field is `VDDXWATT`"]
85    #[inline(always)]
86    pub fn is_vddxwatt(&self) -> bool {
87        *self == VREFSEL_A::VDDXWATT
88    }
89    #[doc = "Checks if the value of the field is `VREFPWATT`"]
90    #[inline(always)]
91    pub fn is_vrefpwatt(&self) -> bool {
92        *self == VREFSEL_A::VREFPWATT
93    }
94    #[doc = "Checks if the value of the field is `VREFP`"]
95    #[inline(always)]
96    pub fn is_vrefp(&self) -> bool {
97        *self == VREFSEL_A::VREFP
98    }
99    #[doc = "Checks if the value of the field is `VREFPNWATT`"]
100    #[inline(always)]
101    pub fn is_vrefpnwatt(&self) -> bool {
102        *self == VREFSEL_A::VREFPNWATT
103    }
104    #[doc = "Checks if the value of the field is `VREFPN`"]
105    #[inline(always)]
106    pub fn is_vrefpn(&self) -> bool {
107        *self == VREFSEL_A::VREFPN
108    }
109    #[doc = "Checks if the value of the field is `VBGRLOW`"]
110    #[inline(always)]
111    pub fn is_vbgrlow(&self) -> bool {
112        *self == VREFSEL_A::VBGRLOW
113    }
114}
115#[doc = "Field `VREFSEL` writer - Scan Channel Reference Selection"]
116pub type VREFSEL_W<'a, const O: u8> =
117    crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, VREFSEL_A, 3, O>;
118impl<'a, const O: u8> VREFSEL_W<'a, O> {
119    #[doc = "Internal 0.83V Bandgap reference"]
120    #[inline(always)]
121    pub fn vbgr(self) -> &'a mut W {
122        self.variant(VREFSEL_A::VBGR)
123    }
124    #[doc = "Scaled AVDD: AVDD*(the VREF attenuation factor)"]
125    #[inline(always)]
126    pub fn vddxwatt(self) -> &'a mut W {
127        self.variant(VREFSEL_A::VDDXWATT)
128    }
129    #[doc = "Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
130    #[inline(always)]
131    pub fn vrefpwatt(self) -> &'a mut W {
132        self.variant(VREFSEL_A::VREFPWATT)
133    }
134    #[doc = "Raw single ended external Vref: ADCn_EXTP"]
135    #[inline(always)]
136    pub fn vrefp(self) -> &'a mut W {
137        self.variant(VREFSEL_A::VREFP)
138    }
139    #[doc = "Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
140    #[inline(always)]
141    pub fn vrefpnwatt(self) -> &'a mut W {
142        self.variant(VREFSEL_A::VREFPNWATT)
143    }
144    #[doc = "Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
145    #[inline(always)]
146    pub fn vrefpn(self) -> &'a mut W {
147        self.variant(VREFSEL_A::VREFPN)
148    }
149    #[doc = "Internal Bandgap reference at low setting 0.78V"]
150    #[inline(always)]
151    pub fn vbgrlow(self) -> &'a mut W {
152        self.variant(VREFSEL_A::VBGRLOW)
153    }
154}
155#[doc = "Field `VREFATTFIX` reader - Enable Fixed Scaling on VREF"]
156pub type VREFATTFIX_R = crate::BitReader<bool>;
157#[doc = "Field `VREFATTFIX` writer - Enable Fixed Scaling on VREF"]
158pub type VREFATTFIX_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, O>;
159#[doc = "Field `VREFATT` reader - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
160pub type VREFATT_R = crate::FieldReader<u8, u8>;
161#[doc = "Field `VREFATT` writer - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
162pub type VREFATT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 4, O>;
163#[doc = "Field `VINATT` reader - Code for VIN Attenuation Factor"]
164pub type VINATT_R = crate::FieldReader<u8, u8>;
165#[doc = "Field `VINATT` writer - Code for VIN Attenuation Factor"]
166pub type VINATT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 4, O>;
167#[doc = "Field `DVL` reader - Scan DV Level Select"]
168pub type DVL_R = crate::FieldReader<u8, u8>;
169#[doc = "Field `DVL` writer - Scan DV Level Select"]
170pub type DVL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 2, O>;
171#[doc = "Field `FIFOOFACT` reader - Scan FIFO Overflow Action"]
172pub type FIFOOFACT_R = crate::BitReader<bool>;
173#[doc = "Field `FIFOOFACT` writer - Scan FIFO Overflow Action"]
174pub type FIFOOFACT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, O>;
175#[doc = "Field `PRSMODE` reader - Scan PRS Trigger Mode"]
176pub type PRSMODE_R = crate::BitReader<bool>;
177#[doc = "Field `PRSMODE` writer - Scan PRS Trigger Mode"]
178pub type PRSMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, O>;
179#[doc = "Field `PRSSEL` reader - Scan Sequence PRS Trigger Select"]
180pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
181#[doc = "Scan Sequence PRS Trigger Select\n\nValue on reset: 0"]
182#[derive(Clone, Copy, Debug, PartialEq, Eq)]
183#[repr(u8)]
184pub enum PRSSEL_A {
185    #[doc = "0: PRS ch 0 triggers scan sequence"]
186    PRSCH0 = 0,
187    #[doc = "1: PRS ch 1 triggers scan sequence"]
188    PRSCH1 = 1,
189    #[doc = "2: PRS ch 2 triggers scan sequence"]
190    PRSCH2 = 2,
191    #[doc = "3: PRS ch 3 triggers scan sequence"]
192    PRSCH3 = 3,
193    #[doc = "4: PRS ch 4 triggers scan sequence"]
194    PRSCH4 = 4,
195    #[doc = "5: PRS ch 5 triggers scan sequence"]
196    PRSCH5 = 5,
197    #[doc = "6: PRS ch 6 triggers scan sequence"]
198    PRSCH6 = 6,
199    #[doc = "7: PRS ch 7 triggers scan sequence"]
200    PRSCH7 = 7,
201    #[doc = "8: PRS ch 8 triggers scan sequence"]
202    PRSCH8 = 8,
203    #[doc = "9: PRS ch 9 triggers scan sequence"]
204    PRSCH9 = 9,
205    #[doc = "10: PRS ch 10 triggers scan sequence"]
206    PRSCH10 = 10,
207    #[doc = "11: PRS ch 11 triggers scan sequence"]
208    PRSCH11 = 11,
209}
210impl From<PRSSEL_A> for u8 {
211    #[inline(always)]
212    fn from(variant: PRSSEL_A) -> Self {
213        variant as _
214    }
215}
216impl PRSSEL_R {
217    #[doc = "Get enumerated values variant"]
218    #[inline(always)]
219    pub fn variant(&self) -> Option<PRSSEL_A> {
220        match self.bits {
221            0 => Some(PRSSEL_A::PRSCH0),
222            1 => Some(PRSSEL_A::PRSCH1),
223            2 => Some(PRSSEL_A::PRSCH2),
224            3 => Some(PRSSEL_A::PRSCH3),
225            4 => Some(PRSSEL_A::PRSCH4),
226            5 => Some(PRSSEL_A::PRSCH5),
227            6 => Some(PRSSEL_A::PRSCH6),
228            7 => Some(PRSSEL_A::PRSCH7),
229            8 => Some(PRSSEL_A::PRSCH8),
230            9 => Some(PRSSEL_A::PRSCH9),
231            10 => Some(PRSSEL_A::PRSCH10),
232            11 => Some(PRSSEL_A::PRSCH11),
233            _ => None,
234        }
235    }
236    #[doc = "Checks if the value of the field is `PRSCH0`"]
237    #[inline(always)]
238    pub fn is_prsch0(&self) -> bool {
239        *self == PRSSEL_A::PRSCH0
240    }
241    #[doc = "Checks if the value of the field is `PRSCH1`"]
242    #[inline(always)]
243    pub fn is_prsch1(&self) -> bool {
244        *self == PRSSEL_A::PRSCH1
245    }
246    #[doc = "Checks if the value of the field is `PRSCH2`"]
247    #[inline(always)]
248    pub fn is_prsch2(&self) -> bool {
249        *self == PRSSEL_A::PRSCH2
250    }
251    #[doc = "Checks if the value of the field is `PRSCH3`"]
252    #[inline(always)]
253    pub fn is_prsch3(&self) -> bool {
254        *self == PRSSEL_A::PRSCH3
255    }
256    #[doc = "Checks if the value of the field is `PRSCH4`"]
257    #[inline(always)]
258    pub fn is_prsch4(&self) -> bool {
259        *self == PRSSEL_A::PRSCH4
260    }
261    #[doc = "Checks if the value of the field is `PRSCH5`"]
262    #[inline(always)]
263    pub fn is_prsch5(&self) -> bool {
264        *self == PRSSEL_A::PRSCH5
265    }
266    #[doc = "Checks if the value of the field is `PRSCH6`"]
267    #[inline(always)]
268    pub fn is_prsch6(&self) -> bool {
269        *self == PRSSEL_A::PRSCH6
270    }
271    #[doc = "Checks if the value of the field is `PRSCH7`"]
272    #[inline(always)]
273    pub fn is_prsch7(&self) -> bool {
274        *self == PRSSEL_A::PRSCH7
275    }
276    #[doc = "Checks if the value of the field is `PRSCH8`"]
277    #[inline(always)]
278    pub fn is_prsch8(&self) -> bool {
279        *self == PRSSEL_A::PRSCH8
280    }
281    #[doc = "Checks if the value of the field is `PRSCH9`"]
282    #[inline(always)]
283    pub fn is_prsch9(&self) -> bool {
284        *self == PRSSEL_A::PRSCH9
285    }
286    #[doc = "Checks if the value of the field is `PRSCH10`"]
287    #[inline(always)]
288    pub fn is_prsch10(&self) -> bool {
289        *self == PRSSEL_A::PRSCH10
290    }
291    #[doc = "Checks if the value of the field is `PRSCH11`"]
292    #[inline(always)]
293    pub fn is_prsch11(&self) -> bool {
294        *self == PRSSEL_A::PRSCH11
295    }
296}
297#[doc = "Field `PRSSEL` writer - Scan Sequence PRS Trigger Select"]
298pub type PRSSEL_W<'a, const O: u8> =
299    crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, PRSSEL_A, 4, O>;
300impl<'a, const O: u8> PRSSEL_W<'a, O> {
301    #[doc = "PRS ch 0 triggers scan sequence"]
302    #[inline(always)]
303    pub fn prsch0(self) -> &'a mut W {
304        self.variant(PRSSEL_A::PRSCH0)
305    }
306    #[doc = "PRS ch 1 triggers scan sequence"]
307    #[inline(always)]
308    pub fn prsch1(self) -> &'a mut W {
309        self.variant(PRSSEL_A::PRSCH1)
310    }
311    #[doc = "PRS ch 2 triggers scan sequence"]
312    #[inline(always)]
313    pub fn prsch2(self) -> &'a mut W {
314        self.variant(PRSSEL_A::PRSCH2)
315    }
316    #[doc = "PRS ch 3 triggers scan sequence"]
317    #[inline(always)]
318    pub fn prsch3(self) -> &'a mut W {
319        self.variant(PRSSEL_A::PRSCH3)
320    }
321    #[doc = "PRS ch 4 triggers scan sequence"]
322    #[inline(always)]
323    pub fn prsch4(self) -> &'a mut W {
324        self.variant(PRSSEL_A::PRSCH4)
325    }
326    #[doc = "PRS ch 5 triggers scan sequence"]
327    #[inline(always)]
328    pub fn prsch5(self) -> &'a mut W {
329        self.variant(PRSSEL_A::PRSCH5)
330    }
331    #[doc = "PRS ch 6 triggers scan sequence"]
332    #[inline(always)]
333    pub fn prsch6(self) -> &'a mut W {
334        self.variant(PRSSEL_A::PRSCH6)
335    }
336    #[doc = "PRS ch 7 triggers scan sequence"]
337    #[inline(always)]
338    pub fn prsch7(self) -> &'a mut W {
339        self.variant(PRSSEL_A::PRSCH7)
340    }
341    #[doc = "PRS ch 8 triggers scan sequence"]
342    #[inline(always)]
343    pub fn prsch8(self) -> &'a mut W {
344        self.variant(PRSSEL_A::PRSCH8)
345    }
346    #[doc = "PRS ch 9 triggers scan sequence"]
347    #[inline(always)]
348    pub fn prsch9(self) -> &'a mut W {
349        self.variant(PRSSEL_A::PRSCH9)
350    }
351    #[doc = "PRS ch 10 triggers scan sequence"]
352    #[inline(always)]
353    pub fn prsch10(self) -> &'a mut W {
354        self.variant(PRSSEL_A::PRSCH10)
355    }
356    #[doc = "PRS ch 11 triggers scan sequence"]
357    #[inline(always)]
358    pub fn prsch11(self) -> &'a mut W {
359        self.variant(PRSSEL_A::PRSCH11)
360    }
361}
362#[doc = "Field `CONVSTARTDELAY` reader - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
363pub type CONVSTARTDELAY_R = crate::FieldReader<u8, u8>;
364#[doc = "Field `CONVSTARTDELAY` writer - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
365pub type CONVSTARTDELAY_W<'a, const O: u8> =
366    crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 5, O>;
367#[doc = "Field `CONVSTARTDELAYEN` reader - Enable Delaying Next Conversion Start"]
368pub type CONVSTARTDELAYEN_R = crate::BitReader<bool>;
369#[doc = "Field `CONVSTARTDELAYEN` writer - Enable Delaying Next Conversion Start"]
370pub type CONVSTARTDELAYEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, O>;
371#[doc = "Field `REPDELAY` reader - REPDELAY Select for SCAN REP Mode"]
372pub type REPDELAY_R = crate::FieldReader<u8, REPDELAY_A>;
373#[doc = "REPDELAY Select for SCAN REP Mode\n\nValue on reset: 0"]
374#[derive(Clone, Copy, Debug, PartialEq, Eq)]
375#[repr(u8)]
376pub enum REPDELAY_A {
377    #[doc = "0: No delay"]
378    NODELAY = 0,
379    #[doc = "1: 4 conversion clock cycles"]
380    _4CYCLES = 1,
381    #[doc = "2: 8 conversion clock cycles"]
382    _8CYCLES = 2,
383    #[doc = "3: 16 conversion clock cycles"]
384    _16CYCLES = 3,
385    #[doc = "4: 32 conversion clock cycles"]
386    _32CYCLES = 4,
387    #[doc = "5: 64 conversion clock cycles"]
388    _64CYCLES = 5,
389    #[doc = "6: 128 conversion clock cycles"]
390    _128CYCLES = 6,
391    #[doc = "7: 256 conversion clock cycles"]
392    _256CYCLES = 7,
393}
394impl From<REPDELAY_A> for u8 {
395    #[inline(always)]
396    fn from(variant: REPDELAY_A) -> Self {
397        variant as _
398    }
399}
400impl REPDELAY_R {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub fn variant(&self) -> REPDELAY_A {
404        match self.bits {
405            0 => REPDELAY_A::NODELAY,
406            1 => REPDELAY_A::_4CYCLES,
407            2 => REPDELAY_A::_8CYCLES,
408            3 => REPDELAY_A::_16CYCLES,
409            4 => REPDELAY_A::_32CYCLES,
410            5 => REPDELAY_A::_64CYCLES,
411            6 => REPDELAY_A::_128CYCLES,
412            7 => REPDELAY_A::_256CYCLES,
413            _ => unreachable!(),
414        }
415    }
416    #[doc = "Checks if the value of the field is `NODELAY`"]
417    #[inline(always)]
418    pub fn is_nodelay(&self) -> bool {
419        *self == REPDELAY_A::NODELAY
420    }
421    #[doc = "Checks if the value of the field is `_4CYCLES`"]
422    #[inline(always)]
423    pub fn is_4cycles(&self) -> bool {
424        *self == REPDELAY_A::_4CYCLES
425    }
426    #[doc = "Checks if the value of the field is `_8CYCLES`"]
427    #[inline(always)]
428    pub fn is_8cycles(&self) -> bool {
429        *self == REPDELAY_A::_8CYCLES
430    }
431    #[doc = "Checks if the value of the field is `_16CYCLES`"]
432    #[inline(always)]
433    pub fn is_16cycles(&self) -> bool {
434        *self == REPDELAY_A::_16CYCLES
435    }
436    #[doc = "Checks if the value of the field is `_32CYCLES`"]
437    #[inline(always)]
438    pub fn is_32cycles(&self) -> bool {
439        *self == REPDELAY_A::_32CYCLES
440    }
441    #[doc = "Checks if the value of the field is `_64CYCLES`"]
442    #[inline(always)]
443    pub fn is_64cycles(&self) -> bool {
444        *self == REPDELAY_A::_64CYCLES
445    }
446    #[doc = "Checks if the value of the field is `_128CYCLES`"]
447    #[inline(always)]
448    pub fn is_128cycles(&self) -> bool {
449        *self == REPDELAY_A::_128CYCLES
450    }
451    #[doc = "Checks if the value of the field is `_256CYCLES`"]
452    #[inline(always)]
453    pub fn is_256cycles(&self) -> bool {
454        *self == REPDELAY_A::_256CYCLES
455    }
456}
457#[doc = "Field `REPDELAY` writer - REPDELAY Select for SCAN REP Mode"]
458pub type REPDELAY_W<'a, const O: u8> =
459    crate::FieldWriterSafe<'a, u32, SCANCTRLX_SPEC, u8, REPDELAY_A, 3, O>;
460impl<'a, const O: u8> REPDELAY_W<'a, O> {
461    #[doc = "No delay"]
462    #[inline(always)]
463    pub fn nodelay(self) -> &'a mut W {
464        self.variant(REPDELAY_A::NODELAY)
465    }
466    #[doc = "4 conversion clock cycles"]
467    #[inline(always)]
468    pub fn _4cycles(self) -> &'a mut W {
469        self.variant(REPDELAY_A::_4CYCLES)
470    }
471    #[doc = "8 conversion clock cycles"]
472    #[inline(always)]
473    pub fn _8cycles(self) -> &'a mut W {
474        self.variant(REPDELAY_A::_8CYCLES)
475    }
476    #[doc = "16 conversion clock cycles"]
477    #[inline(always)]
478    pub fn _16cycles(self) -> &'a mut W {
479        self.variant(REPDELAY_A::_16CYCLES)
480    }
481    #[doc = "32 conversion clock cycles"]
482    #[inline(always)]
483    pub fn _32cycles(self) -> &'a mut W {
484        self.variant(REPDELAY_A::_32CYCLES)
485    }
486    #[doc = "64 conversion clock cycles"]
487    #[inline(always)]
488    pub fn _64cycles(self) -> &'a mut W {
489        self.variant(REPDELAY_A::_64CYCLES)
490    }
491    #[doc = "128 conversion clock cycles"]
492    #[inline(always)]
493    pub fn _128cycles(self) -> &'a mut W {
494        self.variant(REPDELAY_A::_128CYCLES)
495    }
496    #[doc = "256 conversion clock cycles"]
497    #[inline(always)]
498    pub fn _256cycles(self) -> &'a mut W {
499        self.variant(REPDELAY_A::_256CYCLES)
500    }
501}
502impl R {
503    #[doc = "Bits 0:2 - Scan Channel Reference Selection"]
504    #[inline(always)]
505    pub fn vrefsel(&self) -> VREFSEL_R {
506        VREFSEL_R::new((self.bits & 7) as u8)
507    }
508    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
509    #[inline(always)]
510    pub fn vrefattfix(&self) -> VREFATTFIX_R {
511        VREFATTFIX_R::new(((self.bits >> 3) & 1) != 0)
512    }
513    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
514    #[inline(always)]
515    pub fn vrefatt(&self) -> VREFATT_R {
516        VREFATT_R::new(((self.bits >> 4) & 0x0f) as u8)
517    }
518    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
519    #[inline(always)]
520    pub fn vinatt(&self) -> VINATT_R {
521        VINATT_R::new(((self.bits >> 8) & 0x0f) as u8)
522    }
523    #[doc = "Bits 12:13 - Scan DV Level Select"]
524    #[inline(always)]
525    pub fn dvl(&self) -> DVL_R {
526        DVL_R::new(((self.bits >> 12) & 3) as u8)
527    }
528    #[doc = "Bit 14 - Scan FIFO Overflow Action"]
529    #[inline(always)]
530    pub fn fifoofact(&self) -> FIFOOFACT_R {
531        FIFOOFACT_R::new(((self.bits >> 14) & 1) != 0)
532    }
533    #[doc = "Bit 16 - Scan PRS Trigger Mode"]
534    #[inline(always)]
535    pub fn prsmode(&self) -> PRSMODE_R {
536        PRSMODE_R::new(((self.bits >> 16) & 1) != 0)
537    }
538    #[doc = "Bits 17:20 - Scan Sequence PRS Trigger Select"]
539    #[inline(always)]
540    pub fn prssel(&self) -> PRSSEL_R {
541        PRSSEL_R::new(((self.bits >> 17) & 0x0f) as u8)
542    }
543    #[doc = "Bits 22:26 - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
544    #[inline(always)]
545    pub fn convstartdelay(&self) -> CONVSTARTDELAY_R {
546        CONVSTARTDELAY_R::new(((self.bits >> 22) & 0x1f) as u8)
547    }
548    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
549    #[inline(always)]
550    pub fn convstartdelayen(&self) -> CONVSTARTDELAYEN_R {
551        CONVSTARTDELAYEN_R::new(((self.bits >> 27) & 1) != 0)
552    }
553    #[doc = "Bits 29:31 - REPDELAY Select for SCAN REP Mode"]
554    #[inline(always)]
555    pub fn repdelay(&self) -> REPDELAY_R {
556        REPDELAY_R::new(((self.bits >> 29) & 7) as u8)
557    }
558}
559impl W {
560    #[doc = "Bits 0:2 - Scan Channel Reference Selection"]
561    #[inline(always)]
562    #[must_use]
563    pub fn vrefsel(&mut self) -> VREFSEL_W<0> {
564        VREFSEL_W::new(self)
565    }
566    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
567    #[inline(always)]
568    #[must_use]
569    pub fn vrefattfix(&mut self) -> VREFATTFIX_W<3> {
570        VREFATTFIX_W::new(self)
571    }
572    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
573    #[inline(always)]
574    #[must_use]
575    pub fn vrefatt(&mut self) -> VREFATT_W<4> {
576        VREFATT_W::new(self)
577    }
578    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
579    #[inline(always)]
580    #[must_use]
581    pub fn vinatt(&mut self) -> VINATT_W<8> {
582        VINATT_W::new(self)
583    }
584    #[doc = "Bits 12:13 - Scan DV Level Select"]
585    #[inline(always)]
586    #[must_use]
587    pub fn dvl(&mut self) -> DVL_W<12> {
588        DVL_W::new(self)
589    }
590    #[doc = "Bit 14 - Scan FIFO Overflow Action"]
591    #[inline(always)]
592    #[must_use]
593    pub fn fifoofact(&mut self) -> FIFOOFACT_W<14> {
594        FIFOOFACT_W::new(self)
595    }
596    #[doc = "Bit 16 - Scan PRS Trigger Mode"]
597    #[inline(always)]
598    #[must_use]
599    pub fn prsmode(&mut self) -> PRSMODE_W<16> {
600        PRSMODE_W::new(self)
601    }
602    #[doc = "Bits 17:20 - Scan Sequence PRS Trigger Select"]
603    #[inline(always)]
604    #[must_use]
605    pub fn prssel(&mut self) -> PRSSEL_W<17> {
606        PRSSEL_W::new(self)
607    }
608    #[doc = "Bits 22:26 - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
609    #[inline(always)]
610    #[must_use]
611    pub fn convstartdelay(&mut self) -> CONVSTARTDELAY_W<22> {
612        CONVSTARTDELAY_W::new(self)
613    }
614    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
615    #[inline(always)]
616    #[must_use]
617    pub fn convstartdelayen(&mut self) -> CONVSTARTDELAYEN_W<27> {
618        CONVSTARTDELAYEN_W::new(self)
619    }
620    #[doc = "Bits 29:31 - REPDELAY Select for SCAN REP Mode"]
621    #[inline(always)]
622    #[must_use]
623    pub fn repdelay(&mut self) -> REPDELAY_W<29> {
624        REPDELAY_W::new(self)
625    }
626    #[doc = "Writes raw bits to the register."]
627    #[inline(always)]
628    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
629        self.0.bits(bits);
630        self
631    }
632}
633#[doc = "Scan Control Register Continued\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanctrlx](index.html) module"]
634pub struct SCANCTRLX_SPEC;
635impl crate::RegisterSpec for SCANCTRLX_SPEC {
636    type Ux = u32;
637}
638#[doc = "`read()` method returns [scanctrlx::R](R) reader structure"]
639impl crate::Readable for SCANCTRLX_SPEC {
640    type Reader = R;
641}
642#[doc = "`write(|w| ..)` method takes [scanctrlx::W](W) writer structure"]
643impl crate::Writable for SCANCTRLX_SPEC {
644    type Writer = W;
645    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
646    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
647}
648#[doc = "`reset()` method sets SCANCTRLX to value 0"]
649impl crate::Resettable for SCANCTRLX_SPEC {
650    const RESET_VALUE: Self::Ux = 0;
651}
efm32jg12b_pac/efm32jg12b500/adc0/scanctrlx.rs

efm32jg12b_pac/efm32jg12b500/adc0/
scanctrlx.rs
