efm32hg321_pac/timer2/
dtctrl.rs1#[doc = "Register `DTCTRL` reader"]
2pub struct R(crate::R<DTCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DTCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DTCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DTCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DTCTRL` writer"]
17pub struct W(crate::W<DTCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DTCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DTCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DTCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `DTEN` reader - DTI Enable"]
38pub type DTEN_R = crate::BitReader<bool>;
39#[doc = "Field `DTEN` writer - DTI Enable"]
40pub type DTEN_W<'a> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, 0>;
41#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"]
42pub type DTDAS_R = crate::BitReader<bool>;
43#[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"]
44pub type DTDAS_W<'a> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, 1>;
45#[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"]
46pub type DTIPOL_R = crate::BitReader<bool>;
47#[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"]
48pub type DTIPOL_W<'a> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, 2>;
49#[doc = "Field `DTCINV` reader - DTI Complementary Output Invert."]
50pub type DTCINV_R = crate::BitReader<bool>;
51#[doc = "Field `DTCINV` writer - DTI Complementary Output Invert."]
52pub type DTCINV_W<'a> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, 3>;
53#[doc = "DTI PRS Source Channel Select\n\nValue on reset: 0"]
54#[derive(Clone, Copy, Debug, PartialEq)]
55#[repr(u8)]
56pub enum DTPRSSEL_A {
57 #[doc = "0: PRS Channel 0 selected as input"]
58 PRSCH0 = 0,
59 #[doc = "1: PRS Channel 1 selected as input"]
60 PRSCH1 = 1,
61 #[doc = "2: PRS Channel 2 selected as input"]
62 PRSCH2 = 2,
63 #[doc = "3: PRS Channel 3 selected as input"]
64 PRSCH3 = 3,
65 #[doc = "4: PRS Channel 4 selected as input"]
66 PRSCH4 = 4,
67 #[doc = "5: PRS Channel 5 selected as input"]
68 PRSCH5 = 5,
69}
70impl From<DTPRSSEL_A> for u8 {
71 #[inline(always)]
72 fn from(variant: DTPRSSEL_A) -> Self {
73 variant as _
74 }
75}
76#[doc = "Field `DTPRSSEL` reader - DTI PRS Source Channel Select"]
77pub type DTPRSSEL_R = crate::FieldReader<u8, DTPRSSEL_A>;
78impl DTPRSSEL_R {
79 #[doc = "Get enumerated values variant"]
80 #[inline(always)]
81 pub fn variant(&self) -> Option<DTPRSSEL_A> {
82 match self.bits {
83 0 => Some(DTPRSSEL_A::PRSCH0),
84 1 => Some(DTPRSSEL_A::PRSCH1),
85 2 => Some(DTPRSSEL_A::PRSCH2),
86 3 => Some(DTPRSSEL_A::PRSCH3),
87 4 => Some(DTPRSSEL_A::PRSCH4),
88 5 => Some(DTPRSSEL_A::PRSCH5),
89 _ => None,
90 }
91 }
92 #[doc = "Checks if the value of the field is `PRSCH0`"]
93 #[inline(always)]
94 pub fn is_prsch0(&self) -> bool {
95 *self == DTPRSSEL_A::PRSCH0
96 }
97 #[doc = "Checks if the value of the field is `PRSCH1`"]
98 #[inline(always)]
99 pub fn is_prsch1(&self) -> bool {
100 *self == DTPRSSEL_A::PRSCH1
101 }
102 #[doc = "Checks if the value of the field is `PRSCH2`"]
103 #[inline(always)]
104 pub fn is_prsch2(&self) -> bool {
105 *self == DTPRSSEL_A::PRSCH2
106 }
107 #[doc = "Checks if the value of the field is `PRSCH3`"]
108 #[inline(always)]
109 pub fn is_prsch3(&self) -> bool {
110 *self == DTPRSSEL_A::PRSCH3
111 }
112 #[doc = "Checks if the value of the field is `PRSCH4`"]
113 #[inline(always)]
114 pub fn is_prsch4(&self) -> bool {
115 *self == DTPRSSEL_A::PRSCH4
116 }
117 #[doc = "Checks if the value of the field is `PRSCH5`"]
118 #[inline(always)]
119 pub fn is_prsch5(&self) -> bool {
120 *self == DTPRSSEL_A::PRSCH5
121 }
122}
123#[doc = "Field `DTPRSSEL` writer - DTI PRS Source Channel Select"]
124pub type DTPRSSEL_W<'a> = crate::FieldWriter<'a, u32, DTCTRL_SPEC, u8, DTPRSSEL_A, 3, 4>;
125impl<'a> DTPRSSEL_W<'a> {
126 #[doc = "PRS Channel 0 selected as input"]
127 #[inline(always)]
128 pub fn prsch0(self) -> &'a mut W {
129 self.variant(DTPRSSEL_A::PRSCH0)
130 }
131 #[doc = "PRS Channel 1 selected as input"]
132 #[inline(always)]
133 pub fn prsch1(self) -> &'a mut W {
134 self.variant(DTPRSSEL_A::PRSCH1)
135 }
136 #[doc = "PRS Channel 2 selected as input"]
137 #[inline(always)]
138 pub fn prsch2(self) -> &'a mut W {
139 self.variant(DTPRSSEL_A::PRSCH2)
140 }
141 #[doc = "PRS Channel 3 selected as input"]
142 #[inline(always)]
143 pub fn prsch3(self) -> &'a mut W {
144 self.variant(DTPRSSEL_A::PRSCH3)
145 }
146 #[doc = "PRS Channel 4 selected as input"]
147 #[inline(always)]
148 pub fn prsch4(self) -> &'a mut W {
149 self.variant(DTPRSSEL_A::PRSCH4)
150 }
151 #[doc = "PRS Channel 5 selected as input"]
152 #[inline(always)]
153 pub fn prsch5(self) -> &'a mut W {
154 self.variant(DTPRSSEL_A::PRSCH5)
155 }
156}
157#[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"]
158pub type DTPRSEN_R = crate::BitReader<bool>;
159#[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"]
160pub type DTPRSEN_W<'a> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, 24>;
161impl R {
162 #[doc = "Bit 0 - DTI Enable"]
163 #[inline(always)]
164 pub fn dten(&self) -> DTEN_R {
165 DTEN_R::new((self.bits & 1) != 0)
166 }
167 #[doc = "Bit 1 - DTI Automatic Start-up Functionality"]
168 #[inline(always)]
169 pub fn dtdas(&self) -> DTDAS_R {
170 DTDAS_R::new(((self.bits >> 1) & 1) != 0)
171 }
172 #[doc = "Bit 2 - DTI Inactive Polarity"]
173 #[inline(always)]
174 pub fn dtipol(&self) -> DTIPOL_R {
175 DTIPOL_R::new(((self.bits >> 2) & 1) != 0)
176 }
177 #[doc = "Bit 3 - DTI Complementary Output Invert."]
178 #[inline(always)]
179 pub fn dtcinv(&self) -> DTCINV_R {
180 DTCINV_R::new(((self.bits >> 3) & 1) != 0)
181 }
182 #[doc = "Bits 4:6 - DTI PRS Source Channel Select"]
183 #[inline(always)]
184 pub fn dtprssel(&self) -> DTPRSSEL_R {
185 DTPRSSEL_R::new(((self.bits >> 4) & 7) as u8)
186 }
187 #[doc = "Bit 24 - DTI PRS Source Enable"]
188 #[inline(always)]
189 pub fn dtprsen(&self) -> DTPRSEN_R {
190 DTPRSEN_R::new(((self.bits >> 24) & 1) != 0)
191 }
192}
193impl W {
194 #[doc = "Bit 0 - DTI Enable"]
195 #[inline(always)]
196 pub fn dten(&mut self) -> DTEN_W {
197 DTEN_W::new(self)
198 }
199 #[doc = "Bit 1 - DTI Automatic Start-up Functionality"]
200 #[inline(always)]
201 pub fn dtdas(&mut self) -> DTDAS_W {
202 DTDAS_W::new(self)
203 }
204 #[doc = "Bit 2 - DTI Inactive Polarity"]
205 #[inline(always)]
206 pub fn dtipol(&mut self) -> DTIPOL_W {
207 DTIPOL_W::new(self)
208 }
209 #[doc = "Bit 3 - DTI Complementary Output Invert."]
210 #[inline(always)]
211 pub fn dtcinv(&mut self) -> DTCINV_W {
212 DTCINV_W::new(self)
213 }
214 #[doc = "Bits 4:6 - DTI PRS Source Channel Select"]
215 #[inline(always)]
216 pub fn dtprssel(&mut self) -> DTPRSSEL_W {
217 DTPRSSEL_W::new(self)
218 }
219 #[doc = "Bit 24 - DTI PRS Source Enable"]
220 #[inline(always)]
221 pub fn dtprsen(&mut self) -> DTPRSEN_W {
222 DTPRSEN_W::new(self)
223 }
224 #[doc = "Writes raw bits to the register."]
225 #[inline(always)]
226 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
227 self.0.bits(bits);
228 self
229 }
230}
231#[doc = "DTI Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"]
232pub struct DTCTRL_SPEC;
233impl crate::RegisterSpec for DTCTRL_SPEC {
234 type Ux = u32;
235}
236#[doc = "`read()` method returns [dtctrl::R](R) reader structure"]
237impl crate::Readable for DTCTRL_SPEC {
238 type Reader = R;
239}
240#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"]
241impl crate::Writable for DTCTRL_SPEC {
242 type Writer = W;
243}
244#[doc = "`reset()` method sets DTCTRL to value 0"]
245impl crate::Resettable for DTCTRL_SPEC {
246 #[inline(always)]
247 fn reset_value() -> Self::Ux {
248 0
249 }
250}