efm32hg321_pac/cmu/
oscencmd.rs

1#[doc = "Register `OSCENCMD` writer"]
2pub struct W(crate::W<OSCENCMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<OSCENCMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<OSCENCMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<OSCENCMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `HFRCOEN` writer - HFRCO Enable"]
23pub type HFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 0>;
24#[doc = "Field `HFRCODIS` writer - HFRCO Disable"]
25pub type HFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 1>;
26#[doc = "Field `HFXOEN` writer - HFXO Enable"]
27pub type HFXOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 2>;
28#[doc = "Field `HFXODIS` writer - HFXO Disable"]
29pub type HFXODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 3>;
30#[doc = "Field `AUXHFRCOEN` writer - AUXHFRCO Enable"]
31pub type AUXHFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 4>;
32#[doc = "Field `AUXHFRCODIS` writer - AUXHFRCO Disable"]
33pub type AUXHFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 5>;
34#[doc = "Field `LFRCOEN` writer - LFRCO Enable"]
35pub type LFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 6>;
36#[doc = "Field `LFRCODIS` writer - LFRCO Disable"]
37pub type LFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 7>;
38#[doc = "Field `LFXOEN` writer - LFXO Enable"]
39pub type LFXOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 8>;
40#[doc = "Field `LFXODIS` writer - LFXO Disable"]
41pub type LFXODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 9>;
42#[doc = "Field `USHFRCOEN` writer - USHFRCO Enable"]
43pub type USHFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 10>;
44#[doc = "Field `USHFRCODIS` writer - USHFRCO Disable"]
45pub type USHFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 11>;
46impl W {
47    #[doc = "Bit 0 - HFRCO Enable"]
48    #[inline(always)]
49    pub fn hfrcoen(&mut self) -> HFRCOEN_W {
50        HFRCOEN_W::new(self)
51    }
52    #[doc = "Bit 1 - HFRCO Disable"]
53    #[inline(always)]
54    pub fn hfrcodis(&mut self) -> HFRCODIS_W {
55        HFRCODIS_W::new(self)
56    }
57    #[doc = "Bit 2 - HFXO Enable"]
58    #[inline(always)]
59    pub fn hfxoen(&mut self) -> HFXOEN_W {
60        HFXOEN_W::new(self)
61    }
62    #[doc = "Bit 3 - HFXO Disable"]
63    #[inline(always)]
64    pub fn hfxodis(&mut self) -> HFXODIS_W {
65        HFXODIS_W::new(self)
66    }
67    #[doc = "Bit 4 - AUXHFRCO Enable"]
68    #[inline(always)]
69    pub fn auxhfrcoen(&mut self) -> AUXHFRCOEN_W {
70        AUXHFRCOEN_W::new(self)
71    }
72    #[doc = "Bit 5 - AUXHFRCO Disable"]
73    #[inline(always)]
74    pub fn auxhfrcodis(&mut self) -> AUXHFRCODIS_W {
75        AUXHFRCODIS_W::new(self)
76    }
77    #[doc = "Bit 6 - LFRCO Enable"]
78    #[inline(always)]
79    pub fn lfrcoen(&mut self) -> LFRCOEN_W {
80        LFRCOEN_W::new(self)
81    }
82    #[doc = "Bit 7 - LFRCO Disable"]
83    #[inline(always)]
84    pub fn lfrcodis(&mut self) -> LFRCODIS_W {
85        LFRCODIS_W::new(self)
86    }
87    #[doc = "Bit 8 - LFXO Enable"]
88    #[inline(always)]
89    pub fn lfxoen(&mut self) -> LFXOEN_W {
90        LFXOEN_W::new(self)
91    }
92    #[doc = "Bit 9 - LFXO Disable"]
93    #[inline(always)]
94    pub fn lfxodis(&mut self) -> LFXODIS_W {
95        LFXODIS_W::new(self)
96    }
97    #[doc = "Bit 10 - USHFRCO Enable"]
98    #[inline(always)]
99    pub fn ushfrcoen(&mut self) -> USHFRCOEN_W {
100        USHFRCOEN_W::new(self)
101    }
102    #[doc = "Bit 11 - USHFRCO Disable"]
103    #[inline(always)]
104    pub fn ushfrcodis(&mut self) -> USHFRCODIS_W {
105        USHFRCODIS_W::new(self)
106    }
107    #[doc = "Writes raw bits to the register."]
108    #[inline(always)]
109    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
110        self.0.bits(bits);
111        self
112    }
113}
114#[doc = "Oscillator Enable/Disable Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [oscencmd](index.html) module"]
115pub struct OSCENCMD_SPEC;
116impl crate::RegisterSpec for OSCENCMD_SPEC {
117    type Ux = u32;
118}
119#[doc = "`write(|w| ..)` method takes [oscencmd::W](W) writer structure"]
120impl crate::Writable for OSCENCMD_SPEC {
121    type Writer = W;
122}
123#[doc = "`reset()` method sets OSCENCMD to value 0"]
124impl crate::Resettable for OSCENCMD_SPEC {
125    #[inline(always)]
126    fn reset_value() -> Self::Ux {
127        0
128    }
129}
efm32hg321_pac/cmu/oscencmd.rs

efm32hg321_pac/cmu/
oscencmd.rs
