efm32hg321_pac/cmu/
ien.rs1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<IEN_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<IEN_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<IEN_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<IEN_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `HFRCORDY` reader - HFRCO Ready Interrupt Enable"]
38pub type HFRCORDY_R = crate::BitReader<bool>;
39#[doc = "Field `HFRCORDY` writer - HFRCO Ready Interrupt Enable"]
40pub type HFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `HFXORDY` reader - HFXO Ready Interrupt Enable"]
42pub type HFXORDY_R = crate::BitReader<bool>;
43#[doc = "Field `HFXORDY` writer - HFXO Ready Interrupt Enable"]
44pub type HFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `LFRCORDY` reader - LFRCO Ready Interrupt Enable"]
46pub type LFRCORDY_R = crate::BitReader<bool>;
47#[doc = "Field `LFRCORDY` writer - LFRCO Ready Interrupt Enable"]
48pub type LFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `LFXORDY` reader - LFXO Ready Interrupt Enable"]
50pub type LFXORDY_R = crate::BitReader<bool>;
51#[doc = "Field `LFXORDY` writer - LFXO Ready Interrupt Enable"]
52pub type LFXORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `AUXHFRCORDY` reader - AUXHFRCO Ready Interrupt Enable"]
54pub type AUXHFRCORDY_R = crate::BitReader<bool>;
55#[doc = "Field `AUXHFRCORDY` writer - AUXHFRCO Ready Interrupt Enable"]
56pub type AUXHFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `CALRDY` reader - Calibration Ready Interrupt Enable"]
58pub type CALRDY_R = crate::BitReader<bool>;
59#[doc = "Field `CALRDY` writer - Calibration Ready Interrupt Enable"]
60pub type CALRDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `CALOF` reader - Calibration Overflow Interrupt Enable"]
62pub type CALOF_R = crate::BitReader<bool>;
63#[doc = "Field `CALOF` writer - Calibration Overflow Interrupt Enable"]
64pub type CALOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65#[doc = "Field `USHFRCORDY` reader - USHFRCO Ready Interrupt Enable"]
66pub type USHFRCORDY_R = crate::BitReader<bool>;
67#[doc = "Field `USHFRCORDY` writer - USHFRCO Ready Interrupt Enable"]
68pub type USHFRCORDY_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 8>;
69#[doc = "Field `USBCHFOSCSEL` reader - USBC HF-oscillator Selected Interrupt Flag Clear"]
70pub type USBCHFOSCSEL_R = crate::BitReader<bool>;
71#[doc = "Field `USBCHFOSCSEL` writer - USBC HF-oscillator Selected Interrupt Flag Clear"]
72pub type USBCHFOSCSEL_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 9>;
73impl R {
74 #[doc = "Bit 0 - HFRCO Ready Interrupt Enable"]
75 #[inline(always)]
76 pub fn hfrcordy(&self) -> HFRCORDY_R {
77 HFRCORDY_R::new((self.bits & 1) != 0)
78 }
79 #[doc = "Bit 1 - HFXO Ready Interrupt Enable"]
80 #[inline(always)]
81 pub fn hfxordy(&self) -> HFXORDY_R {
82 HFXORDY_R::new(((self.bits >> 1) & 1) != 0)
83 }
84 #[doc = "Bit 2 - LFRCO Ready Interrupt Enable"]
85 #[inline(always)]
86 pub fn lfrcordy(&self) -> LFRCORDY_R {
87 LFRCORDY_R::new(((self.bits >> 2) & 1) != 0)
88 }
89 #[doc = "Bit 3 - LFXO Ready Interrupt Enable"]
90 #[inline(always)]
91 pub fn lfxordy(&self) -> LFXORDY_R {
92 LFXORDY_R::new(((self.bits >> 3) & 1) != 0)
93 }
94 #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Enable"]
95 #[inline(always)]
96 pub fn auxhfrcordy(&self) -> AUXHFRCORDY_R {
97 AUXHFRCORDY_R::new(((self.bits >> 4) & 1) != 0)
98 }
99 #[doc = "Bit 5 - Calibration Ready Interrupt Enable"]
100 #[inline(always)]
101 pub fn calrdy(&self) -> CALRDY_R {
102 CALRDY_R::new(((self.bits >> 5) & 1) != 0)
103 }
104 #[doc = "Bit 6 - Calibration Overflow Interrupt Enable"]
105 #[inline(always)]
106 pub fn calof(&self) -> CALOF_R {
107 CALOF_R::new(((self.bits >> 6) & 1) != 0)
108 }
109 #[doc = "Bit 8 - USHFRCO Ready Interrupt Enable"]
110 #[inline(always)]
111 pub fn ushfrcordy(&self) -> USHFRCORDY_R {
112 USHFRCORDY_R::new(((self.bits >> 8) & 1) != 0)
113 }
114 #[doc = "Bit 9 - USBC HF-oscillator Selected Interrupt Flag Clear"]
115 #[inline(always)]
116 pub fn usbchfoscsel(&self) -> USBCHFOSCSEL_R {
117 USBCHFOSCSEL_R::new(((self.bits >> 9) & 1) != 0)
118 }
119}
120impl W {
121 #[doc = "Bit 0 - HFRCO Ready Interrupt Enable"]
122 #[inline(always)]
123 pub fn hfrcordy(&mut self) -> HFRCORDY_W {
124 HFRCORDY_W::new(self)
125 }
126 #[doc = "Bit 1 - HFXO Ready Interrupt Enable"]
127 #[inline(always)]
128 pub fn hfxordy(&mut self) -> HFXORDY_W {
129 HFXORDY_W::new(self)
130 }
131 #[doc = "Bit 2 - LFRCO Ready Interrupt Enable"]
132 #[inline(always)]
133 pub fn lfrcordy(&mut self) -> LFRCORDY_W {
134 LFRCORDY_W::new(self)
135 }
136 #[doc = "Bit 3 - LFXO Ready Interrupt Enable"]
137 #[inline(always)]
138 pub fn lfxordy(&mut self) -> LFXORDY_W {
139 LFXORDY_W::new(self)
140 }
141 #[doc = "Bit 4 - AUXHFRCO Ready Interrupt Enable"]
142 #[inline(always)]
143 pub fn auxhfrcordy(&mut self) -> AUXHFRCORDY_W {
144 AUXHFRCORDY_W::new(self)
145 }
146 #[doc = "Bit 5 - Calibration Ready Interrupt Enable"]
147 #[inline(always)]
148 pub fn calrdy(&mut self) -> CALRDY_W {
149 CALRDY_W::new(self)
150 }
151 #[doc = "Bit 6 - Calibration Overflow Interrupt Enable"]
152 #[inline(always)]
153 pub fn calof(&mut self) -> CALOF_W {
154 CALOF_W::new(self)
155 }
156 #[doc = "Bit 8 - USHFRCO Ready Interrupt Enable"]
157 #[inline(always)]
158 pub fn ushfrcordy(&mut self) -> USHFRCORDY_W {
159 USHFRCORDY_W::new(self)
160 }
161 #[doc = "Bit 9 - USBC HF-oscillator Selected Interrupt Flag Clear"]
162 #[inline(always)]
163 pub fn usbchfoscsel(&mut self) -> USBCHFOSCSEL_W {
164 USBCHFOSCSEL_W::new(self)
165 }
166 #[doc = "Writes raw bits to the register."]
167 #[inline(always)]
168 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
169 self.0.bits(bits);
170 self
171 }
172}
173#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
174pub struct IEN_SPEC;
175impl crate::RegisterSpec for IEN_SPEC {
176 type Ux = u32;
177}
178#[doc = "`read()` method returns [ien::R](R) reader structure"]
179impl crate::Readable for IEN_SPEC {
180 type Reader = R;
181}
182#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
183impl crate::Writable for IEN_SPEC {
184 type Writer = W;
185}
186#[doc = "`reset()` method sets IEN to value 0"]
187impl crate::Resettable for IEN_SPEC {
188 #[inline(always)]
189 fn reset_value() -> Self::Ux {
190 0
191 }
192}