efm32hg310_pac/usb/
doepmsk.rs

1#[doc = "Register `DOEPMSK` reader"]
2pub struct R(crate::R<DOEPMSK_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DOEPMSK_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DOEPMSK_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DOEPMSK_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DOEPMSK` writer"]
17pub struct W(crate::W<DOEPMSK_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DOEPMSK_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DOEPMSK_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DOEPMSK_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `XFERCOMPLMSK` reader - Transfer Completed Interrupt Mask"]
38pub type XFERCOMPLMSK_R = crate::BitReader<bool>;
39#[doc = "Field `XFERCOMPLMSK` writer - Transfer Completed Interrupt Mask"]
40pub type XFERCOMPLMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 0>;
41#[doc = "Field `EPDISBLDMSK` reader - Endpoint Disabled Interrupt Mask"]
42pub type EPDISBLDMSK_R = crate::BitReader<bool>;
43#[doc = "Field `EPDISBLDMSK` writer - Endpoint Disabled Interrupt Mask"]
44pub type EPDISBLDMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 1>;
45#[doc = "Field `AHBERRMSK` reader - AHB Error"]
46pub type AHBERRMSK_R = crate::BitReader<bool>;
47#[doc = "Field `AHBERRMSK` writer - AHB Error"]
48pub type AHBERRMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 2>;
49#[doc = "Field `SETUPMSK` reader - SETUP Phase Done Mask"]
50pub type SETUPMSK_R = crate::BitReader<bool>;
51#[doc = "Field `SETUPMSK` writer - SETUP Phase Done Mask"]
52pub type SETUPMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 3>;
53#[doc = "Field `OUTTKNEPDISMSK` reader - OUT Token Received when Endpoint Disabled Mask"]
54pub type OUTTKNEPDISMSK_R = crate::BitReader<bool>;
55#[doc = "Field `OUTTKNEPDISMSK` writer - OUT Token Received when Endpoint Disabled Mask"]
56pub type OUTTKNEPDISMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 4>;
57#[doc = "Field `STSPHSERCVDMSK` reader - Status Phase Received Mask"]
58pub type STSPHSERCVDMSK_R = crate::BitReader<bool>;
59#[doc = "Field `STSPHSERCVDMSK` writer - Status Phase Received Mask"]
60pub type STSPHSERCVDMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 5>;
61#[doc = "Field `BACK2BACKSETUP` reader - Back-to-Back SETUP Packets Received Mask"]
62pub type BACK2BACKSETUP_R = crate::BitReader<bool>;
63#[doc = "Field `BACK2BACKSETUP` writer - Back-to-Back SETUP Packets Received Mask"]
64pub type BACK2BACKSETUP_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 6>;
65#[doc = "Field `OUTPKTERRMSK` reader - OUT Packet Error Mask"]
66pub type OUTPKTERRMSK_R = crate::BitReader<bool>;
67#[doc = "Field `OUTPKTERRMSK` writer - OUT Packet Error Mask"]
68pub type OUTPKTERRMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 8>;
69#[doc = "Field `BBLEERRMSK` reader - Babble Error interrupt Mask"]
70pub type BBLEERRMSK_R = crate::BitReader<bool>;
71#[doc = "Field `BBLEERRMSK` writer - Babble Error interrupt Mask"]
72pub type BBLEERRMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 12>;
73#[doc = "Field `NAKMSK` reader - NAK interrupt Mask"]
74pub type NAKMSK_R = crate::BitReader<bool>;
75#[doc = "Field `NAKMSK` writer - NAK interrupt Mask"]
76pub type NAKMSK_W<'a> = crate::BitWriter<'a, u32, DOEPMSK_SPEC, bool, 13>;
77impl R {
78    #[doc = "Bit 0 - Transfer Completed Interrupt Mask"]
79    #[inline(always)]
80    pub fn xfercomplmsk(&self) -> XFERCOMPLMSK_R {
81        XFERCOMPLMSK_R::new((self.bits & 1) != 0)
82    }
83    #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"]
84    #[inline(always)]
85    pub fn epdisbldmsk(&self) -> EPDISBLDMSK_R {
86        EPDISBLDMSK_R::new(((self.bits >> 1) & 1) != 0)
87    }
88    #[doc = "Bit 2 - AHB Error"]
89    #[inline(always)]
90    pub fn ahberrmsk(&self) -> AHBERRMSK_R {
91        AHBERRMSK_R::new(((self.bits >> 2) & 1) != 0)
92    }
93    #[doc = "Bit 3 - SETUP Phase Done Mask"]
94    #[inline(always)]
95    pub fn setupmsk(&self) -> SETUPMSK_R {
96        SETUPMSK_R::new(((self.bits >> 3) & 1) != 0)
97    }
98    #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"]
99    #[inline(always)]
100    pub fn outtknepdismsk(&self) -> OUTTKNEPDISMSK_R {
101        OUTTKNEPDISMSK_R::new(((self.bits >> 4) & 1) != 0)
102    }
103    #[doc = "Bit 5 - Status Phase Received Mask"]
104    #[inline(always)]
105    pub fn stsphsercvdmsk(&self) -> STSPHSERCVDMSK_R {
106        STSPHSERCVDMSK_R::new(((self.bits >> 5) & 1) != 0)
107    }
108    #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"]
109    #[inline(always)]
110    pub fn back2backsetup(&self) -> BACK2BACKSETUP_R {
111        BACK2BACKSETUP_R::new(((self.bits >> 6) & 1) != 0)
112    }
113    #[doc = "Bit 8 - OUT Packet Error Mask"]
114    #[inline(always)]
115    pub fn outpkterrmsk(&self) -> OUTPKTERRMSK_R {
116        OUTPKTERRMSK_R::new(((self.bits >> 8) & 1) != 0)
117    }
118    #[doc = "Bit 12 - Babble Error interrupt Mask"]
119    #[inline(always)]
120    pub fn bbleerrmsk(&self) -> BBLEERRMSK_R {
121        BBLEERRMSK_R::new(((self.bits >> 12) & 1) != 0)
122    }
123    #[doc = "Bit 13 - NAK interrupt Mask"]
124    #[inline(always)]
125    pub fn nakmsk(&self) -> NAKMSK_R {
126        NAKMSK_R::new(((self.bits >> 13) & 1) != 0)
127    }
128}
129impl W {
130    #[doc = "Bit 0 - Transfer Completed Interrupt Mask"]
131    #[inline(always)]
132    pub fn xfercomplmsk(&mut self) -> XFERCOMPLMSK_W {
133        XFERCOMPLMSK_W::new(self)
134    }
135    #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"]
136    #[inline(always)]
137    pub fn epdisbldmsk(&mut self) -> EPDISBLDMSK_W {
138        EPDISBLDMSK_W::new(self)
139    }
140    #[doc = "Bit 2 - AHB Error"]
141    #[inline(always)]
142    pub fn ahberrmsk(&mut self) -> AHBERRMSK_W {
143        AHBERRMSK_W::new(self)
144    }
145    #[doc = "Bit 3 - SETUP Phase Done Mask"]
146    #[inline(always)]
147    pub fn setupmsk(&mut self) -> SETUPMSK_W {
148        SETUPMSK_W::new(self)
149    }
150    #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"]
151    #[inline(always)]
152    pub fn outtknepdismsk(&mut self) -> OUTTKNEPDISMSK_W {
153        OUTTKNEPDISMSK_W::new(self)
154    }
155    #[doc = "Bit 5 - Status Phase Received Mask"]
156    #[inline(always)]
157    pub fn stsphsercvdmsk(&mut self) -> STSPHSERCVDMSK_W {
158        STSPHSERCVDMSK_W::new(self)
159    }
160    #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"]
161    #[inline(always)]
162    pub fn back2backsetup(&mut self) -> BACK2BACKSETUP_W {
163        BACK2BACKSETUP_W::new(self)
164    }
165    #[doc = "Bit 8 - OUT Packet Error Mask"]
166    #[inline(always)]
167    pub fn outpkterrmsk(&mut self) -> OUTPKTERRMSK_W {
168        OUTPKTERRMSK_W::new(self)
169    }
170    #[doc = "Bit 12 - Babble Error interrupt Mask"]
171    #[inline(always)]
172    pub fn bbleerrmsk(&mut self) -> BBLEERRMSK_W {
173        BBLEERRMSK_W::new(self)
174    }
175    #[doc = "Bit 13 - NAK interrupt Mask"]
176    #[inline(always)]
177    pub fn nakmsk(&mut self) -> NAKMSK_W {
178        NAKMSK_W::new(self)
179    }
180    #[doc = "Writes raw bits to the register."]
181    #[inline(always)]
182    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
183        self.0.bits(bits);
184        self
185    }
186}
187#[doc = "Device OUT Endpoint Common Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doepmsk](index.html) module"]
188pub struct DOEPMSK_SPEC;
189impl crate::RegisterSpec for DOEPMSK_SPEC {
190    type Ux = u32;
191}
192#[doc = "`read()` method returns [doepmsk::R](R) reader structure"]
193impl crate::Readable for DOEPMSK_SPEC {
194    type Reader = R;
195}
196#[doc = "`write(|w| ..)` method takes [doepmsk::W](W) writer structure"]
197impl crate::Writable for DOEPMSK_SPEC {
198    type Writer = W;
199}
200#[doc = "`reset()` method sets DOEPMSK to value 0"]
201impl crate::Resettable for DOEPMSK_SPEC {
202    #[inline(always)]
203    fn reset_value() -> Self::Ux {
204        0
205    }
206}
efm32hg310_pac/usb/doepmsk.rs

efm32hg310_pac/usb/
doepmsk.rs
