efm32hg310_pac/pcnt0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Mode Select\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum MODE_A {
41    #[doc = "0: The module is disabled."]
42    DISABLE = 0,
43    #[doc = "1: Single input LFACLK oversampling mode (available in EM0-EM2)."]
44    OVSSINGLE = 1,
45    #[doc = "2: Externally clocked single input counter mode (available in EM0-EM3)."]
46    EXTCLKSINGLE = 2,
47    #[doc = "3: Externally clocked quadrature decoder mode (available in EM0-EM3)."]
48    EXTCLKQUAD = 3,
49}
50impl From<MODE_A> for u8 {
51    #[inline(always)]
52    fn from(variant: MODE_A) -> Self {
53        variant as _
54    }
55}
56#[doc = "Field `MODE` reader - Mode Select"]
57pub type MODE_R = crate::FieldReader<u8, MODE_A>;
58impl MODE_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> MODE_A {
62        match self.bits {
63            0 => MODE_A::DISABLE,
64            1 => MODE_A::OVSSINGLE,
65            2 => MODE_A::EXTCLKSINGLE,
66            3 => MODE_A::EXTCLKQUAD,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `DISABLE`"]
71    #[inline(always)]
72    pub fn is_disable(&self) -> bool {
73        *self == MODE_A::DISABLE
74    }
75    #[doc = "Checks if the value of the field is `OVSSINGLE`"]
76    #[inline(always)]
77    pub fn is_ovssingle(&self) -> bool {
78        *self == MODE_A::OVSSINGLE
79    }
80    #[doc = "Checks if the value of the field is `EXTCLKSINGLE`"]
81    #[inline(always)]
82    pub fn is_extclksingle(&self) -> bool {
83        *self == MODE_A::EXTCLKSINGLE
84    }
85    #[doc = "Checks if the value of the field is `EXTCLKQUAD`"]
86    #[inline(always)]
87    pub fn is_extclkquad(&self) -> bool {
88        *self == MODE_A::EXTCLKQUAD
89    }
90}
91#[doc = "Field `MODE` writer - Mode Select"]
92pub type MODE_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, MODE_A, 2, 0>;
93impl<'a> MODE_W<'a> {
94    #[doc = "The module is disabled."]
95    #[inline(always)]
96    pub fn disable(self) -> &'a mut W {
97        self.variant(MODE_A::DISABLE)
98    }
99    #[doc = "Single input LFACLK oversampling mode (available in EM0-EM2)."]
100    #[inline(always)]
101    pub fn ovssingle(self) -> &'a mut W {
102        self.variant(MODE_A::OVSSINGLE)
103    }
104    #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."]
105    #[inline(always)]
106    pub fn extclksingle(self) -> &'a mut W {
107        self.variant(MODE_A::EXTCLKSINGLE)
108    }
109    #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."]
110    #[inline(always)]
111    pub fn extclkquad(self) -> &'a mut W {
112        self.variant(MODE_A::EXTCLKQUAD)
113    }
114}
115#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Control"]
116pub type CNTDIR_R = crate::BitReader<bool>;
117#[doc = "Field `CNTDIR` writer - Non-Quadrature Mode Counter Direction Control"]
118pub type CNTDIR_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 2>;
119#[doc = "Field `EDGE` reader - Edge Select"]
120pub type EDGE_R = crate::BitReader<bool>;
121#[doc = "Field `EDGE` writer - Edge Select"]
122pub type EDGE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 3>;
123#[doc = "Field `FILT` reader - Enable Digital Pulse Width Filter"]
124pub type FILT_R = crate::BitReader<bool>;
125#[doc = "Field `FILT` writer - Enable Digital Pulse Width Filter"]
126pub type FILT_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
127#[doc = "Field `RSTEN` reader - Enable PCNT Clock Domain Reset"]
128pub type RSTEN_R = crate::BitReader<bool>;
129#[doc = "Field `RSTEN` writer - Enable PCNT Clock Domain Reset"]
130pub type RSTEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 5>;
131#[doc = "Field `AUXCNTRSTEN` reader - Enable AUXCNT Reset"]
132pub type AUXCNTRSTEN_R = crate::BitReader<bool>;
133#[doc = "Field `AUXCNTRSTEN` writer - Enable AUXCNT Reset"]
134pub type AUXCNTRSTEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 6>;
135#[doc = "Field `HYST` reader - Enable Hysteresis"]
136pub type HYST_R = crate::BitReader<bool>;
137#[doc = "Field `HYST` writer - Enable Hysteresis"]
138pub type HYST_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 8>;
139#[doc = "Field `S1CDIR` reader - Count direction determined by S1"]
140pub type S1CDIR_R = crate::BitReader<bool>;
141#[doc = "Field `S1CDIR` writer - Count direction determined by S1"]
142pub type S1CDIR_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 9>;
143#[doc = "Controls when the counter counts\n\nValue on reset: 0"]
144#[derive(Clone, Copy, Debug, PartialEq)]
145#[repr(u8)]
146pub enum CNTEV_A {
147    #[doc = "0: Counts up on up-count and down on down-count events."]
148    BOTH = 0,
149    #[doc = "1: Only counts up on up-count events."]
150    UP = 1,
151    #[doc = "2: Only counts down on down-count events."]
152    DOWN = 2,
153    #[doc = "3: Never counts."]
154    NONE = 3,
155}
156impl From<CNTEV_A> for u8 {
157    #[inline(always)]
158    fn from(variant: CNTEV_A) -> Self {
159        variant as _
160    }
161}
162#[doc = "Field `CNTEV` reader - Controls when the counter counts"]
163pub type CNTEV_R = crate::FieldReader<u8, CNTEV_A>;
164impl CNTEV_R {
165    #[doc = "Get enumerated values variant"]
166    #[inline(always)]
167    pub fn variant(&self) -> CNTEV_A {
168        match self.bits {
169            0 => CNTEV_A::BOTH,
170            1 => CNTEV_A::UP,
171            2 => CNTEV_A::DOWN,
172            3 => CNTEV_A::NONE,
173            _ => unreachable!(),
174        }
175    }
176    #[doc = "Checks if the value of the field is `BOTH`"]
177    #[inline(always)]
178    pub fn is_both(&self) -> bool {
179        *self == CNTEV_A::BOTH
180    }
181    #[doc = "Checks if the value of the field is `UP`"]
182    #[inline(always)]
183    pub fn is_up(&self) -> bool {
184        *self == CNTEV_A::UP
185    }
186    #[doc = "Checks if the value of the field is `DOWN`"]
187    #[inline(always)]
188    pub fn is_down(&self) -> bool {
189        *self == CNTEV_A::DOWN
190    }
191    #[doc = "Checks if the value of the field is `NONE`"]
192    #[inline(always)]
193    pub fn is_none(&self) -> bool {
194        *self == CNTEV_A::NONE
195    }
196}
197#[doc = "Field `CNTEV` writer - Controls when the counter counts"]
198pub type CNTEV_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, CNTEV_A, 2, 10>;
199impl<'a> CNTEV_W<'a> {
200    #[doc = "Counts up on up-count and down on down-count events."]
201    #[inline(always)]
202    pub fn both(self) -> &'a mut W {
203        self.variant(CNTEV_A::BOTH)
204    }
205    #[doc = "Only counts up on up-count events."]
206    #[inline(always)]
207    pub fn up(self) -> &'a mut W {
208        self.variant(CNTEV_A::UP)
209    }
210    #[doc = "Only counts down on down-count events."]
211    #[inline(always)]
212    pub fn down(self) -> &'a mut W {
213        self.variant(CNTEV_A::DOWN)
214    }
215    #[doc = "Never counts."]
216    #[inline(always)]
217    pub fn none(self) -> &'a mut W {
218        self.variant(CNTEV_A::NONE)
219    }
220}
221#[doc = "Controls when the auxiliary counter counts\n\nValue on reset: 0"]
222#[derive(Clone, Copy, Debug, PartialEq)]
223#[repr(u8)]
224pub enum AUXCNTEV_A {
225    #[doc = "0: Never counts."]
226    NONE = 0,
227    #[doc = "1: Counts up on up-count events."]
228    UP = 1,
229    #[doc = "2: Counts up on down-count events."]
230    DOWN = 2,
231    #[doc = "3: Counts up on both up-count and down-count events."]
232    BOTH = 3,
233}
234impl From<AUXCNTEV_A> for u8 {
235    #[inline(always)]
236    fn from(variant: AUXCNTEV_A) -> Self {
237        variant as _
238    }
239}
240#[doc = "Field `AUXCNTEV` reader - Controls when the auxiliary counter counts"]
241pub type AUXCNTEV_R = crate::FieldReader<u8, AUXCNTEV_A>;
242impl AUXCNTEV_R {
243    #[doc = "Get enumerated values variant"]
244    #[inline(always)]
245    pub fn variant(&self) -> AUXCNTEV_A {
246        match self.bits {
247            0 => AUXCNTEV_A::NONE,
248            1 => AUXCNTEV_A::UP,
249            2 => AUXCNTEV_A::DOWN,
250            3 => AUXCNTEV_A::BOTH,
251            _ => unreachable!(),
252        }
253    }
254    #[doc = "Checks if the value of the field is `NONE`"]
255    #[inline(always)]
256    pub fn is_none(&self) -> bool {
257        *self == AUXCNTEV_A::NONE
258    }
259    #[doc = "Checks if the value of the field is `UP`"]
260    #[inline(always)]
261    pub fn is_up(&self) -> bool {
262        *self == AUXCNTEV_A::UP
263    }
264    #[doc = "Checks if the value of the field is `DOWN`"]
265    #[inline(always)]
266    pub fn is_down(&self) -> bool {
267        *self == AUXCNTEV_A::DOWN
268    }
269    #[doc = "Checks if the value of the field is `BOTH`"]
270    #[inline(always)]
271    pub fn is_both(&self) -> bool {
272        *self == AUXCNTEV_A::BOTH
273    }
274}
275#[doc = "Field `AUXCNTEV` writer - Controls when the auxiliary counter counts"]
276pub type AUXCNTEV_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, AUXCNTEV_A, 2, 14>;
277impl<'a> AUXCNTEV_W<'a> {
278    #[doc = "Never counts."]
279    #[inline(always)]
280    pub fn none(self) -> &'a mut W {
281        self.variant(AUXCNTEV_A::NONE)
282    }
283    #[doc = "Counts up on up-count events."]
284    #[inline(always)]
285    pub fn up(self) -> &'a mut W {
286        self.variant(AUXCNTEV_A::UP)
287    }
288    #[doc = "Counts up on down-count events."]
289    #[inline(always)]
290    pub fn down(self) -> &'a mut W {
291        self.variant(AUXCNTEV_A::DOWN)
292    }
293    #[doc = "Counts up on both up-count and down-count events."]
294    #[inline(always)]
295    pub fn both(self) -> &'a mut W {
296        self.variant(AUXCNTEV_A::BOTH)
297    }
298}
299#[doc = "Sets the mode for triggered compare and clear\n\nValue on reset: 0"]
300#[derive(Clone, Copy, Debug, PartialEq)]
301#[repr(u8)]
302pub enum TCCMODE_A {
303    #[doc = "0: Triggered compare and clear not enabled."]
304    DISABLED = 0,
305    #[doc = "1: Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
306    LFA = 1,
307    #[doc = "2: Compare and clear performed on positive PRS edges."]
308    PRS = 2,
309}
310impl From<TCCMODE_A> for u8 {
311    #[inline(always)]
312    fn from(variant: TCCMODE_A) -> Self {
313        variant as _
314    }
315}
316#[doc = "Field `TCCMODE` reader - Sets the mode for triggered compare and clear"]
317pub type TCCMODE_R = crate::FieldReader<u8, TCCMODE_A>;
318impl TCCMODE_R {
319    #[doc = "Get enumerated values variant"]
320    #[inline(always)]
321    pub fn variant(&self) -> Option<TCCMODE_A> {
322        match self.bits {
323            0 => Some(TCCMODE_A::DISABLED),
324            1 => Some(TCCMODE_A::LFA),
325            2 => Some(TCCMODE_A::PRS),
326            _ => None,
327        }
328    }
329    #[doc = "Checks if the value of the field is `DISABLED`"]
330    #[inline(always)]
331    pub fn is_disabled(&self) -> bool {
332        *self == TCCMODE_A::DISABLED
333    }
334    #[doc = "Checks if the value of the field is `LFA`"]
335    #[inline(always)]
336    pub fn is_lfa(&self) -> bool {
337        *self == TCCMODE_A::LFA
338    }
339    #[doc = "Checks if the value of the field is `PRS`"]
340    #[inline(always)]
341    pub fn is_prs(&self) -> bool {
342        *self == TCCMODE_A::PRS
343    }
344}
345#[doc = "Field `TCCMODE` writer - Sets the mode for triggered compare and clear"]
346pub type TCCMODE_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCMODE_A, 2, 18>;
347impl<'a> TCCMODE_W<'a> {
348    #[doc = "Triggered compare and clear not enabled."]
349    #[inline(always)]
350    pub fn disabled(self) -> &'a mut W {
351        self.variant(TCCMODE_A::DISABLED)
352    }
353    #[doc = "Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
354    #[inline(always)]
355    pub fn lfa(self) -> &'a mut W {
356        self.variant(TCCMODE_A::LFA)
357    }
358    #[doc = "Compare and clear performed on positive PRS edges."]
359    #[inline(always)]
360    pub fn prs(self) -> &'a mut W {
361        self.variant(TCCMODE_A::PRS)
362    }
363}
364#[doc = "Set the LFA prescaler for triggered compare and clear\n\nValue on reset: 0"]
365#[derive(Clone, Copy, Debug, PartialEq)]
366#[repr(u8)]
367pub enum TCCPRESC_A {
368    #[doc = "0: Compare and clear event each LFA cycle."]
369    DIV1 = 0,
370    #[doc = "1: Compare and clear performed on every other LFA cycle."]
371    DIV2 = 1,
372    #[doc = "2: Compare and clear performed on every 4th LFA cycle."]
373    DIV4 = 2,
374    #[doc = "3: Compare and clear performed on every 8th LFA cycle."]
375    DIV8 = 3,
376}
377impl From<TCCPRESC_A> for u8 {
378    #[inline(always)]
379    fn from(variant: TCCPRESC_A) -> Self {
380        variant as _
381    }
382}
383#[doc = "Field `TCCPRESC` reader - Set the LFA prescaler for triggered compare and clear"]
384pub type TCCPRESC_R = crate::FieldReader<u8, TCCPRESC_A>;
385impl TCCPRESC_R {
386    #[doc = "Get enumerated values variant"]
387    #[inline(always)]
388    pub fn variant(&self) -> TCCPRESC_A {
389        match self.bits {
390            0 => TCCPRESC_A::DIV1,
391            1 => TCCPRESC_A::DIV2,
392            2 => TCCPRESC_A::DIV4,
393            3 => TCCPRESC_A::DIV8,
394            _ => unreachable!(),
395        }
396    }
397    #[doc = "Checks if the value of the field is `DIV1`"]
398    #[inline(always)]
399    pub fn is_div1(&self) -> bool {
400        *self == TCCPRESC_A::DIV1
401    }
402    #[doc = "Checks if the value of the field is `DIV2`"]
403    #[inline(always)]
404    pub fn is_div2(&self) -> bool {
405        *self == TCCPRESC_A::DIV2
406    }
407    #[doc = "Checks if the value of the field is `DIV4`"]
408    #[inline(always)]
409    pub fn is_div4(&self) -> bool {
410        *self == TCCPRESC_A::DIV4
411    }
412    #[doc = "Checks if the value of the field is `DIV8`"]
413    #[inline(always)]
414    pub fn is_div8(&self) -> bool {
415        *self == TCCPRESC_A::DIV8
416    }
417}
418#[doc = "Field `TCCPRESC` writer - Set the LFA prescaler for triggered compare and clear"]
419pub type TCCPRESC_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, TCCPRESC_A, 2, 22>;
420impl<'a> TCCPRESC_W<'a> {
421    #[doc = "Compare and clear event each LFA cycle."]
422    #[inline(always)]
423    pub fn div1(self) -> &'a mut W {
424        self.variant(TCCPRESC_A::DIV1)
425    }
426    #[doc = "Compare and clear performed on every other LFA cycle."]
427    #[inline(always)]
428    pub fn div2(self) -> &'a mut W {
429        self.variant(TCCPRESC_A::DIV2)
430    }
431    #[doc = "Compare and clear performed on every 4th LFA cycle."]
432    #[inline(always)]
433    pub fn div4(self) -> &'a mut W {
434        self.variant(TCCPRESC_A::DIV4)
435    }
436    #[doc = "Compare and clear performed on every 8th LFA cycle."]
437    #[inline(always)]
438    pub fn div8(self) -> &'a mut W {
439        self.variant(TCCPRESC_A::DIV8)
440    }
441}
442#[doc = "Triggered compare and clear compare mode\n\nValue on reset: 0"]
443#[derive(Clone, Copy, Debug, PartialEq)]
444#[repr(u8)]
445pub enum TCCCOMP_A {
446    #[doc = "0: Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
447    LTOE = 0,
448    #[doc = "1: Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
449    GTOE = 1,
450    #[doc = "2: Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
451    RANGE = 2,
452}
453impl From<TCCCOMP_A> for u8 {
454    #[inline(always)]
455    fn from(variant: TCCCOMP_A) -> Self {
456        variant as _
457    }
458}
459#[doc = "Field `TCCCOMP` reader - Triggered compare and clear compare mode"]
460pub type TCCCOMP_R = crate::FieldReader<u8, TCCCOMP_A>;
461impl TCCCOMP_R {
462    #[doc = "Get enumerated values variant"]
463    #[inline(always)]
464    pub fn variant(&self) -> Option<TCCCOMP_A> {
465        match self.bits {
466            0 => Some(TCCCOMP_A::LTOE),
467            1 => Some(TCCCOMP_A::GTOE),
468            2 => Some(TCCCOMP_A::RANGE),
469            _ => None,
470        }
471    }
472    #[doc = "Checks if the value of the field is `LTOE`"]
473    #[inline(always)]
474    pub fn is_ltoe(&self) -> bool {
475        *self == TCCCOMP_A::LTOE
476    }
477    #[doc = "Checks if the value of the field is `GTOE`"]
478    #[inline(always)]
479    pub fn is_gtoe(&self) -> bool {
480        *self == TCCCOMP_A::GTOE
481    }
482    #[doc = "Checks if the value of the field is `RANGE`"]
483    #[inline(always)]
484    pub fn is_range(&self) -> bool {
485        *self == TCCCOMP_A::RANGE
486    }
487}
488#[doc = "Field `TCCCOMP` writer - Triggered compare and clear compare mode"]
489pub type TCCCOMP_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCCOMP_A, 2, 25>;
490impl<'a> TCCCOMP_W<'a> {
491    #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
492    #[inline(always)]
493    pub fn ltoe(self) -> &'a mut W {
494        self.variant(TCCCOMP_A::LTOE)
495    }
496    #[doc = "Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
497    #[inline(always)]
498    pub fn gtoe(self) -> &'a mut W {
499        self.variant(TCCCOMP_A::GTOE)
500    }
501    #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
502    #[inline(always)]
503    pub fn range(self) -> &'a mut W {
504        self.variant(TCCCOMP_A::RANGE)
505    }
506}
507#[doc = "Field `PRSGATEEN` reader - PRS gate enable"]
508pub type PRSGATEEN_R = crate::BitReader<bool>;
509#[doc = "Field `PRSGATEEN` writer - PRS gate enable"]
510pub type PRSGATEEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 27>;
511#[doc = "Field `TCCPRSPOL` reader - TCC PRS polarity select"]
512pub type TCCPRSPOL_R = crate::BitReader<bool>;
513#[doc = "Field `TCCPRSPOL` writer - TCC PRS polarity select"]
514pub type TCCPRSPOL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 28>;
515#[doc = "TCC PRS Channel Select\n\nValue on reset: 0"]
516#[derive(Clone, Copy, Debug, PartialEq)]
517#[repr(u8)]
518pub enum TCCPRSSEL_A {
519    #[doc = "0: PRS Channel 0 selected."]
520    PRSCH0 = 0,
521    #[doc = "1: PRS Channel 1 selected."]
522    PRSCH1 = 1,
523    #[doc = "2: PRS Channel 2 selected."]
524    PRSCH2 = 2,
525    #[doc = "3: PRS Channel 3 selected."]
526    PRSCH3 = 3,
527    #[doc = "4: PRS Channel 4 selected."]
528    PRSCH4 = 4,
529    #[doc = "5: PRS Channel 5 selected."]
530    PRSCH5 = 5,
531}
532impl From<TCCPRSSEL_A> for u8 {
533    #[inline(always)]
534    fn from(variant: TCCPRSSEL_A) -> Self {
535        variant as _
536    }
537}
538#[doc = "Field `TCCPRSSEL` reader - TCC PRS Channel Select"]
539pub type TCCPRSSEL_R = crate::FieldReader<u8, TCCPRSSEL_A>;
540impl TCCPRSSEL_R {
541    #[doc = "Get enumerated values variant"]
542    #[inline(always)]
543    pub fn variant(&self) -> Option<TCCPRSSEL_A> {
544        match self.bits {
545            0 => Some(TCCPRSSEL_A::PRSCH0),
546            1 => Some(TCCPRSSEL_A::PRSCH1),
547            2 => Some(TCCPRSSEL_A::PRSCH2),
548            3 => Some(TCCPRSSEL_A::PRSCH3),
549            4 => Some(TCCPRSSEL_A::PRSCH4),
550            5 => Some(TCCPRSSEL_A::PRSCH5),
551            _ => None,
552        }
553    }
554    #[doc = "Checks if the value of the field is `PRSCH0`"]
555    #[inline(always)]
556    pub fn is_prsch0(&self) -> bool {
557        *self == TCCPRSSEL_A::PRSCH0
558    }
559    #[doc = "Checks if the value of the field is `PRSCH1`"]
560    #[inline(always)]
561    pub fn is_prsch1(&self) -> bool {
562        *self == TCCPRSSEL_A::PRSCH1
563    }
564    #[doc = "Checks if the value of the field is `PRSCH2`"]
565    #[inline(always)]
566    pub fn is_prsch2(&self) -> bool {
567        *self == TCCPRSSEL_A::PRSCH2
568    }
569    #[doc = "Checks if the value of the field is `PRSCH3`"]
570    #[inline(always)]
571    pub fn is_prsch3(&self) -> bool {
572        *self == TCCPRSSEL_A::PRSCH3
573    }
574    #[doc = "Checks if the value of the field is `PRSCH4`"]
575    #[inline(always)]
576    pub fn is_prsch4(&self) -> bool {
577        *self == TCCPRSSEL_A::PRSCH4
578    }
579    #[doc = "Checks if the value of the field is `PRSCH5`"]
580    #[inline(always)]
581    pub fn is_prsch5(&self) -> bool {
582        *self == TCCPRSSEL_A::PRSCH5
583    }
584}
585#[doc = "Field `TCCPRSSEL` writer - TCC PRS Channel Select"]
586pub type TCCPRSSEL_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCPRSSEL_A, 3, 29>;
587impl<'a> TCCPRSSEL_W<'a> {
588    #[doc = "PRS Channel 0 selected."]
589    #[inline(always)]
590    pub fn prsch0(self) -> &'a mut W {
591        self.variant(TCCPRSSEL_A::PRSCH0)
592    }
593    #[doc = "PRS Channel 1 selected."]
594    #[inline(always)]
595    pub fn prsch1(self) -> &'a mut W {
596        self.variant(TCCPRSSEL_A::PRSCH1)
597    }
598    #[doc = "PRS Channel 2 selected."]
599    #[inline(always)]
600    pub fn prsch2(self) -> &'a mut W {
601        self.variant(TCCPRSSEL_A::PRSCH2)
602    }
603    #[doc = "PRS Channel 3 selected."]
604    #[inline(always)]
605    pub fn prsch3(self) -> &'a mut W {
606        self.variant(TCCPRSSEL_A::PRSCH3)
607    }
608    #[doc = "PRS Channel 4 selected."]
609    #[inline(always)]
610    pub fn prsch4(self) -> &'a mut W {
611        self.variant(TCCPRSSEL_A::PRSCH4)
612    }
613    #[doc = "PRS Channel 5 selected."]
614    #[inline(always)]
615    pub fn prsch5(self) -> &'a mut W {
616        self.variant(TCCPRSSEL_A::PRSCH5)
617    }
618}
619impl R {
620    #[doc = "Bits 0:1 - Mode Select"]
621    #[inline(always)]
622    pub fn mode(&self) -> MODE_R {
623        MODE_R::new((self.bits & 3) as u8)
624    }
625    #[doc = "Bit 2 - Non-Quadrature Mode Counter Direction Control"]
626    #[inline(always)]
627    pub fn cntdir(&self) -> CNTDIR_R {
628        CNTDIR_R::new(((self.bits >> 2) & 1) != 0)
629    }
630    #[doc = "Bit 3 - Edge Select"]
631    #[inline(always)]
632    pub fn edge(&self) -> EDGE_R {
633        EDGE_R::new(((self.bits >> 3) & 1) != 0)
634    }
635    #[doc = "Bit 4 - Enable Digital Pulse Width Filter"]
636    #[inline(always)]
637    pub fn filt(&self) -> FILT_R {
638        FILT_R::new(((self.bits >> 4) & 1) != 0)
639    }
640    #[doc = "Bit 5 - Enable PCNT Clock Domain Reset"]
641    #[inline(always)]
642    pub fn rsten(&self) -> RSTEN_R {
643        RSTEN_R::new(((self.bits >> 5) & 1) != 0)
644    }
645    #[doc = "Bit 6 - Enable AUXCNT Reset"]
646    #[inline(always)]
647    pub fn auxcntrsten(&self) -> AUXCNTRSTEN_R {
648        AUXCNTRSTEN_R::new(((self.bits >> 6) & 1) != 0)
649    }
650    #[doc = "Bit 8 - Enable Hysteresis"]
651    #[inline(always)]
652    pub fn hyst(&self) -> HYST_R {
653        HYST_R::new(((self.bits >> 8) & 1) != 0)
654    }
655    #[doc = "Bit 9 - Count direction determined by S1"]
656    #[inline(always)]
657    pub fn s1cdir(&self) -> S1CDIR_R {
658        S1CDIR_R::new(((self.bits >> 9) & 1) != 0)
659    }
660    #[doc = "Bits 10:11 - Controls when the counter counts"]
661    #[inline(always)]
662    pub fn cntev(&self) -> CNTEV_R {
663        CNTEV_R::new(((self.bits >> 10) & 3) as u8)
664    }
665    #[doc = "Bits 14:15 - Controls when the auxiliary counter counts"]
666    #[inline(always)]
667    pub fn auxcntev(&self) -> AUXCNTEV_R {
668        AUXCNTEV_R::new(((self.bits >> 14) & 3) as u8)
669    }
670    #[doc = "Bits 18:19 - Sets the mode for triggered compare and clear"]
671    #[inline(always)]
672    pub fn tccmode(&self) -> TCCMODE_R {
673        TCCMODE_R::new(((self.bits >> 18) & 3) as u8)
674    }
675    #[doc = "Bits 22:23 - Set the LFA prescaler for triggered compare and clear"]
676    #[inline(always)]
677    pub fn tccpresc(&self) -> TCCPRESC_R {
678        TCCPRESC_R::new(((self.bits >> 22) & 3) as u8)
679    }
680    #[doc = "Bits 25:26 - Triggered compare and clear compare mode"]
681    #[inline(always)]
682    pub fn tcccomp(&self) -> TCCCOMP_R {
683        TCCCOMP_R::new(((self.bits >> 25) & 3) as u8)
684    }
685    #[doc = "Bit 27 - PRS gate enable"]
686    #[inline(always)]
687    pub fn prsgateen(&self) -> PRSGATEEN_R {
688        PRSGATEEN_R::new(((self.bits >> 27) & 1) != 0)
689    }
690    #[doc = "Bit 28 - TCC PRS polarity select"]
691    #[inline(always)]
692    pub fn tccprspol(&self) -> TCCPRSPOL_R {
693        TCCPRSPOL_R::new(((self.bits >> 28) & 1) != 0)
694    }
695    #[doc = "Bits 29:31 - TCC PRS Channel Select"]
696    #[inline(always)]
697    pub fn tccprssel(&self) -> TCCPRSSEL_R {
698        TCCPRSSEL_R::new(((self.bits >> 29) & 7) as u8)
699    }
700}
701impl W {
702    #[doc = "Bits 0:1 - Mode Select"]
703    #[inline(always)]
704    pub fn mode(&mut self) -> MODE_W {
705        MODE_W::new(self)
706    }
707    #[doc = "Bit 2 - Non-Quadrature Mode Counter Direction Control"]
708    #[inline(always)]
709    pub fn cntdir(&mut self) -> CNTDIR_W {
710        CNTDIR_W::new(self)
711    }
712    #[doc = "Bit 3 - Edge Select"]
713    #[inline(always)]
714    pub fn edge(&mut self) -> EDGE_W {
715        EDGE_W::new(self)
716    }
717    #[doc = "Bit 4 - Enable Digital Pulse Width Filter"]
718    #[inline(always)]
719    pub fn filt(&mut self) -> FILT_W {
720        FILT_W::new(self)
721    }
722    #[doc = "Bit 5 - Enable PCNT Clock Domain Reset"]
723    #[inline(always)]
724    pub fn rsten(&mut self) -> RSTEN_W {
725        RSTEN_W::new(self)
726    }
727    #[doc = "Bit 6 - Enable AUXCNT Reset"]
728    #[inline(always)]
729    pub fn auxcntrsten(&mut self) -> AUXCNTRSTEN_W {
730        AUXCNTRSTEN_W::new(self)
731    }
732    #[doc = "Bit 8 - Enable Hysteresis"]
733    #[inline(always)]
734    pub fn hyst(&mut self) -> HYST_W {
735        HYST_W::new(self)
736    }
737    #[doc = "Bit 9 - Count direction determined by S1"]
738    #[inline(always)]
739    pub fn s1cdir(&mut self) -> S1CDIR_W {
740        S1CDIR_W::new(self)
741    }
742    #[doc = "Bits 10:11 - Controls when the counter counts"]
743    #[inline(always)]
744    pub fn cntev(&mut self) -> CNTEV_W {
745        CNTEV_W::new(self)
746    }
747    #[doc = "Bits 14:15 - Controls when the auxiliary counter counts"]
748    #[inline(always)]
749    pub fn auxcntev(&mut self) -> AUXCNTEV_W {
750        AUXCNTEV_W::new(self)
751    }
752    #[doc = "Bits 18:19 - Sets the mode for triggered compare and clear"]
753    #[inline(always)]
754    pub fn tccmode(&mut self) -> TCCMODE_W {
755        TCCMODE_W::new(self)
756    }
757    #[doc = "Bits 22:23 - Set the LFA prescaler for triggered compare and clear"]
758    #[inline(always)]
759    pub fn tccpresc(&mut self) -> TCCPRESC_W {
760        TCCPRESC_W::new(self)
761    }
762    #[doc = "Bits 25:26 - Triggered compare and clear compare mode"]
763    #[inline(always)]
764    pub fn tcccomp(&mut self) -> TCCCOMP_W {
765        TCCCOMP_W::new(self)
766    }
767    #[doc = "Bit 27 - PRS gate enable"]
768    #[inline(always)]
769    pub fn prsgateen(&mut self) -> PRSGATEEN_W {
770        PRSGATEEN_W::new(self)
771    }
772    #[doc = "Bit 28 - TCC PRS polarity select"]
773    #[inline(always)]
774    pub fn tccprspol(&mut self) -> TCCPRSPOL_W {
775        TCCPRSPOL_W::new(self)
776    }
777    #[doc = "Bits 29:31 - TCC PRS Channel Select"]
778    #[inline(always)]
779    pub fn tccprssel(&mut self) -> TCCPRSSEL_W {
780        TCCPRSSEL_W::new(self)
781    }
782    #[doc = "Writes raw bits to the register."]
783    #[inline(always)]
784    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
785        self.0.bits(bits);
786        self
787    }
788}
789#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
790pub struct CTRL_SPEC;
791impl crate::RegisterSpec for CTRL_SPEC {
792    type Ux = u32;
793}
794#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
795impl crate::Readable for CTRL_SPEC {
796    type Reader = R;
797}
798#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
799impl crate::Writable for CTRL_SPEC {
800    type Writer = W;
801}
802#[doc = "`reset()` method sets CTRL to value 0"]
803impl crate::Resettable for CTRL_SPEC {
804    #[inline(always)]
805    fn reset_value() -> Self::Ux {
806        0
807    }
808}
efm32hg310_pac/pcnt0/ctrl.rs

efm32hg310_pac/pcnt0/
ctrl.rs
