efm32hg310_pac/idac0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - Current DAC Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Current DAC Enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 0>;
41#[doc = "Field `CURSINK` reader - Current Sink Enable"]
42pub type CURSINK_R = crate::BitReader<bool>;
43#[doc = "Field `CURSINK` writer - Current Sink Enable"]
44pub type CURSINK_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 1>;
45#[doc = "Field `MINOUTTRANS` reader - Minimum Output Transition Enable"]
46pub type MINOUTTRANS_R = crate::BitReader<bool>;
47#[doc = "Field `MINOUTTRANS` writer - Minimum Output Transition Enable"]
48pub type MINOUTTRANS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 2>;
49#[doc = "Field `OUTEN` reader - Output Enable"]
50pub type OUTEN_R = crate::BitReader<bool>;
51#[doc = "Field `OUTEN` writer - Output Enable"]
52pub type OUTEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 3>;
53#[doc = "Field `OUTMODE` reader - Output Modes"]
54pub type OUTMODE_R = crate::BitReader<bool>;
55#[doc = "Field `OUTMODE` writer - Output Modes"]
56pub type OUTMODE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
57#[doc = "Field `OUTENPRS` reader - PRS Controlled Output Enable"]
58pub type OUTENPRS_R = crate::BitReader<bool>;
59#[doc = "Field `OUTENPRS` writer - PRS Controlled Output Enable"]
60pub type OUTENPRS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 18>;
61#[doc = "IDAC Output PRS channnel Select\n\nValue on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq)]
63#[repr(u8)]
64pub enum PRSSEL_A {
65    #[doc = "0: PRS Channel 0 selected."]
66    PRSCH0 = 0,
67    #[doc = "1: PRS Channel 1 selected."]
68    PRSCH1 = 1,
69    #[doc = "2: PRS Channel 2 selected."]
70    PRSCH2 = 2,
71    #[doc = "3: PRS Channel 3 selected."]
72    PRSCH3 = 3,
73    #[doc = "4: PRS Channel 4 selected."]
74    PRSCH4 = 4,
75    #[doc = "5: PRS Channel 5 selected."]
76    PRSCH5 = 5,
77}
78impl From<PRSSEL_A> for u8 {
79    #[inline(always)]
80    fn from(variant: PRSSEL_A) -> Self {
81        variant as _
82    }
83}
84#[doc = "Field `PRSSEL` reader - IDAC Output PRS channnel Select"]
85pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
86impl PRSSEL_R {
87    #[doc = "Get enumerated values variant"]
88    #[inline(always)]
89    pub fn variant(&self) -> Option<PRSSEL_A> {
90        match self.bits {
91            0 => Some(PRSSEL_A::PRSCH0),
92            1 => Some(PRSSEL_A::PRSCH1),
93            2 => Some(PRSSEL_A::PRSCH2),
94            3 => Some(PRSSEL_A::PRSCH3),
95            4 => Some(PRSSEL_A::PRSCH4),
96            5 => Some(PRSSEL_A::PRSCH5),
97            _ => None,
98        }
99    }
100    #[doc = "Checks if the value of the field is `PRSCH0`"]
101    #[inline(always)]
102    pub fn is_prsch0(&self) -> bool {
103        *self == PRSSEL_A::PRSCH0
104    }
105    #[doc = "Checks if the value of the field is `PRSCH1`"]
106    #[inline(always)]
107    pub fn is_prsch1(&self) -> bool {
108        *self == PRSSEL_A::PRSCH1
109    }
110    #[doc = "Checks if the value of the field is `PRSCH2`"]
111    #[inline(always)]
112    pub fn is_prsch2(&self) -> bool {
113        *self == PRSSEL_A::PRSCH2
114    }
115    #[doc = "Checks if the value of the field is `PRSCH3`"]
116    #[inline(always)]
117    pub fn is_prsch3(&self) -> bool {
118        *self == PRSSEL_A::PRSCH3
119    }
120    #[doc = "Checks if the value of the field is `PRSCH4`"]
121    #[inline(always)]
122    pub fn is_prsch4(&self) -> bool {
123        *self == PRSSEL_A::PRSCH4
124    }
125    #[doc = "Checks if the value of the field is `PRSCH5`"]
126    #[inline(always)]
127    pub fn is_prsch5(&self) -> bool {
128        *self == PRSSEL_A::PRSCH5
129    }
130}
131#[doc = "Field `PRSSEL` writer - IDAC Output PRS channnel Select"]
132pub type PRSSEL_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRSSEL_A, 3, 20>;
133impl<'a> PRSSEL_W<'a> {
134    #[doc = "PRS Channel 0 selected."]
135    #[inline(always)]
136    pub fn prsch0(self) -> &'a mut W {
137        self.variant(PRSSEL_A::PRSCH0)
138    }
139    #[doc = "PRS Channel 1 selected."]
140    #[inline(always)]
141    pub fn prsch1(self) -> &'a mut W {
142        self.variant(PRSSEL_A::PRSCH1)
143    }
144    #[doc = "PRS Channel 2 selected."]
145    #[inline(always)]
146    pub fn prsch2(self) -> &'a mut W {
147        self.variant(PRSSEL_A::PRSCH2)
148    }
149    #[doc = "PRS Channel 3 selected."]
150    #[inline(always)]
151    pub fn prsch3(self) -> &'a mut W {
152        self.variant(PRSSEL_A::PRSCH3)
153    }
154    #[doc = "PRS Channel 4 selected."]
155    #[inline(always)]
156    pub fn prsch4(self) -> &'a mut W {
157        self.variant(PRSSEL_A::PRSCH4)
158    }
159    #[doc = "PRS Channel 5 selected."]
160    #[inline(always)]
161    pub fn prsch5(self) -> &'a mut W {
162        self.variant(PRSSEL_A::PRSCH5)
163    }
164}
165impl R {
166    #[doc = "Bit 0 - Current DAC Enable"]
167    #[inline(always)]
168    pub fn en(&self) -> EN_R {
169        EN_R::new((self.bits & 1) != 0)
170    }
171    #[doc = "Bit 1 - Current Sink Enable"]
172    #[inline(always)]
173    pub fn cursink(&self) -> CURSINK_R {
174        CURSINK_R::new(((self.bits >> 1) & 1) != 0)
175    }
176    #[doc = "Bit 2 - Minimum Output Transition Enable"]
177    #[inline(always)]
178    pub fn minouttrans(&self) -> MINOUTTRANS_R {
179        MINOUTTRANS_R::new(((self.bits >> 2) & 1) != 0)
180    }
181    #[doc = "Bit 3 - Output Enable"]
182    #[inline(always)]
183    pub fn outen(&self) -> OUTEN_R {
184        OUTEN_R::new(((self.bits >> 3) & 1) != 0)
185    }
186    #[doc = "Bit 4 - Output Modes"]
187    #[inline(always)]
188    pub fn outmode(&self) -> OUTMODE_R {
189        OUTMODE_R::new(((self.bits >> 4) & 1) != 0)
190    }
191    #[doc = "Bit 18 - PRS Controlled Output Enable"]
192    #[inline(always)]
193    pub fn outenprs(&self) -> OUTENPRS_R {
194        OUTENPRS_R::new(((self.bits >> 18) & 1) != 0)
195    }
196    #[doc = "Bits 20:22 - IDAC Output PRS channnel Select"]
197    #[inline(always)]
198    pub fn prssel(&self) -> PRSSEL_R {
199        PRSSEL_R::new(((self.bits >> 20) & 7) as u8)
200    }
201}
202impl W {
203    #[doc = "Bit 0 - Current DAC Enable"]
204    #[inline(always)]
205    pub fn en(&mut self) -> EN_W {
206        EN_W::new(self)
207    }
208    #[doc = "Bit 1 - Current Sink Enable"]
209    #[inline(always)]
210    pub fn cursink(&mut self) -> CURSINK_W {
211        CURSINK_W::new(self)
212    }
213    #[doc = "Bit 2 - Minimum Output Transition Enable"]
214    #[inline(always)]
215    pub fn minouttrans(&mut self) -> MINOUTTRANS_W {
216        MINOUTTRANS_W::new(self)
217    }
218    #[doc = "Bit 3 - Output Enable"]
219    #[inline(always)]
220    pub fn outen(&mut self) -> OUTEN_W {
221        OUTEN_W::new(self)
222    }
223    #[doc = "Bit 4 - Output Modes"]
224    #[inline(always)]
225    pub fn outmode(&mut self) -> OUTMODE_W {
226        OUTMODE_W::new(self)
227    }
228    #[doc = "Bit 18 - PRS Controlled Output Enable"]
229    #[inline(always)]
230    pub fn outenprs(&mut self) -> OUTENPRS_W {
231        OUTENPRS_W::new(self)
232    }
233    #[doc = "Bits 20:22 - IDAC Output PRS channnel Select"]
234    #[inline(always)]
235    pub fn prssel(&mut self) -> PRSSEL_W {
236        PRSSEL_W::new(self)
237    }
238    #[doc = "Writes raw bits to the register."]
239    #[inline(always)]
240    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
241        self.0.bits(bits);
242        self
243    }
244}
245#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
246pub struct CTRL_SPEC;
247impl crate::RegisterSpec for CTRL_SPEC {
248    type Ux = u32;
249}
250#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
251impl crate::Readable for CTRL_SPEC {
252    type Reader = R;
253}
254#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
255impl crate::Writable for CTRL_SPEC {
256    type Writer = W;
257}
258#[doc = "`reset()` method sets CTRL to value 0"]
259impl crate::Resettable for CTRL_SPEC {
260    #[inline(always)]
261    fn reset_value() -> Self::Ux {
262        0
263    }
264}
efm32hg310_pac/idac0/ctrl.rs

efm32hg310_pac/idac0/
ctrl.rs
