#[doc = "Reader of register CC2_CTRL"]
pub type R = crate::R<u32, super::CC2_CTRL>;
#[doc = "Writer for register CC2_CTRL"]
pub type W = crate::W<u32, super::CC2_CTRL>;
#[doc = "Register CC2_CTRL `reset()`'s with value 0"]
impl crate::ResetValue for super::CC2_CTRL {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "CC Channel Mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MODE_A {
#[doc = "0: Compare/Capture channel turned off"]
OFF,
#[doc = "1: Input capture"]
INPUTCAPTURE,
#[doc = "2: Output compare"]
OUTPUTCOMPARE,
#[doc = "3: Pulse-Width Modulation"]
PWM,
}
impl From<MODE_A> for u8 {
#[inline(always)]
fn from(variant: MODE_A) -> Self {
match variant {
MODE_A::OFF => 0,
MODE_A::INPUTCAPTURE => 1,
MODE_A::OUTPUTCOMPARE => 2,
MODE_A::PWM => 3,
}
}
}
#[doc = "Reader of field `MODE`"]
pub type MODE_R = crate::R<u8, MODE_A>;
impl MODE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> MODE_A {
match self.bits {
0 => MODE_A::OFF,
1 => MODE_A::INPUTCAPTURE,
2 => MODE_A::OUTPUTCOMPARE,
3 => MODE_A::PWM,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `OFF`"]
#[inline(always)]
pub fn is_off(&self) -> bool {
*self == MODE_A::OFF
}
#[doc = "Checks if the value of the field is `INPUTCAPTURE`"]
#[inline(always)]
pub fn is_inputcapture(&self) -> bool {
*self == MODE_A::INPUTCAPTURE
}
#[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"]
#[inline(always)]
pub fn is_outputcompare(&self) -> bool {
*self == MODE_A::OUTPUTCOMPARE
}
#[doc = "Checks if the value of the field is `PWM`"]
#[inline(always)]
pub fn is_pwm(&self) -> bool {
*self == MODE_A::PWM
}
}
#[doc = "Write proxy for field `MODE`"]
pub struct MODE_W<'a> {
w: &'a mut W,
}
impl<'a> MODE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: MODE_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "Compare/Capture channel turned off"]
#[inline(always)]
pub fn off(self) -> &'a mut W {
self.variant(MODE_A::OFF)
}
#[doc = "Input capture"]
#[inline(always)]
pub fn inputcapture(self) -> &'a mut W {
self.variant(MODE_A::INPUTCAPTURE)
}
#[doc = "Output compare"]
#[inline(always)]
pub fn outputcompare(self) -> &'a mut W {
self.variant(MODE_A::OUTPUTCOMPARE)
}
#[doc = "Pulse-Width Modulation"]
#[inline(always)]
pub fn pwm(self) -> &'a mut W {
self.variant(MODE_A::PWM)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
self.w
}
}
#[doc = "Reader of field `OUTINV`"]
pub type OUTINV_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `OUTINV`"]
pub struct OUTINV_W<'a> {
w: &'a mut W,
}
impl<'a> OUTINV_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Reader of field `COIST`"]
pub type COIST_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `COIST`"]
pub struct COIST_W<'a> {
w: &'a mut W,
}
impl<'a> COIST_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "Compare Match Output Action\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CMOA_A {
#[doc = "0: No action on compare match"]
NONE,
#[doc = "1: Toggle output on compare match"]
TOGGLE,
#[doc = "2: Clear output on compare match"]
CLEAR,
#[doc = "3: Set output on compare match"]
SET,
}
impl From<CMOA_A> for u8 {
#[inline(always)]
fn from(variant: CMOA_A) -> Self {
match variant {
CMOA_A::NONE => 0,
CMOA_A::TOGGLE => 1,
CMOA_A::CLEAR => 2,
CMOA_A::SET => 3,
}
}
}
#[doc = "Reader of field `CMOA`"]
pub type CMOA_R = crate::R<u8, CMOA_A>;
impl CMOA_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CMOA_A {
match self.bits {
0 => CMOA_A::NONE,
1 => CMOA_A::TOGGLE,
2 => CMOA_A::CLEAR,
3 => CMOA_A::SET,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `NONE`"]
#[inline(always)]
pub fn is_none(&self) -> bool {
*self == CMOA_A::NONE
}
#[doc = "Checks if the value of the field is `TOGGLE`"]
#[inline(always)]
pub fn is_toggle(&self) -> bool {
*self == CMOA_A::TOGGLE
}
#[doc = "Checks if the value of the field is `CLEAR`"]
#[inline(always)]
pub fn is_clear(&self) -> bool {
*self == CMOA_A::CLEAR
}
#[doc = "Checks if the value of the field is `SET`"]
#[inline(always)]
pub fn is_set(&self) -> bool {
*self == CMOA_A::SET
}
}
#[doc = "Write proxy for field `CMOA`"]
pub struct CMOA_W<'a> {
w: &'a mut W,
}
impl<'a> CMOA_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CMOA_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "No action on compare match"]
#[inline(always)]
pub fn none(self) -> &'a mut W {
self.variant(CMOA_A::NONE)
}
#[doc = "Toggle output on compare match"]
#[inline(always)]
pub fn toggle(self) -> &'a mut W {
self.variant(CMOA_A::TOGGLE)
}
#[doc = "Clear output on compare match"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(CMOA_A::CLEAR)
}
#[doc = "Set output on compare match"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(CMOA_A::SET)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
self.w
}
}
#[doc = "Counter Overflow Output Action\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum COFOA_A {
#[doc = "0: No action on counter overflow"]
NONE,
#[doc = "1: Toggle output on counter overflow"]
TOGGLE,
#[doc = "2: Clear output on counter overflow"]
CLEAR,
#[doc = "3: Set output on counter overflow"]
SET,
}
impl From<COFOA_A> for u8 {
#[inline(always)]
fn from(variant: COFOA_A) -> Self {
match variant {
COFOA_A::NONE => 0,
COFOA_A::TOGGLE => 1,
COFOA_A::CLEAR => 2,
COFOA_A::SET => 3,
}
}
}
#[doc = "Reader of field `COFOA`"]
pub type COFOA_R = crate::R<u8, COFOA_A>;
impl COFOA_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> COFOA_A {
match self.bits {
0 => COFOA_A::NONE,
1 => COFOA_A::TOGGLE,
2 => COFOA_A::CLEAR,
3 => COFOA_A::SET,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `NONE`"]
#[inline(always)]
pub fn is_none(&self) -> bool {
*self == COFOA_A::NONE
}
#[doc = "Checks if the value of the field is `TOGGLE`"]
#[inline(always)]
pub fn is_toggle(&self) -> bool {
*self == COFOA_A::TOGGLE
}
#[doc = "Checks if the value of the field is `CLEAR`"]
#[inline(always)]
pub fn is_clear(&self) -> bool {
*self == COFOA_A::CLEAR
}
#[doc = "Checks if the value of the field is `SET`"]
#[inline(always)]
pub fn is_set(&self) -> bool {
*self == COFOA_A::SET
}
}
#[doc = "Write proxy for field `COFOA`"]
pub struct COFOA_W<'a> {
w: &'a mut W,
}
impl<'a> COFOA_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: COFOA_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "No action on counter overflow"]
#[inline(always)]
pub fn none(self) -> &'a mut W {
self.variant(COFOA_A::NONE)
}
#[doc = "Toggle output on counter overflow"]
#[inline(always)]
pub fn toggle(self) -> &'a mut W {
self.variant(COFOA_A::TOGGLE)
}
#[doc = "Clear output on counter overflow"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(COFOA_A::CLEAR)
}
#[doc = "Set output on counter overflow"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(COFOA_A::SET)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10);
self.w
}
}
#[doc = "Counter Underflow Output Action\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CUFOA_A {
#[doc = "0: No action on counter underflow"]
NONE,
#[doc = "1: Toggle output on counter underflow"]
TOGGLE,
#[doc = "2: Clear output on counter underflow"]
CLEAR,
#[doc = "3: Set output on counter underflow"]
SET,
}
impl From<CUFOA_A> for u8 {
#[inline(always)]
fn from(variant: CUFOA_A) -> Self {
match variant {
CUFOA_A::NONE => 0,
CUFOA_A::TOGGLE => 1,
CUFOA_A::CLEAR => 2,
CUFOA_A::SET => 3,
}
}
}
#[doc = "Reader of field `CUFOA`"]
pub type CUFOA_R = crate::R<u8, CUFOA_A>;
impl CUFOA_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CUFOA_A {
match self.bits {
0 => CUFOA_A::NONE,
1 => CUFOA_A::TOGGLE,
2 => CUFOA_A::CLEAR,
3 => CUFOA_A::SET,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `NONE`"]
#[inline(always)]
pub fn is_none(&self) -> bool {
*self == CUFOA_A::NONE
}
#[doc = "Checks if the value of the field is `TOGGLE`"]
#[inline(always)]
pub fn is_toggle(&self) -> bool {
*self == CUFOA_A::TOGGLE
}
#[doc = "Checks if the value of the field is `CLEAR`"]
#[inline(always)]
pub fn is_clear(&self) -> bool {
*self == CUFOA_A::CLEAR
}
#[doc = "Checks if the value of the field is `SET`"]
#[inline(always)]
pub fn is_set(&self) -> bool {
*self == CUFOA_A::SET
}
}
#[doc = "Write proxy for field `CUFOA`"]
pub struct CUFOA_W<'a> {
w: &'a mut W,
}
impl<'a> CUFOA_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CUFOA_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "No action on counter underflow"]
#[inline(always)]
pub fn none(self) -> &'a mut W {
self.variant(CUFOA_A::NONE)
}
#[doc = "Toggle output on counter underflow"]
#[inline(always)]
pub fn toggle(self) -> &'a mut W {
self.variant(CUFOA_A::TOGGLE)
}
#[doc = "Clear output on counter underflow"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(CUFOA_A::CLEAR)
}
#[doc = "Set output on counter underflow"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(CUFOA_A::SET)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12);
self.w
}
}
#[doc = "Compare/Capture Channel PRS Input Channel Selection\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PRSSEL_A {
#[doc = "0: PRS Channel 0 selected as input"]
PRSCH0,
#[doc = "1: PRS Channel 1 selected as input"]
PRSCH1,
#[doc = "2: PRS Channel 2 selected as input"]
PRSCH2,
#[doc = "3: PRS Channel 3 selected as input"]
PRSCH3,
#[doc = "4: PRS Channel 4 selected as input"]
PRSCH4,
#[doc = "5: PRS Channel 5 selected as input"]
PRSCH5,
}
impl From<PRSSEL_A> for u8 {
#[inline(always)]
fn from(variant: PRSSEL_A) -> Self {
match variant {
PRSSEL_A::PRSCH0 => 0,
PRSSEL_A::PRSCH1 => 1,
PRSSEL_A::PRSCH2 => 2,
PRSSEL_A::PRSCH3 => 3,
PRSSEL_A::PRSCH4 => 4,
PRSSEL_A::PRSCH5 => 5,
}
}
}
#[doc = "Reader of field `PRSSEL`"]
pub type PRSSEL_R = crate::R<u8, PRSSEL_A>;
impl PRSSEL_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<u8, PRSSEL_A> {
use crate::Variant::*;
match self.bits {
0 => Val(PRSSEL_A::PRSCH0),
1 => Val(PRSSEL_A::PRSCH1),
2 => Val(PRSSEL_A::PRSCH2),
3 => Val(PRSSEL_A::PRSCH3),
4 => Val(PRSSEL_A::PRSCH4),
5 => Val(PRSSEL_A::PRSCH5),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `PRSCH0`"]
#[inline(always)]
pub fn is_prsch0(&self) -> bool {
*self == PRSSEL_A::PRSCH0
}
#[doc = "Checks if the value of the field is `PRSCH1`"]
#[inline(always)]
pub fn is_prsch1(&self) -> bool {
*self == PRSSEL_A::PRSCH1
}
#[doc = "Checks if the value of the field is `PRSCH2`"]
#[inline(always)]
pub fn is_prsch2(&self) -> bool {
*self == PRSSEL_A::PRSCH2
}
#[doc = "Checks if the value of the field is `PRSCH3`"]
#[inline(always)]
pub fn is_prsch3(&self) -> bool {
*self == PRSSEL_A::PRSCH3
}
#[doc = "Checks if the value of the field is `PRSCH4`"]
#[inline(always)]
pub fn is_prsch4(&self) -> bool {
*self == PRSSEL_A::PRSCH4
}
#[doc = "Checks if the value of the field is `PRSCH5`"]
#[inline(always)]
pub fn is_prsch5(&self) -> bool {
*self == PRSSEL_A::PRSCH5
}
}
#[doc = "Write proxy for field `PRSSEL`"]
pub struct PRSSEL_W<'a> {
w: &'a mut W,
}
impl<'a> PRSSEL_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PRSSEL_A) -> &'a mut W {
unsafe { self.bits(variant.into()) }
}
#[doc = "PRS Channel 0 selected as input"]
#[inline(always)]
pub fn prsch0(self) -> &'a mut W {
self.variant(PRSSEL_A::PRSCH0)
}
#[doc = "PRS Channel 1 selected as input"]
#[inline(always)]
pub fn prsch1(self) -> &'a mut W {
self.variant(PRSSEL_A::PRSCH1)
}
#[doc = "PRS Channel 2 selected as input"]
#[inline(always)]
pub fn prsch2(self) -> &'a mut W {
self.variant(PRSSEL_A::PRSCH2)
}
#[doc = "PRS Channel 3 selected as input"]
#[inline(always)]
pub fn prsch3(self) -> &'a mut W {
self.variant(PRSSEL_A::PRSCH3)
}
#[doc = "PRS Channel 4 selected as input"]
#[inline(always)]
pub fn prsch4(self) -> &'a mut W {
self.variant(PRSSEL_A::PRSCH4)
}
#[doc = "PRS Channel 5 selected as input"]
#[inline(always)]
pub fn prsch5(self) -> &'a mut W {
self.variant(PRSSEL_A::PRSCH5)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x07 << 16)) | (((value as u32) & 0x07) << 16);
self.w
}
}
#[doc = "Reader of field `INSEL`"]
pub type INSEL_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `INSEL`"]
pub struct INSEL_W<'a> {
w: &'a mut W,
}
impl<'a> INSEL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
self.w
}
}
#[doc = "Reader of field `FILT`"]
pub type FILT_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `FILT`"]
pub struct FILT_W<'a> {
w: &'a mut W,
}
impl<'a> FILT_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
self.w
}
}
#[doc = "Input Capture Edge Select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ICEDGE_A {
#[doc = "0: Rising edges detected"]
RISING,
#[doc = "1: Falling edges detected"]
FALLING,
#[doc = "2: Both edges detected"]
BOTH,
#[doc = "3: No edge detection, signal is left as it is"]
NONE,
}
impl From<ICEDGE_A> for u8 {
#[inline(always)]
fn from(variant: ICEDGE_A) -> Self {
match variant {
ICEDGE_A::RISING => 0,
ICEDGE_A::FALLING => 1,
ICEDGE_A::BOTH => 2,
ICEDGE_A::NONE => 3,
}
}
}
#[doc = "Reader of field `ICEDGE`"]
pub type ICEDGE_R = crate::R<u8, ICEDGE_A>;
impl ICEDGE_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ICEDGE_A {
match self.bits {
0 => ICEDGE_A::RISING,
1 => ICEDGE_A::FALLING,
2 => ICEDGE_A::BOTH,
3 => ICEDGE_A::NONE,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `RISING`"]
#[inline(always)]
pub fn is_rising(&self) -> bool {
*self == ICEDGE_A::RISING
}
#[doc = "Checks if the value of the field is `FALLING`"]
#[inline(always)]
pub fn is_falling(&self) -> bool {
*self == ICEDGE_A::FALLING
}
#[doc = "Checks if the value of the field is `BOTH`"]
#[inline(always)]
pub fn is_both(&self) -> bool {
*self == ICEDGE_A::BOTH
}
#[doc = "Checks if the value of the field is `NONE`"]
#[inline(always)]
pub fn is_none(&self) -> bool {
*self == ICEDGE_A::NONE
}
}
#[doc = "Write proxy for field `ICEDGE`"]
pub struct ICEDGE_W<'a> {
w: &'a mut W,
}
impl<'a> ICEDGE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ICEDGE_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "Rising edges detected"]
#[inline(always)]
pub fn rising(self) -> &'a mut W {
self.variant(ICEDGE_A::RISING)
}
#[doc = "Falling edges detected"]
#[inline(always)]
pub fn falling(self) -> &'a mut W {
self.variant(ICEDGE_A::FALLING)
}
#[doc = "Both edges detected"]
#[inline(always)]
pub fn both(self) -> &'a mut W {
self.variant(ICEDGE_A::BOTH)
}
#[doc = "No edge detection, signal is left as it is"]
#[inline(always)]
pub fn none(self) -> &'a mut W {
self.variant(ICEDGE_A::NONE)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 24)) | (((value as u32) & 0x03) << 24);
self.w
}
}
#[doc = "Input Capture Event Control\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ICEVCTRL_A {
#[doc = "0: PRS output pulse, interrupt flag and DMA request set on every capture"]
EVERYEDGE,
#[doc = "1: PRS output pulse, interrupt flag and DMA request set on every second capture"]
EVERYSECONDEDGE,
#[doc = "2: PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)"]
RISING,
#[doc = "3: PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)"]
FALLING,
}
impl From<ICEVCTRL_A> for u8 {
#[inline(always)]
fn from(variant: ICEVCTRL_A) -> Self {
match variant {
ICEVCTRL_A::EVERYEDGE => 0,
ICEVCTRL_A::EVERYSECONDEDGE => 1,
ICEVCTRL_A::RISING => 2,
ICEVCTRL_A::FALLING => 3,
}
}
}
#[doc = "Reader of field `ICEVCTRL`"]
pub type ICEVCTRL_R = crate::R<u8, ICEVCTRL_A>;
impl ICEVCTRL_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ICEVCTRL_A {
match self.bits {
0 => ICEVCTRL_A::EVERYEDGE,
1 => ICEVCTRL_A::EVERYSECONDEDGE,
2 => ICEVCTRL_A::RISING,
3 => ICEVCTRL_A::FALLING,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `EVERYEDGE`"]
#[inline(always)]
pub fn is_everyedge(&self) -> bool {
*self == ICEVCTRL_A::EVERYEDGE
}
#[doc = "Checks if the value of the field is `EVERYSECONDEDGE`"]
#[inline(always)]
pub fn is_everysecondedge(&self) -> bool {
*self == ICEVCTRL_A::EVERYSECONDEDGE
}
#[doc = "Checks if the value of the field is `RISING`"]
#[inline(always)]
pub fn is_rising(&self) -> bool {
*self == ICEVCTRL_A::RISING
}
#[doc = "Checks if the value of the field is `FALLING`"]
#[inline(always)]
pub fn is_falling(&self) -> bool {
*self == ICEVCTRL_A::FALLING
}
}
#[doc = "Write proxy for field `ICEVCTRL`"]
pub struct ICEVCTRL_W<'a> {
w: &'a mut W,
}
impl<'a> ICEVCTRL_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ICEVCTRL_A) -> &'a mut W {
{
self.bits(variant.into())
}
}
#[doc = "PRS output pulse, interrupt flag and DMA request set on every capture"]
#[inline(always)]
pub fn everyedge(self) -> &'a mut W {
self.variant(ICEVCTRL_A::EVERYEDGE)
}
#[doc = "PRS output pulse, interrupt flag and DMA request set on every second capture"]
#[inline(always)]
pub fn everysecondedge(self) -> &'a mut W {
self.variant(ICEVCTRL_A::EVERYSECONDEDGE)
}
#[doc = "PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH)"]
#[inline(always)]
pub fn rising(self) -> &'a mut W {
self.variant(ICEVCTRL_A::RISING)
}
#[doc = "PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH)"]
#[inline(always)]
pub fn falling(self) -> &'a mut W {
self.variant(ICEVCTRL_A::FALLING)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 26)) | (((value as u32) & 0x03) << 26);
self.w
}
}
#[doc = "Reader of field `PRSCONF`"]
pub type PRSCONF_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `PRSCONF`"]
pub struct PRSCONF_W<'a> {
w: &'a mut W,
}
impl<'a> PRSCONF_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
self.w
}
}
impl R {
#[doc = "Bits 0:1 - CC Channel Mode"]
#[inline(always)]
pub fn mode(&self) -> MODE_R {
MODE_R::new((self.bits & 0x03) as u8)
}
#[doc = "Bit 2 - Output Invert"]
#[inline(always)]
pub fn outinv(&self) -> OUTINV_R {
OUTINV_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 4 - Compare Output Initial State"]
#[inline(always)]
pub fn coist(&self) -> COIST_R {
COIST_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bits 8:9 - Compare Match Output Action"]
#[inline(always)]
pub fn cmoa(&self) -> CMOA_R {
CMOA_R::new(((self.bits >> 8) & 0x03) as u8)
}
#[doc = "Bits 10:11 - Counter Overflow Output Action"]
#[inline(always)]
pub fn cofoa(&self) -> COFOA_R {
COFOA_R::new(((self.bits >> 10) & 0x03) as u8)
}
#[doc = "Bits 12:13 - Counter Underflow Output Action"]
#[inline(always)]
pub fn cufoa(&self) -> CUFOA_R {
CUFOA_R::new(((self.bits >> 12) & 0x03) as u8)
}
#[doc = "Bits 16:18 - Compare/Capture Channel PRS Input Channel Selection"]
#[inline(always)]
pub fn prssel(&self) -> PRSSEL_R {
PRSSEL_R::new(((self.bits >> 16) & 0x07) as u8)
}
#[doc = "Bit 20 - Input Selection"]
#[inline(always)]
pub fn insel(&self) -> INSEL_R {
INSEL_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 21 - Digital Filter"]
#[inline(always)]
pub fn filt(&self) -> FILT_R {
FILT_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bits 24:25 - Input Capture Edge Select"]
#[inline(always)]
pub fn icedge(&self) -> ICEDGE_R {
ICEDGE_R::new(((self.bits >> 24) & 0x03) as u8)
}
#[doc = "Bits 26:27 - Input Capture Event Control"]
#[inline(always)]
pub fn icevctrl(&self) -> ICEVCTRL_R {
ICEVCTRL_R::new(((self.bits >> 26) & 0x03) as u8)
}
#[doc = "Bit 28 - PRS Configuration"]
#[inline(always)]
pub fn prsconf(&self) -> PRSCONF_R {
PRSCONF_R::new(((self.bits >> 28) & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 0:1 - CC Channel Mode"]
#[inline(always)]
pub fn mode(&mut self) -> MODE_W {
MODE_W { w: self }
}
#[doc = "Bit 2 - Output Invert"]
#[inline(always)]
pub fn outinv(&mut self) -> OUTINV_W {
OUTINV_W { w: self }
}
#[doc = "Bit 4 - Compare Output Initial State"]
#[inline(always)]
pub fn coist(&mut self) -> COIST_W {
COIST_W { w: self }
}
#[doc = "Bits 8:9 - Compare Match Output Action"]
#[inline(always)]
pub fn cmoa(&mut self) -> CMOA_W {
CMOA_W { w: self }
}
#[doc = "Bits 10:11 - Counter Overflow Output Action"]
#[inline(always)]
pub fn cofoa(&mut self) -> COFOA_W {
COFOA_W { w: self }
}
#[doc = "Bits 12:13 - Counter Underflow Output Action"]
#[inline(always)]
pub fn cufoa(&mut self) -> CUFOA_W {
CUFOA_W { w: self }
}
#[doc = "Bits 16:18 - Compare/Capture Channel PRS Input Channel Selection"]
#[inline(always)]
pub fn prssel(&mut self) -> PRSSEL_W {
PRSSEL_W { w: self }
}
#[doc = "Bit 20 - Input Selection"]
#[inline(always)]
pub fn insel(&mut self) -> INSEL_W {
INSEL_W { w: self }
}
#[doc = "Bit 21 - Digital Filter"]
#[inline(always)]
pub fn filt(&mut self) -> FILT_W {
FILT_W { w: self }
}
#[doc = "Bits 24:25 - Input Capture Edge Select"]
#[inline(always)]
pub fn icedge(&mut self) -> ICEDGE_W {
ICEDGE_W { w: self }
}
#[doc = "Bits 26:27 - Input Capture Event Control"]
#[inline(always)]
pub fn icevctrl(&mut self) -> ICEVCTRL_W {
ICEVCTRL_W { w: self }
}
#[doc = "Bit 28 - PRS Configuration"]
#[inline(always)]
pub fn prsconf(&mut self) -> PRSCONF_W {
PRSCONF_W { w: self }
}
}