[−][src]Struct efm32hg309f64::dma::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub status: STATUS,
    pub config: CONFIG,
    pub ctrlbase: CTRLBASE,
    pub altctrlbase: ALTCTRLBASE,
    pub chwaitstatus: CHWAITSTATUS,
    pub chswreq: CHSWREQ,
    pub chusebursts: CHUSEBURSTS,
    pub chuseburstc: CHUSEBURSTC,
    pub chreqmasks: CHREQMASKS,
    pub chreqmaskc: CHREQMASKC,
    pub chens: CHENS,
    pub chenc: CHENC,
    pub chalts: CHALTS,
    pub chaltc: CHALTC,
    pub chpris: CHPRIS,
    pub chpric: CHPRIC,
    pub errorc: ERRORC,
    pub chreqstatus: CHREQSTATUS,
    pub chsreqstatus: CHSREQSTATUS,
    pub if_: IF,
    pub ifs: IFS,
    pub ifc: IFC,
    pub ien: IEN,
    pub ch0_ctrl: CH0_CTRL,
    pub ch1_ctrl: CH1_CTRL,
    pub ch2_ctrl: CH2_CTRL,
    pub ch3_ctrl: CH3_CTRL,
    pub ch4_ctrl: CH4_CTRL,
    pub ch5_ctrl: CH5_CTRL,
    // some fields omitted
}

Register block

Fields

status: STATUS

0x00 - DMA Status Registers

config: CONFIG

0x04 - DMA Configuration Register

ctrlbase: CTRLBASE

0x08 - Channel Control Data Base Pointer Register

altctrlbase: ALTCTRLBASE

0x0c - Channel Alternate Control Data Base Pointer Register

chwaitstatus: CHWAITSTATUS

0x10 - Channel Wait on Request Status Register

chswreq: CHSWREQ

0x14 - Channel Software Request Register

chusebursts: CHUSEBURSTS

0x18 - Channel Useburst Set Register

chuseburstc: CHUSEBURSTC

0x1c - Channel Useburst Clear Register

chreqmasks: CHREQMASKS

0x20 - Channel Request Mask Set Register

chreqmaskc: CHREQMASKC

0x24 - Channel Request Mask Clear Register

chens: CHENS

0x28 - Channel Enable Set Register

chenc: CHENC

0x2c - Channel Enable Clear Register

chalts: CHALTS

0x30 - Channel Alternate Set Register

chaltc: CHALTC

0x34 - Channel Alternate Clear Register

chpris: CHPRIS

0x38 - Channel Priority Set Register

chpric: CHPRIC

0x3c - Channel Priority Clear Register

errorc: ERRORC

0x4c - Bus Error Clear Register

chreqstatus: CHREQSTATUS

0xe10 - Channel Request Status

chsreqstatus: CHSREQSTATUS

0xe18 - Channel Single Request Status

if_: IF

0x1000 - Interrupt Flag Register

ifs: IFS

0x1004 - Interrupt Flag Set Register

ifc: IFC

0x1008 - Interrupt Flag Clear Register

ien: IEN

0x100c - Interrupt Enable register

ch0_ctrl: CH0_CTRL

0x1100 - Channel Control Register

ch1_ctrl: CH1_CTRL

0x1104 - Channel Control Register

ch2_ctrl: CH2_CTRL

0x1108 - Channel Control Register

ch3_ctrl: CH3_CTRL

0x110c - Channel Control Register

ch4_ctrl: CH4_CTRL

0x1110 - Channel Control Register

ch5_ctrl: CH5_CTRL

0x1114 - Channel Control Register

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