efm32hg309f64_pac/pcnt0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `MODE` reader - Mode Select"]
38pub type MODE_R = crate::FieldReader<u8, MODE_A>;
39#[doc = "Mode Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41#[repr(u8)]
42pub enum MODE_A {
43    #[doc = "0: The module is disabled."]
44    DISABLE = 0,
45    #[doc = "1: Single input LFACLK oversampling mode (available in EM0-EM2)."]
46    OVSSINGLE = 1,
47    #[doc = "2: Externally clocked single input counter mode (available in EM0-EM3)."]
48    EXTCLKSINGLE = 2,
49    #[doc = "3: Externally clocked quadrature decoder mode (available in EM0-EM3)."]
50    EXTCLKQUAD = 3,
51}
52impl From<MODE_A> for u8 {
53    #[inline(always)]
54    fn from(variant: MODE_A) -> Self {
55        variant as _
56    }
57}
58impl MODE_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> MODE_A {
62        match self.bits {
63            0 => MODE_A::DISABLE,
64            1 => MODE_A::OVSSINGLE,
65            2 => MODE_A::EXTCLKSINGLE,
66            3 => MODE_A::EXTCLKQUAD,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `DISABLE`"]
71    #[inline(always)]
72    pub fn is_disable(&self) -> bool {
73        *self == MODE_A::DISABLE
74    }
75    #[doc = "Checks if the value of the field is `OVSSINGLE`"]
76    #[inline(always)]
77    pub fn is_ovssingle(&self) -> bool {
78        *self == MODE_A::OVSSINGLE
79    }
80    #[doc = "Checks if the value of the field is `EXTCLKSINGLE`"]
81    #[inline(always)]
82    pub fn is_extclksingle(&self) -> bool {
83        *self == MODE_A::EXTCLKSINGLE
84    }
85    #[doc = "Checks if the value of the field is `EXTCLKQUAD`"]
86    #[inline(always)]
87    pub fn is_extclkquad(&self) -> bool {
88        *self == MODE_A::EXTCLKQUAD
89    }
90}
91#[doc = "Field `MODE` writer - Mode Select"]
92pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, MODE_A, 2, O>;
93impl<'a, const O: u8> MODE_W<'a, O> {
94    #[doc = "The module is disabled."]
95    #[inline(always)]
96    pub fn disable(self) -> &'a mut W {
97        self.variant(MODE_A::DISABLE)
98    }
99    #[doc = "Single input LFACLK oversampling mode (available in EM0-EM2)."]
100    #[inline(always)]
101    pub fn ovssingle(self) -> &'a mut W {
102        self.variant(MODE_A::OVSSINGLE)
103    }
104    #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."]
105    #[inline(always)]
106    pub fn extclksingle(self) -> &'a mut W {
107        self.variant(MODE_A::EXTCLKSINGLE)
108    }
109    #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."]
110    #[inline(always)]
111    pub fn extclkquad(self) -> &'a mut W {
112        self.variant(MODE_A::EXTCLKQUAD)
113    }
114}
115#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Control"]
116pub type CNTDIR_R = crate::BitReader<bool>;
117#[doc = "Field `CNTDIR` writer - Non-Quadrature Mode Counter Direction Control"]
118pub type CNTDIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
119#[doc = "Field `EDGE` reader - Edge Select"]
120pub type EDGE_R = crate::BitReader<bool>;
121#[doc = "Field `EDGE` writer - Edge Select"]
122pub type EDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
123#[doc = "Field `FILT` reader - Enable Digital Pulse Width Filter"]
124pub type FILT_R = crate::BitReader<bool>;
125#[doc = "Field `FILT` writer - Enable Digital Pulse Width Filter"]
126pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
127#[doc = "Field `RSTEN` reader - Enable PCNT Clock Domain Reset"]
128pub type RSTEN_R = crate::BitReader<bool>;
129#[doc = "Field `RSTEN` writer - Enable PCNT Clock Domain Reset"]
130pub type RSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
131#[doc = "Field `AUXCNTRSTEN` reader - Enable AUXCNT Reset"]
132pub type AUXCNTRSTEN_R = crate::BitReader<bool>;
133#[doc = "Field `AUXCNTRSTEN` writer - Enable AUXCNT Reset"]
134pub type AUXCNTRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
135#[doc = "Field `HYST` reader - Enable Hysteresis"]
136pub type HYST_R = crate::BitReader<bool>;
137#[doc = "Field `HYST` writer - Enable Hysteresis"]
138pub type HYST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
139#[doc = "Field `S1CDIR` reader - Count direction determined by S1"]
140pub type S1CDIR_R = crate::BitReader<bool>;
141#[doc = "Field `S1CDIR` writer - Count direction determined by S1"]
142pub type S1CDIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
143#[doc = "Field `CNTEV` reader - Controls when the counter counts"]
144pub type CNTEV_R = crate::FieldReader<u8, CNTEV_A>;
145#[doc = "Controls when the counter counts\n\nValue on reset: 0"]
146#[derive(Clone, Copy, Debug, PartialEq)]
147#[repr(u8)]
148pub enum CNTEV_A {
149    #[doc = "0: Counts up on up-count and down on down-count events."]
150    BOTH = 0,
151    #[doc = "1: Only counts up on up-count events."]
152    UP = 1,
153    #[doc = "2: Only counts down on down-count events."]
154    DOWN = 2,
155    #[doc = "3: Never counts."]
156    NONE = 3,
157}
158impl From<CNTEV_A> for u8 {
159    #[inline(always)]
160    fn from(variant: CNTEV_A) -> Self {
161        variant as _
162    }
163}
164impl CNTEV_R {
165    #[doc = "Get enumerated values variant"]
166    #[inline(always)]
167    pub fn variant(&self) -> CNTEV_A {
168        match self.bits {
169            0 => CNTEV_A::BOTH,
170            1 => CNTEV_A::UP,
171            2 => CNTEV_A::DOWN,
172            3 => CNTEV_A::NONE,
173            _ => unreachable!(),
174        }
175    }
176    #[doc = "Checks if the value of the field is `BOTH`"]
177    #[inline(always)]
178    pub fn is_both(&self) -> bool {
179        *self == CNTEV_A::BOTH
180    }
181    #[doc = "Checks if the value of the field is `UP`"]
182    #[inline(always)]
183    pub fn is_up(&self) -> bool {
184        *self == CNTEV_A::UP
185    }
186    #[doc = "Checks if the value of the field is `DOWN`"]
187    #[inline(always)]
188    pub fn is_down(&self) -> bool {
189        *self == CNTEV_A::DOWN
190    }
191    #[doc = "Checks if the value of the field is `NONE`"]
192    #[inline(always)]
193    pub fn is_none(&self) -> bool {
194        *self == CNTEV_A::NONE
195    }
196}
197#[doc = "Field `CNTEV` writer - Controls when the counter counts"]
198pub type CNTEV_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, CNTEV_A, 2, O>;
199impl<'a, const O: u8> CNTEV_W<'a, O> {
200    #[doc = "Counts up on up-count and down on down-count events."]
201    #[inline(always)]
202    pub fn both(self) -> &'a mut W {
203        self.variant(CNTEV_A::BOTH)
204    }
205    #[doc = "Only counts up on up-count events."]
206    #[inline(always)]
207    pub fn up(self) -> &'a mut W {
208        self.variant(CNTEV_A::UP)
209    }
210    #[doc = "Only counts down on down-count events."]
211    #[inline(always)]
212    pub fn down(self) -> &'a mut W {
213        self.variant(CNTEV_A::DOWN)
214    }
215    #[doc = "Never counts."]
216    #[inline(always)]
217    pub fn none(self) -> &'a mut W {
218        self.variant(CNTEV_A::NONE)
219    }
220}
221#[doc = "Field `AUXCNTEV` reader - Controls when the auxiliary counter counts"]
222pub type AUXCNTEV_R = crate::FieldReader<u8, AUXCNTEV_A>;
223#[doc = "Controls when the auxiliary counter counts\n\nValue on reset: 0"]
224#[derive(Clone, Copy, Debug, PartialEq)]
225#[repr(u8)]
226pub enum AUXCNTEV_A {
227    #[doc = "0: Never counts."]
228    NONE = 0,
229    #[doc = "1: Counts up on up-count events."]
230    UP = 1,
231    #[doc = "2: Counts up on down-count events."]
232    DOWN = 2,
233    #[doc = "3: Counts up on both up-count and down-count events."]
234    BOTH = 3,
235}
236impl From<AUXCNTEV_A> for u8 {
237    #[inline(always)]
238    fn from(variant: AUXCNTEV_A) -> Self {
239        variant as _
240    }
241}
242impl AUXCNTEV_R {
243    #[doc = "Get enumerated values variant"]
244    #[inline(always)]
245    pub fn variant(&self) -> AUXCNTEV_A {
246        match self.bits {
247            0 => AUXCNTEV_A::NONE,
248            1 => AUXCNTEV_A::UP,
249            2 => AUXCNTEV_A::DOWN,
250            3 => AUXCNTEV_A::BOTH,
251            _ => unreachable!(),
252        }
253    }
254    #[doc = "Checks if the value of the field is `NONE`"]
255    #[inline(always)]
256    pub fn is_none(&self) -> bool {
257        *self == AUXCNTEV_A::NONE
258    }
259    #[doc = "Checks if the value of the field is `UP`"]
260    #[inline(always)]
261    pub fn is_up(&self) -> bool {
262        *self == AUXCNTEV_A::UP
263    }
264    #[doc = "Checks if the value of the field is `DOWN`"]
265    #[inline(always)]
266    pub fn is_down(&self) -> bool {
267        *self == AUXCNTEV_A::DOWN
268    }
269    #[doc = "Checks if the value of the field is `BOTH`"]
270    #[inline(always)]
271    pub fn is_both(&self) -> bool {
272        *self == AUXCNTEV_A::BOTH
273    }
274}
275#[doc = "Field `AUXCNTEV` writer - Controls when the auxiliary counter counts"]
276pub type AUXCNTEV_W<'a, const O: u8> =
277    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, AUXCNTEV_A, 2, O>;
278impl<'a, const O: u8> AUXCNTEV_W<'a, O> {
279    #[doc = "Never counts."]
280    #[inline(always)]
281    pub fn none(self) -> &'a mut W {
282        self.variant(AUXCNTEV_A::NONE)
283    }
284    #[doc = "Counts up on up-count events."]
285    #[inline(always)]
286    pub fn up(self) -> &'a mut W {
287        self.variant(AUXCNTEV_A::UP)
288    }
289    #[doc = "Counts up on down-count events."]
290    #[inline(always)]
291    pub fn down(self) -> &'a mut W {
292        self.variant(AUXCNTEV_A::DOWN)
293    }
294    #[doc = "Counts up on both up-count and down-count events."]
295    #[inline(always)]
296    pub fn both(self) -> &'a mut W {
297        self.variant(AUXCNTEV_A::BOTH)
298    }
299}
300#[doc = "Field `TCCMODE` reader - Sets the mode for triggered compare and clear"]
301pub type TCCMODE_R = crate::FieldReader<u8, TCCMODE_A>;
302#[doc = "Sets the mode for triggered compare and clear\n\nValue on reset: 0"]
303#[derive(Clone, Copy, Debug, PartialEq)]
304#[repr(u8)]
305pub enum TCCMODE_A {
306    #[doc = "0: Triggered compare and clear not enabled."]
307    DISABLED = 0,
308    #[doc = "1: Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
309    LFA = 1,
310    #[doc = "2: Compare and clear performed on positive PRS edges."]
311    PRS = 2,
312}
313impl From<TCCMODE_A> for u8 {
314    #[inline(always)]
315    fn from(variant: TCCMODE_A) -> Self {
316        variant as _
317    }
318}
319impl TCCMODE_R {
320    #[doc = "Get enumerated values variant"]
321    #[inline(always)]
322    pub fn variant(&self) -> Option<TCCMODE_A> {
323        match self.bits {
324            0 => Some(TCCMODE_A::DISABLED),
325            1 => Some(TCCMODE_A::LFA),
326            2 => Some(TCCMODE_A::PRS),
327            _ => None,
328        }
329    }
330    #[doc = "Checks if the value of the field is `DISABLED`"]
331    #[inline(always)]
332    pub fn is_disabled(&self) -> bool {
333        *self == TCCMODE_A::DISABLED
334    }
335    #[doc = "Checks if the value of the field is `LFA`"]
336    #[inline(always)]
337    pub fn is_lfa(&self) -> bool {
338        *self == TCCMODE_A::LFA
339    }
340    #[doc = "Checks if the value of the field is `PRS`"]
341    #[inline(always)]
342    pub fn is_prs(&self) -> bool {
343        *self == TCCMODE_A::PRS
344    }
345}
346#[doc = "Field `TCCMODE` writer - Sets the mode for triggered compare and clear"]
347pub type TCCMODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCMODE_A, 2, O>;
348impl<'a, const O: u8> TCCMODE_W<'a, O> {
349    #[doc = "Triggered compare and clear not enabled."]
350    #[inline(always)]
351    pub fn disabled(self) -> &'a mut W {
352        self.variant(TCCMODE_A::DISABLED)
353    }
354    #[doc = "Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
355    #[inline(always)]
356    pub fn lfa(self) -> &'a mut W {
357        self.variant(TCCMODE_A::LFA)
358    }
359    #[doc = "Compare and clear performed on positive PRS edges."]
360    #[inline(always)]
361    pub fn prs(self) -> &'a mut W {
362        self.variant(TCCMODE_A::PRS)
363    }
364}
365#[doc = "Field `TCCPRESC` reader - Set the LFA prescaler for triggered compare and clear"]
366pub type TCCPRESC_R = crate::FieldReader<u8, TCCPRESC_A>;
367#[doc = "Set the LFA prescaler for triggered compare and clear\n\nValue on reset: 0"]
368#[derive(Clone, Copy, Debug, PartialEq)]
369#[repr(u8)]
370pub enum TCCPRESC_A {
371    #[doc = "0: Compare and clear event each LFA cycle."]
372    DIV1 = 0,
373    #[doc = "1: Compare and clear performed on every other LFA cycle."]
374    DIV2 = 1,
375    #[doc = "2: Compare and clear performed on every 4th LFA cycle."]
376    DIV4 = 2,
377    #[doc = "3: Compare and clear performed on every 8th LFA cycle."]
378    DIV8 = 3,
379}
380impl From<TCCPRESC_A> for u8 {
381    #[inline(always)]
382    fn from(variant: TCCPRESC_A) -> Self {
383        variant as _
384    }
385}
386impl TCCPRESC_R {
387    #[doc = "Get enumerated values variant"]
388    #[inline(always)]
389    pub fn variant(&self) -> TCCPRESC_A {
390        match self.bits {
391            0 => TCCPRESC_A::DIV1,
392            1 => TCCPRESC_A::DIV2,
393            2 => TCCPRESC_A::DIV4,
394            3 => TCCPRESC_A::DIV8,
395            _ => unreachable!(),
396        }
397    }
398    #[doc = "Checks if the value of the field is `DIV1`"]
399    #[inline(always)]
400    pub fn is_div1(&self) -> bool {
401        *self == TCCPRESC_A::DIV1
402    }
403    #[doc = "Checks if the value of the field is `DIV2`"]
404    #[inline(always)]
405    pub fn is_div2(&self) -> bool {
406        *self == TCCPRESC_A::DIV2
407    }
408    #[doc = "Checks if the value of the field is `DIV4`"]
409    #[inline(always)]
410    pub fn is_div4(&self) -> bool {
411        *self == TCCPRESC_A::DIV4
412    }
413    #[doc = "Checks if the value of the field is `DIV8`"]
414    #[inline(always)]
415    pub fn is_div8(&self) -> bool {
416        *self == TCCPRESC_A::DIV8
417    }
418}
419#[doc = "Field `TCCPRESC` writer - Set the LFA prescaler for triggered compare and clear"]
420pub type TCCPRESC_W<'a, const O: u8> =
421    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, TCCPRESC_A, 2, O>;
422impl<'a, const O: u8> TCCPRESC_W<'a, O> {
423    #[doc = "Compare and clear event each LFA cycle."]
424    #[inline(always)]
425    pub fn div1(self) -> &'a mut W {
426        self.variant(TCCPRESC_A::DIV1)
427    }
428    #[doc = "Compare and clear performed on every other LFA cycle."]
429    #[inline(always)]
430    pub fn div2(self) -> &'a mut W {
431        self.variant(TCCPRESC_A::DIV2)
432    }
433    #[doc = "Compare and clear performed on every 4th LFA cycle."]
434    #[inline(always)]
435    pub fn div4(self) -> &'a mut W {
436        self.variant(TCCPRESC_A::DIV4)
437    }
438    #[doc = "Compare and clear performed on every 8th LFA cycle."]
439    #[inline(always)]
440    pub fn div8(self) -> &'a mut W {
441        self.variant(TCCPRESC_A::DIV8)
442    }
443}
444#[doc = "Field `TCCCOMP` reader - Triggered compare and clear compare mode"]
445pub type TCCCOMP_R = crate::FieldReader<u8, TCCCOMP_A>;
446#[doc = "Triggered compare and clear compare mode\n\nValue on reset: 0"]
447#[derive(Clone, Copy, Debug, PartialEq)]
448#[repr(u8)]
449pub enum TCCCOMP_A {
450    #[doc = "0: Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
451    LTOE = 0,
452    #[doc = "1: Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
453    GTOE = 1,
454    #[doc = "2: Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
455    RANGE = 2,
456}
457impl From<TCCCOMP_A> for u8 {
458    #[inline(always)]
459    fn from(variant: TCCCOMP_A) -> Self {
460        variant as _
461    }
462}
463impl TCCCOMP_R {
464    #[doc = "Get enumerated values variant"]
465    #[inline(always)]
466    pub fn variant(&self) -> Option<TCCCOMP_A> {
467        match self.bits {
468            0 => Some(TCCCOMP_A::LTOE),
469            1 => Some(TCCCOMP_A::GTOE),
470            2 => Some(TCCCOMP_A::RANGE),
471            _ => None,
472        }
473    }
474    #[doc = "Checks if the value of the field is `LTOE`"]
475    #[inline(always)]
476    pub fn is_ltoe(&self) -> bool {
477        *self == TCCCOMP_A::LTOE
478    }
479    #[doc = "Checks if the value of the field is `GTOE`"]
480    #[inline(always)]
481    pub fn is_gtoe(&self) -> bool {
482        *self == TCCCOMP_A::GTOE
483    }
484    #[doc = "Checks if the value of the field is `RANGE`"]
485    #[inline(always)]
486    pub fn is_range(&self) -> bool {
487        *self == TCCCOMP_A::RANGE
488    }
489}
490#[doc = "Field `TCCCOMP` writer - Triggered compare and clear compare mode"]
491pub type TCCCOMP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCCOMP_A, 2, O>;
492impl<'a, const O: u8> TCCCOMP_W<'a, O> {
493    #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
494    #[inline(always)]
495    pub fn ltoe(self) -> &'a mut W {
496        self.variant(TCCCOMP_A::LTOE)
497    }
498    #[doc = "Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
499    #[inline(always)]
500    pub fn gtoe(self) -> &'a mut W {
501        self.variant(TCCCOMP_A::GTOE)
502    }
503    #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
504    #[inline(always)]
505    pub fn range(self) -> &'a mut W {
506        self.variant(TCCCOMP_A::RANGE)
507    }
508}
509#[doc = "Field `PRSGATEEN` reader - PRS gate enable"]
510pub type PRSGATEEN_R = crate::BitReader<bool>;
511#[doc = "Field `PRSGATEEN` writer - PRS gate enable"]
512pub type PRSGATEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
513#[doc = "Field `TCCPRSPOL` reader - TCC PRS polarity select"]
514pub type TCCPRSPOL_R = crate::BitReader<bool>;
515#[doc = "Field `TCCPRSPOL` writer - TCC PRS polarity select"]
516pub type TCCPRSPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
517#[doc = "Field `TCCPRSSEL` reader - TCC PRS Channel Select"]
518pub type TCCPRSSEL_R = crate::FieldReader<u8, TCCPRSSEL_A>;
519#[doc = "TCC PRS Channel Select\n\nValue on reset: 0"]
520#[derive(Clone, Copy, Debug, PartialEq)]
521#[repr(u8)]
522pub enum TCCPRSSEL_A {
523    #[doc = "0: PRS Channel 0 selected."]
524    PRSCH0 = 0,
525    #[doc = "1: PRS Channel 1 selected."]
526    PRSCH1 = 1,
527    #[doc = "2: PRS Channel 2 selected."]
528    PRSCH2 = 2,
529    #[doc = "3: PRS Channel 3 selected."]
530    PRSCH3 = 3,
531    #[doc = "4: PRS Channel 4 selected."]
532    PRSCH4 = 4,
533    #[doc = "5: PRS Channel 5 selected."]
534    PRSCH5 = 5,
535}
536impl From<TCCPRSSEL_A> for u8 {
537    #[inline(always)]
538    fn from(variant: TCCPRSSEL_A) -> Self {
539        variant as _
540    }
541}
542impl TCCPRSSEL_R {
543    #[doc = "Get enumerated values variant"]
544    #[inline(always)]
545    pub fn variant(&self) -> Option<TCCPRSSEL_A> {
546        match self.bits {
547            0 => Some(TCCPRSSEL_A::PRSCH0),
548            1 => Some(TCCPRSSEL_A::PRSCH1),
549            2 => Some(TCCPRSSEL_A::PRSCH2),
550            3 => Some(TCCPRSSEL_A::PRSCH3),
551            4 => Some(TCCPRSSEL_A::PRSCH4),
552            5 => Some(TCCPRSSEL_A::PRSCH5),
553            _ => None,
554        }
555    }
556    #[doc = "Checks if the value of the field is `PRSCH0`"]
557    #[inline(always)]
558    pub fn is_prsch0(&self) -> bool {
559        *self == TCCPRSSEL_A::PRSCH0
560    }
561    #[doc = "Checks if the value of the field is `PRSCH1`"]
562    #[inline(always)]
563    pub fn is_prsch1(&self) -> bool {
564        *self == TCCPRSSEL_A::PRSCH1
565    }
566    #[doc = "Checks if the value of the field is `PRSCH2`"]
567    #[inline(always)]
568    pub fn is_prsch2(&self) -> bool {
569        *self == TCCPRSSEL_A::PRSCH2
570    }
571    #[doc = "Checks if the value of the field is `PRSCH3`"]
572    #[inline(always)]
573    pub fn is_prsch3(&self) -> bool {
574        *self == TCCPRSSEL_A::PRSCH3
575    }
576    #[doc = "Checks if the value of the field is `PRSCH4`"]
577    #[inline(always)]
578    pub fn is_prsch4(&self) -> bool {
579        *self == TCCPRSSEL_A::PRSCH4
580    }
581    #[doc = "Checks if the value of the field is `PRSCH5`"]
582    #[inline(always)]
583    pub fn is_prsch5(&self) -> bool {
584        *self == TCCPRSSEL_A::PRSCH5
585    }
586}
587#[doc = "Field `TCCPRSSEL` writer - TCC PRS Channel Select"]
588pub type TCCPRSSEL_W<'a, const O: u8> =
589    crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCPRSSEL_A, 3, O>;
590impl<'a, const O: u8> TCCPRSSEL_W<'a, O> {
591    #[doc = "PRS Channel 0 selected."]
592    #[inline(always)]
593    pub fn prsch0(self) -> &'a mut W {
594        self.variant(TCCPRSSEL_A::PRSCH0)
595    }
596    #[doc = "PRS Channel 1 selected."]
597    #[inline(always)]
598    pub fn prsch1(self) -> &'a mut W {
599        self.variant(TCCPRSSEL_A::PRSCH1)
600    }
601    #[doc = "PRS Channel 2 selected."]
602    #[inline(always)]
603    pub fn prsch2(self) -> &'a mut W {
604        self.variant(TCCPRSSEL_A::PRSCH2)
605    }
606    #[doc = "PRS Channel 3 selected."]
607    #[inline(always)]
608    pub fn prsch3(self) -> &'a mut W {
609        self.variant(TCCPRSSEL_A::PRSCH3)
610    }
611    #[doc = "PRS Channel 4 selected."]
612    #[inline(always)]
613    pub fn prsch4(self) -> &'a mut W {
614        self.variant(TCCPRSSEL_A::PRSCH4)
615    }
616    #[doc = "PRS Channel 5 selected."]
617    #[inline(always)]
618    pub fn prsch5(self) -> &'a mut W {
619        self.variant(TCCPRSSEL_A::PRSCH5)
620    }
621}
622impl R {
623    #[doc = "Bits 0:1 - Mode Select"]
624    #[inline(always)]
625    pub fn mode(&self) -> MODE_R {
626        MODE_R::new((self.bits & 3) as u8)
627    }
628    #[doc = "Bit 2 - Non-Quadrature Mode Counter Direction Control"]
629    #[inline(always)]
630    pub fn cntdir(&self) -> CNTDIR_R {
631        CNTDIR_R::new(((self.bits >> 2) & 1) != 0)
632    }
633    #[doc = "Bit 3 - Edge Select"]
634    #[inline(always)]
635    pub fn edge(&self) -> EDGE_R {
636        EDGE_R::new(((self.bits >> 3) & 1) != 0)
637    }
638    #[doc = "Bit 4 - Enable Digital Pulse Width Filter"]
639    #[inline(always)]
640    pub fn filt(&self) -> FILT_R {
641        FILT_R::new(((self.bits >> 4) & 1) != 0)
642    }
643    #[doc = "Bit 5 - Enable PCNT Clock Domain Reset"]
644    #[inline(always)]
645    pub fn rsten(&self) -> RSTEN_R {
646        RSTEN_R::new(((self.bits >> 5) & 1) != 0)
647    }
648    #[doc = "Bit 6 - Enable AUXCNT Reset"]
649    #[inline(always)]
650    pub fn auxcntrsten(&self) -> AUXCNTRSTEN_R {
651        AUXCNTRSTEN_R::new(((self.bits >> 6) & 1) != 0)
652    }
653    #[doc = "Bit 8 - Enable Hysteresis"]
654    #[inline(always)]
655    pub fn hyst(&self) -> HYST_R {
656        HYST_R::new(((self.bits >> 8) & 1) != 0)
657    }
658    #[doc = "Bit 9 - Count direction determined by S1"]
659    #[inline(always)]
660    pub fn s1cdir(&self) -> S1CDIR_R {
661        S1CDIR_R::new(((self.bits >> 9) & 1) != 0)
662    }
663    #[doc = "Bits 10:11 - Controls when the counter counts"]
664    #[inline(always)]
665    pub fn cntev(&self) -> CNTEV_R {
666        CNTEV_R::new(((self.bits >> 10) & 3) as u8)
667    }
668    #[doc = "Bits 14:15 - Controls when the auxiliary counter counts"]
669    #[inline(always)]
670    pub fn auxcntev(&self) -> AUXCNTEV_R {
671        AUXCNTEV_R::new(((self.bits >> 14) & 3) as u8)
672    }
673    #[doc = "Bits 18:19 - Sets the mode for triggered compare and clear"]
674    #[inline(always)]
675    pub fn tccmode(&self) -> TCCMODE_R {
676        TCCMODE_R::new(((self.bits >> 18) & 3) as u8)
677    }
678    #[doc = "Bits 22:23 - Set the LFA prescaler for triggered compare and clear"]
679    #[inline(always)]
680    pub fn tccpresc(&self) -> TCCPRESC_R {
681        TCCPRESC_R::new(((self.bits >> 22) & 3) as u8)
682    }
683    #[doc = "Bits 25:26 - Triggered compare and clear compare mode"]
684    #[inline(always)]
685    pub fn tcccomp(&self) -> TCCCOMP_R {
686        TCCCOMP_R::new(((self.bits >> 25) & 3) as u8)
687    }
688    #[doc = "Bit 27 - PRS gate enable"]
689    #[inline(always)]
690    pub fn prsgateen(&self) -> PRSGATEEN_R {
691        PRSGATEEN_R::new(((self.bits >> 27) & 1) != 0)
692    }
693    #[doc = "Bit 28 - TCC PRS polarity select"]
694    #[inline(always)]
695    pub fn tccprspol(&self) -> TCCPRSPOL_R {
696        TCCPRSPOL_R::new(((self.bits >> 28) & 1) != 0)
697    }
698    #[doc = "Bits 29:31 - TCC PRS Channel Select"]
699    #[inline(always)]
700    pub fn tccprssel(&self) -> TCCPRSSEL_R {
701        TCCPRSSEL_R::new(((self.bits >> 29) & 7) as u8)
702    }
703}
704impl W {
705    #[doc = "Bits 0:1 - Mode Select"]
706    #[inline(always)]
707    pub fn mode(&mut self) -> MODE_W<0> {
708        MODE_W::new(self)
709    }
710    #[doc = "Bit 2 - Non-Quadrature Mode Counter Direction Control"]
711    #[inline(always)]
712    pub fn cntdir(&mut self) -> CNTDIR_W<2> {
713        CNTDIR_W::new(self)
714    }
715    #[doc = "Bit 3 - Edge Select"]
716    #[inline(always)]
717    pub fn edge(&mut self) -> EDGE_W<3> {
718        EDGE_W::new(self)
719    }
720    #[doc = "Bit 4 - Enable Digital Pulse Width Filter"]
721    #[inline(always)]
722    pub fn filt(&mut self) -> FILT_W<4> {
723        FILT_W::new(self)
724    }
725    #[doc = "Bit 5 - Enable PCNT Clock Domain Reset"]
726    #[inline(always)]
727    pub fn rsten(&mut self) -> RSTEN_W<5> {
728        RSTEN_W::new(self)
729    }
730    #[doc = "Bit 6 - Enable AUXCNT Reset"]
731    #[inline(always)]
732    pub fn auxcntrsten(&mut self) -> AUXCNTRSTEN_W<6> {
733        AUXCNTRSTEN_W::new(self)
734    }
735    #[doc = "Bit 8 - Enable Hysteresis"]
736    #[inline(always)]
737    pub fn hyst(&mut self) -> HYST_W<8> {
738        HYST_W::new(self)
739    }
740    #[doc = "Bit 9 - Count direction determined by S1"]
741    #[inline(always)]
742    pub fn s1cdir(&mut self) -> S1CDIR_W<9> {
743        S1CDIR_W::new(self)
744    }
745    #[doc = "Bits 10:11 - Controls when the counter counts"]
746    #[inline(always)]
747    pub fn cntev(&mut self) -> CNTEV_W<10> {
748        CNTEV_W::new(self)
749    }
750    #[doc = "Bits 14:15 - Controls when the auxiliary counter counts"]
751    #[inline(always)]
752    pub fn auxcntev(&mut self) -> AUXCNTEV_W<14> {
753        AUXCNTEV_W::new(self)
754    }
755    #[doc = "Bits 18:19 - Sets the mode for triggered compare and clear"]
756    #[inline(always)]
757    pub fn tccmode(&mut self) -> TCCMODE_W<18> {
758        TCCMODE_W::new(self)
759    }
760    #[doc = "Bits 22:23 - Set the LFA prescaler for triggered compare and clear"]
761    #[inline(always)]
762    pub fn tccpresc(&mut self) -> TCCPRESC_W<22> {
763        TCCPRESC_W::new(self)
764    }
765    #[doc = "Bits 25:26 - Triggered compare and clear compare mode"]
766    #[inline(always)]
767    pub fn tcccomp(&mut self) -> TCCCOMP_W<25> {
768        TCCCOMP_W::new(self)
769    }
770    #[doc = "Bit 27 - PRS gate enable"]
771    #[inline(always)]
772    pub fn prsgateen(&mut self) -> PRSGATEEN_W<27> {
773        PRSGATEEN_W::new(self)
774    }
775    #[doc = "Bit 28 - TCC PRS polarity select"]
776    #[inline(always)]
777    pub fn tccprspol(&mut self) -> TCCPRSPOL_W<28> {
778        TCCPRSPOL_W::new(self)
779    }
780    #[doc = "Bits 29:31 - TCC PRS Channel Select"]
781    #[inline(always)]
782    pub fn tccprssel(&mut self) -> TCCPRSSEL_W<29> {
783        TCCPRSSEL_W::new(self)
784    }
785    #[doc = "Writes raw bits to the register."]
786    #[inline(always)]
787    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
788        self.0.bits(bits);
789        self
790    }
791}
792#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
793pub struct CTRL_SPEC;
794impl crate::RegisterSpec for CTRL_SPEC {
795    type Ux = u32;
796}
797#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
798impl crate::Readable for CTRL_SPEC {
799    type Reader = R;
800}
801#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
802impl crate::Writable for CTRL_SPEC {
803    type Writer = W;
804}
805#[doc = "`reset()` method sets CTRL to value 0"]
806impl crate::Resettable for CTRL_SPEC {
807    #[inline(always)]
808    fn reset_value() -> Self::Ux {
809        0
810    }
811}
efm32hg309f64_pac/pcnt0/ctrl.rs

efm32hg309f64_pac/pcnt0/
ctrl.rs
