efm32hg309_pac/usb/
gusbcfg.rs

1#[doc = "Register `GUSBCFG` reader"]
2pub struct R(crate::R<GUSBCFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<GUSBCFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<GUSBCFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<GUSBCFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `GUSBCFG` writer"]
17pub struct W(crate::W<GUSBCFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<GUSBCFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<GUSBCFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<GUSBCFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TOUTCAL` reader - Timeout Calibration"]
38pub type TOUTCAL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `TOUTCAL` writer - Timeout Calibration"]
40pub type TOUTCAL_W<'a> = crate::FieldWriter<'a, u32, GUSBCFG_SPEC, u8, u8, 3, 0>;
41#[doc = "Field `FSINTF` reader - Full-Speed Serial Interface Select"]
42pub type FSINTF_R = crate::BitReader<bool>;
43#[doc = "Field `FSINTF` writer - Full-Speed Serial Interface Select"]
44pub type FSINTF_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 5>;
45#[doc = "Field `USBTRDTIM` reader - USB Turnaround Time"]
46pub type USBTRDTIM_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `USBTRDTIM` writer - USB Turnaround Time"]
48pub type USBTRDTIM_W<'a> = crate::FieldWriter<'a, u32, GUSBCFG_SPEC, u8, u8, 4, 10>;
49#[doc = "Field `TERMSELDLPULSE` reader - TermSel DLine Pulsing Selection"]
50pub type TERMSELDLPULSE_R = crate::BitReader<bool>;
51#[doc = "Field `TERMSELDLPULSE` writer - TermSel DLine Pulsing Selection"]
52pub type TERMSELDLPULSE_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 22>;
53#[doc = "Field `TXENDDELAY` reader - Tx End Delay"]
54pub type TXENDDELAY_R = crate::BitReader<bool>;
55#[doc = "Field `TXENDDELAY` writer - Tx End Delay"]
56pub type TXENDDELAY_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 28>;
57#[doc = "Field `CORRUPTTXPKT` writer - Corrupt Tx packet"]
58pub type CORRUPTTXPKT_W<'a> = crate::BitWriter<'a, u32, GUSBCFG_SPEC, bool, 31>;
59impl R {
60    #[doc = "Bits 0:2 - Timeout Calibration"]
61    #[inline(always)]
62    pub fn toutcal(&self) -> TOUTCAL_R {
63        TOUTCAL_R::new((self.bits & 7) as u8)
64    }
65    #[doc = "Bit 5 - Full-Speed Serial Interface Select"]
66    #[inline(always)]
67    pub fn fsintf(&self) -> FSINTF_R {
68        FSINTF_R::new(((self.bits >> 5) & 1) != 0)
69    }
70    #[doc = "Bits 10:13 - USB Turnaround Time"]
71    #[inline(always)]
72    pub fn usbtrdtim(&self) -> USBTRDTIM_R {
73        USBTRDTIM_R::new(((self.bits >> 10) & 0x0f) as u8)
74    }
75    #[doc = "Bit 22 - TermSel DLine Pulsing Selection"]
76    #[inline(always)]
77    pub fn termseldlpulse(&self) -> TERMSELDLPULSE_R {
78        TERMSELDLPULSE_R::new(((self.bits >> 22) & 1) != 0)
79    }
80    #[doc = "Bit 28 - Tx End Delay"]
81    #[inline(always)]
82    pub fn txenddelay(&self) -> TXENDDELAY_R {
83        TXENDDELAY_R::new(((self.bits >> 28) & 1) != 0)
84    }
85}
86impl W {
87    #[doc = "Bits 0:2 - Timeout Calibration"]
88    #[inline(always)]
89    pub fn toutcal(&mut self) -> TOUTCAL_W {
90        TOUTCAL_W::new(self)
91    }
92    #[doc = "Bit 5 - Full-Speed Serial Interface Select"]
93    #[inline(always)]
94    pub fn fsintf(&mut self) -> FSINTF_W {
95        FSINTF_W::new(self)
96    }
97    #[doc = "Bits 10:13 - USB Turnaround Time"]
98    #[inline(always)]
99    pub fn usbtrdtim(&mut self) -> USBTRDTIM_W {
100        USBTRDTIM_W::new(self)
101    }
102    #[doc = "Bit 22 - TermSel DLine Pulsing Selection"]
103    #[inline(always)]
104    pub fn termseldlpulse(&mut self) -> TERMSELDLPULSE_W {
105        TERMSELDLPULSE_W::new(self)
106    }
107    #[doc = "Bit 28 - Tx End Delay"]
108    #[inline(always)]
109    pub fn txenddelay(&mut self) -> TXENDDELAY_W {
110        TXENDDELAY_W::new(self)
111    }
112    #[doc = "Bit 31 - Corrupt Tx packet"]
113    #[inline(always)]
114    pub fn corrupttxpkt(&mut self) -> CORRUPTTXPKT_W {
115        CORRUPTTXPKT_W::new(self)
116    }
117    #[doc = "Writes raw bits to the register."]
118    #[inline(always)]
119    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
120        self.0.bits(bits);
121        self
122    }
123}
124#[doc = "USB Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gusbcfg](index.html) module"]
125pub struct GUSBCFG_SPEC;
126impl crate::RegisterSpec for GUSBCFG_SPEC {
127    type Ux = u32;
128}
129#[doc = "`read()` method returns [gusbcfg::R](R) reader structure"]
130impl crate::Readable for GUSBCFG_SPEC {
131    type Reader = R;
132}
133#[doc = "`write(|w| ..)` method takes [gusbcfg::W](W) writer structure"]
134impl crate::Writable for GUSBCFG_SPEC {
135    type Writer = W;
136}
137#[doc = "`reset()` method sets GUSBCFG to value 0x1440"]
138impl crate::Resettable for GUSBCFG_SPEC {
139    #[inline(always)]
140    fn reset_value() -> Self::Ux {
141        0x1440
142    }
143}
efm32hg309_pac/usb/gusbcfg.rs

efm32hg309_pac/usb/
gusbcfg.rs
