efm32hg309_pac/usb/
grstctl.rs

1#[doc = "Register `GRSTCTL` reader"]
2pub struct R(crate::R<GRSTCTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<GRSTCTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<GRSTCTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<GRSTCTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `GRSTCTL` writer"]
17pub struct W(crate::W<GRSTCTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<GRSTCTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<GRSTCTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<GRSTCTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CSFTRST` reader - Core Soft Reset"]
38pub type CSFTRST_R = crate::BitReader<bool>;
39#[doc = "Field `CSFTRST` writer - Core Soft Reset"]
40pub type CSFTRST_W<'a> = crate::BitWriter<'a, u32, GRSTCTL_SPEC, bool, 0>;
41#[doc = "Field `PIUFSSFTRST` reader - PIU FS Dedicated Controller Soft Reset"]
42pub type PIUFSSFTRST_R = crate::BitReader<bool>;
43#[doc = "Field `PIUFSSFTRST` writer - PIU FS Dedicated Controller Soft Reset"]
44pub type PIUFSSFTRST_W<'a> = crate::BitWriter<'a, u32, GRSTCTL_SPEC, bool, 1>;
45#[doc = "Field `RXFFLSH` reader - RxFIFO Flush"]
46pub type RXFFLSH_R = crate::BitReader<bool>;
47#[doc = "Field `RXFFLSH` writer - RxFIFO Flush"]
48pub type RXFFLSH_W<'a> = crate::BitWriter<'a, u32, GRSTCTL_SPEC, bool, 4>;
49#[doc = "Field `TXFFLSH` reader - TxFIFO Flush"]
50pub type TXFFLSH_R = crate::BitReader<bool>;
51#[doc = "Field `TXFFLSH` writer - TxFIFO Flush"]
52pub type TXFFLSH_W<'a> = crate::BitWriter<'a, u32, GRSTCTL_SPEC, bool, 5>;
53#[doc = "TxFIFO Number\n\nValue on reset: 0"]
54#[derive(Clone, Copy, Debug, PartialEq)]
55#[repr(u8)]
56pub enum TXFNUM_A {
57    #[doc = "0: Host mode: Non-periodic TxFIFO flush. Device: Tx FIFO 0 flush"]
58    F0 = 0,
59    #[doc = "1: Host mode: Periodic TxFIFO flush. Device: TXFIFO 1 flush."]
60    F1 = 1,
61    #[doc = "2: Device mode: TXFIFO 2 flush."]
62    F2 = 2,
63    #[doc = "3: Device mode: TXFIFO 3 flush."]
64    F3 = 3,
65    #[doc = "4: Device mode: TXFIFO 4 flush."]
66    F4 = 4,
67    #[doc = "5: Device mode: TXFIFO 5 flush."]
68    F5 = 5,
69    #[doc = "6: Device mode: TXFIFO 6 flush."]
70    F6 = 6,
71    #[doc = "16: Flush all the transmit FIFOs in device or host mode."]
72    FALL = 16,
73}
74impl From<TXFNUM_A> for u8 {
75    #[inline(always)]
76    fn from(variant: TXFNUM_A) -> Self {
77        variant as _
78    }
79}
80#[doc = "Field `TXFNUM` reader - TxFIFO Number"]
81pub type TXFNUM_R = crate::FieldReader<u8, TXFNUM_A>;
82impl TXFNUM_R {
83    #[doc = "Get enumerated values variant"]
84    #[inline(always)]
85    pub fn variant(&self) -> Option<TXFNUM_A> {
86        match self.bits {
87            0 => Some(TXFNUM_A::F0),
88            1 => Some(TXFNUM_A::F1),
89            2 => Some(TXFNUM_A::F2),
90            3 => Some(TXFNUM_A::F3),
91            4 => Some(TXFNUM_A::F4),
92            5 => Some(TXFNUM_A::F5),
93            6 => Some(TXFNUM_A::F6),
94            16 => Some(TXFNUM_A::FALL),
95            _ => None,
96        }
97    }
98    #[doc = "Checks if the value of the field is `F0`"]
99    #[inline(always)]
100    pub fn is_f0(&self) -> bool {
101        *self == TXFNUM_A::F0
102    }
103    #[doc = "Checks if the value of the field is `F1`"]
104    #[inline(always)]
105    pub fn is_f1(&self) -> bool {
106        *self == TXFNUM_A::F1
107    }
108    #[doc = "Checks if the value of the field is `F2`"]
109    #[inline(always)]
110    pub fn is_f2(&self) -> bool {
111        *self == TXFNUM_A::F2
112    }
113    #[doc = "Checks if the value of the field is `F3`"]
114    #[inline(always)]
115    pub fn is_f3(&self) -> bool {
116        *self == TXFNUM_A::F3
117    }
118    #[doc = "Checks if the value of the field is `F4`"]
119    #[inline(always)]
120    pub fn is_f4(&self) -> bool {
121        *self == TXFNUM_A::F4
122    }
123    #[doc = "Checks if the value of the field is `F5`"]
124    #[inline(always)]
125    pub fn is_f5(&self) -> bool {
126        *self == TXFNUM_A::F5
127    }
128    #[doc = "Checks if the value of the field is `F6`"]
129    #[inline(always)]
130    pub fn is_f6(&self) -> bool {
131        *self == TXFNUM_A::F6
132    }
133    #[doc = "Checks if the value of the field is `FALL`"]
134    #[inline(always)]
135    pub fn is_fall(&self) -> bool {
136        *self == TXFNUM_A::FALL
137    }
138}
139#[doc = "Field `TXFNUM` writer - TxFIFO Number"]
140pub type TXFNUM_W<'a> = crate::FieldWriter<'a, u32, GRSTCTL_SPEC, u8, TXFNUM_A, 5, 6>;
141impl<'a> TXFNUM_W<'a> {
142    #[doc = "Host mode: Non-periodic TxFIFO flush. Device: Tx FIFO 0 flush"]
143    #[inline(always)]
144    pub fn f0(self) -> &'a mut W {
145        self.variant(TXFNUM_A::F0)
146    }
147    #[doc = "Host mode: Periodic TxFIFO flush. Device: TXFIFO 1 flush."]
148    #[inline(always)]
149    pub fn f1(self) -> &'a mut W {
150        self.variant(TXFNUM_A::F1)
151    }
152    #[doc = "Device mode: TXFIFO 2 flush."]
153    #[inline(always)]
154    pub fn f2(self) -> &'a mut W {
155        self.variant(TXFNUM_A::F2)
156    }
157    #[doc = "Device mode: TXFIFO 3 flush."]
158    #[inline(always)]
159    pub fn f3(self) -> &'a mut W {
160        self.variant(TXFNUM_A::F3)
161    }
162    #[doc = "Device mode: TXFIFO 4 flush."]
163    #[inline(always)]
164    pub fn f4(self) -> &'a mut W {
165        self.variant(TXFNUM_A::F4)
166    }
167    #[doc = "Device mode: TXFIFO 5 flush."]
168    #[inline(always)]
169    pub fn f5(self) -> &'a mut W {
170        self.variant(TXFNUM_A::F5)
171    }
172    #[doc = "Device mode: TXFIFO 6 flush."]
173    #[inline(always)]
174    pub fn f6(self) -> &'a mut W {
175        self.variant(TXFNUM_A::F6)
176    }
177    #[doc = "Flush all the transmit FIFOs in device or host mode."]
178    #[inline(always)]
179    pub fn fall(self) -> &'a mut W {
180        self.variant(TXFNUM_A::FALL)
181    }
182}
183#[doc = "Field `DMAREQ` reader - DMA Request Signal"]
184pub type DMAREQ_R = crate::BitReader<bool>;
185#[doc = "Field `AHBIDLE` reader - AHB Master Idle"]
186pub type AHBIDLE_R = crate::BitReader<bool>;
187impl R {
188    #[doc = "Bit 0 - Core Soft Reset"]
189    #[inline(always)]
190    pub fn csftrst(&self) -> CSFTRST_R {
191        CSFTRST_R::new((self.bits & 1) != 0)
192    }
193    #[doc = "Bit 1 - PIU FS Dedicated Controller Soft Reset"]
194    #[inline(always)]
195    pub fn piufssftrst(&self) -> PIUFSSFTRST_R {
196        PIUFSSFTRST_R::new(((self.bits >> 1) & 1) != 0)
197    }
198    #[doc = "Bit 4 - RxFIFO Flush"]
199    #[inline(always)]
200    pub fn rxfflsh(&self) -> RXFFLSH_R {
201        RXFFLSH_R::new(((self.bits >> 4) & 1) != 0)
202    }
203    #[doc = "Bit 5 - TxFIFO Flush"]
204    #[inline(always)]
205    pub fn txfflsh(&self) -> TXFFLSH_R {
206        TXFFLSH_R::new(((self.bits >> 5) & 1) != 0)
207    }
208    #[doc = "Bits 6:10 - TxFIFO Number"]
209    #[inline(always)]
210    pub fn txfnum(&self) -> TXFNUM_R {
211        TXFNUM_R::new(((self.bits >> 6) & 0x1f) as u8)
212    }
213    #[doc = "Bit 30 - DMA Request Signal"]
214    #[inline(always)]
215    pub fn dmareq(&self) -> DMAREQ_R {
216        DMAREQ_R::new(((self.bits >> 30) & 1) != 0)
217    }
218    #[doc = "Bit 31 - AHB Master Idle"]
219    #[inline(always)]
220    pub fn ahbidle(&self) -> AHBIDLE_R {
221        AHBIDLE_R::new(((self.bits >> 31) & 1) != 0)
222    }
223}
224impl W {
225    #[doc = "Bit 0 - Core Soft Reset"]
226    #[inline(always)]
227    pub fn csftrst(&mut self) -> CSFTRST_W {
228        CSFTRST_W::new(self)
229    }
230    #[doc = "Bit 1 - PIU FS Dedicated Controller Soft Reset"]
231    #[inline(always)]
232    pub fn piufssftrst(&mut self) -> PIUFSSFTRST_W {
233        PIUFSSFTRST_W::new(self)
234    }
235    #[doc = "Bit 4 - RxFIFO Flush"]
236    #[inline(always)]
237    pub fn rxfflsh(&mut self) -> RXFFLSH_W {
238        RXFFLSH_W::new(self)
239    }
240    #[doc = "Bit 5 - TxFIFO Flush"]
241    #[inline(always)]
242    pub fn txfflsh(&mut self) -> TXFFLSH_W {
243        TXFFLSH_W::new(self)
244    }
245    #[doc = "Bits 6:10 - TxFIFO Number"]
246    #[inline(always)]
247    pub fn txfnum(&mut self) -> TXFNUM_W {
248        TXFNUM_W::new(self)
249    }
250    #[doc = "Writes raw bits to the register."]
251    #[inline(always)]
252    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
253        self.0.bits(bits);
254        self
255    }
256}
257#[doc = "Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grstctl](index.html) module"]
258pub struct GRSTCTL_SPEC;
259impl crate::RegisterSpec for GRSTCTL_SPEC {
260    type Ux = u32;
261}
262#[doc = "`read()` method returns [grstctl::R](R) reader structure"]
263impl crate::Readable for GRSTCTL_SPEC {
264    type Reader = R;
265}
266#[doc = "`write(|w| ..)` method takes [grstctl::W](W) writer structure"]
267impl crate::Writable for GRSTCTL_SPEC {
268    type Writer = W;
269}
270#[doc = "`reset()` method sets GRSTCTL to value 0x8000_0000"]
271impl crate::Resettable for GRSTCTL_SPEC {
272    #[inline(always)]
273    fn reset_value() -> Self::Ux {
274        0x8000_0000
275    }
276}
efm32hg309_pac/usb/grstctl.rs

efm32hg309_pac/usb/
grstctl.rs
