efm32hg309_pac/timer1/
route.rs

1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CC0PEN` reader - CC Channel 0 Pin Enable"]
38pub type CC0PEN_R = crate::BitReader<bool>;
39#[doc = "Field `CC0PEN` writer - CC Channel 0 Pin Enable"]
40pub type CC0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 0>;
41#[doc = "Field `CC1PEN` reader - CC Channel 1 Pin Enable"]
42pub type CC1PEN_R = crate::BitReader<bool>;
43#[doc = "Field `CC1PEN` writer - CC Channel 1 Pin Enable"]
44pub type CC1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 1>;
45#[doc = "Field `CC2PEN` reader - CC Channel 2 Pin Enable"]
46pub type CC2PEN_R = crate::BitReader<bool>;
47#[doc = "Field `CC2PEN` writer - CC Channel 2 Pin Enable"]
48pub type CC2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 2>;
49#[doc = "Field `CDTI0PEN` reader - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
50pub type CDTI0PEN_R = crate::BitReader<bool>;
51#[doc = "Field `CDTI0PEN` writer - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
52pub type CDTI0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 8>;
53#[doc = "Field `CDTI1PEN` reader - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
54pub type CDTI1PEN_R = crate::BitReader<bool>;
55#[doc = "Field `CDTI1PEN` writer - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
56pub type CDTI1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 9>;
57#[doc = "Field `CDTI2PEN` reader - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
58pub type CDTI2PEN_R = crate::BitReader<bool>;
59#[doc = "Field `CDTI2PEN` writer - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
60pub type CDTI2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 10>;
61#[doc = "I/O Location\n\nValue on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq)]
63#[repr(u8)]
64pub enum LOCATION_A {
65    #[doc = "0: Location 0"]
66    LOC0 = 0,
67    #[doc = "1: Location 1"]
68    LOC1 = 1,
69    #[doc = "2: Location 2"]
70    LOC2 = 2,
71    #[doc = "3: Location 3"]
72    LOC3 = 3,
73    #[doc = "4: Location 4"]
74    LOC4 = 4,
75    #[doc = "5: Location 5"]
76    LOC5 = 5,
77    #[doc = "6: Location 6"]
78    LOC6 = 6,
79}
80impl From<LOCATION_A> for u8 {
81    #[inline(always)]
82    fn from(variant: LOCATION_A) -> Self {
83        variant as _
84    }
85}
86#[doc = "Field `LOCATION` reader - I/O Location"]
87pub type LOCATION_R = crate::FieldReader<u8, LOCATION_A>;
88impl LOCATION_R {
89    #[doc = "Get enumerated values variant"]
90    #[inline(always)]
91    pub fn variant(&self) -> Option<LOCATION_A> {
92        match self.bits {
93            0 => Some(LOCATION_A::LOC0),
94            1 => Some(LOCATION_A::LOC1),
95            2 => Some(LOCATION_A::LOC2),
96            3 => Some(LOCATION_A::LOC3),
97            4 => Some(LOCATION_A::LOC4),
98            5 => Some(LOCATION_A::LOC5),
99            6 => Some(LOCATION_A::LOC6),
100            _ => None,
101        }
102    }
103    #[doc = "Checks if the value of the field is `LOC0`"]
104    #[inline(always)]
105    pub fn is_loc0(&self) -> bool {
106        *self == LOCATION_A::LOC0
107    }
108    #[doc = "Checks if the value of the field is `LOC1`"]
109    #[inline(always)]
110    pub fn is_loc1(&self) -> bool {
111        *self == LOCATION_A::LOC1
112    }
113    #[doc = "Checks if the value of the field is `LOC2`"]
114    #[inline(always)]
115    pub fn is_loc2(&self) -> bool {
116        *self == LOCATION_A::LOC2
117    }
118    #[doc = "Checks if the value of the field is `LOC3`"]
119    #[inline(always)]
120    pub fn is_loc3(&self) -> bool {
121        *self == LOCATION_A::LOC3
122    }
123    #[doc = "Checks if the value of the field is `LOC4`"]
124    #[inline(always)]
125    pub fn is_loc4(&self) -> bool {
126        *self == LOCATION_A::LOC4
127    }
128    #[doc = "Checks if the value of the field is `LOC5`"]
129    #[inline(always)]
130    pub fn is_loc5(&self) -> bool {
131        *self == LOCATION_A::LOC5
132    }
133    #[doc = "Checks if the value of the field is `LOC6`"]
134    #[inline(always)]
135    pub fn is_loc6(&self) -> bool {
136        *self == LOCATION_A::LOC6
137    }
138}
139#[doc = "Field `LOCATION` writer - I/O Location"]
140pub type LOCATION_W<'a> = crate::FieldWriter<'a, u32, ROUTE_SPEC, u8, LOCATION_A, 3, 16>;
141impl<'a> LOCATION_W<'a> {
142    #[doc = "Location 0"]
143    #[inline(always)]
144    pub fn loc0(self) -> &'a mut W {
145        self.variant(LOCATION_A::LOC0)
146    }
147    #[doc = "Location 1"]
148    #[inline(always)]
149    pub fn loc1(self) -> &'a mut W {
150        self.variant(LOCATION_A::LOC1)
151    }
152    #[doc = "Location 2"]
153    #[inline(always)]
154    pub fn loc2(self) -> &'a mut W {
155        self.variant(LOCATION_A::LOC2)
156    }
157    #[doc = "Location 3"]
158    #[inline(always)]
159    pub fn loc3(self) -> &'a mut W {
160        self.variant(LOCATION_A::LOC3)
161    }
162    #[doc = "Location 4"]
163    #[inline(always)]
164    pub fn loc4(self) -> &'a mut W {
165        self.variant(LOCATION_A::LOC4)
166    }
167    #[doc = "Location 5"]
168    #[inline(always)]
169    pub fn loc5(self) -> &'a mut W {
170        self.variant(LOCATION_A::LOC5)
171    }
172    #[doc = "Location 6"]
173    #[inline(always)]
174    pub fn loc6(self) -> &'a mut W {
175        self.variant(LOCATION_A::LOC6)
176    }
177}
178impl R {
179    #[doc = "Bit 0 - CC Channel 0 Pin Enable"]
180    #[inline(always)]
181    pub fn cc0pen(&self) -> CC0PEN_R {
182        CC0PEN_R::new((self.bits & 1) != 0)
183    }
184    #[doc = "Bit 1 - CC Channel 1 Pin Enable"]
185    #[inline(always)]
186    pub fn cc1pen(&self) -> CC1PEN_R {
187        CC1PEN_R::new(((self.bits >> 1) & 1) != 0)
188    }
189    #[doc = "Bit 2 - CC Channel 2 Pin Enable"]
190    #[inline(always)]
191    pub fn cc2pen(&self) -> CC2PEN_R {
192        CC2PEN_R::new(((self.bits >> 2) & 1) != 0)
193    }
194    #[doc = "Bit 8 - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
195    #[inline(always)]
196    pub fn cdti0pen(&self) -> CDTI0PEN_R {
197        CDTI0PEN_R::new(((self.bits >> 8) & 1) != 0)
198    }
199    #[doc = "Bit 9 - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
200    #[inline(always)]
201    pub fn cdti1pen(&self) -> CDTI1PEN_R {
202        CDTI1PEN_R::new(((self.bits >> 9) & 1) != 0)
203    }
204    #[doc = "Bit 10 - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
205    #[inline(always)]
206    pub fn cdti2pen(&self) -> CDTI2PEN_R {
207        CDTI2PEN_R::new(((self.bits >> 10) & 1) != 0)
208    }
209    #[doc = "Bits 16:18 - I/O Location"]
210    #[inline(always)]
211    pub fn location(&self) -> LOCATION_R {
212        LOCATION_R::new(((self.bits >> 16) & 7) as u8)
213    }
214}
215impl W {
216    #[doc = "Bit 0 - CC Channel 0 Pin Enable"]
217    #[inline(always)]
218    pub fn cc0pen(&mut self) -> CC0PEN_W {
219        CC0PEN_W::new(self)
220    }
221    #[doc = "Bit 1 - CC Channel 1 Pin Enable"]
222    #[inline(always)]
223    pub fn cc1pen(&mut self) -> CC1PEN_W {
224        CC1PEN_W::new(self)
225    }
226    #[doc = "Bit 2 - CC Channel 2 Pin Enable"]
227    #[inline(always)]
228    pub fn cc2pen(&mut self) -> CC2PEN_W {
229        CC2PEN_W::new(self)
230    }
231    #[doc = "Bit 8 - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
232    #[inline(always)]
233    pub fn cdti0pen(&mut self) -> CDTI0PEN_W {
234        CDTI0PEN_W::new(self)
235    }
236    #[doc = "Bit 9 - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
237    #[inline(always)]
238    pub fn cdti1pen(&mut self) -> CDTI1PEN_W {
239        CDTI1PEN_W::new(self)
240    }
241    #[doc = "Bit 10 - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
242    #[inline(always)]
243    pub fn cdti2pen(&mut self) -> CDTI2PEN_W {
244        CDTI2PEN_W::new(self)
245    }
246    #[doc = "Bits 16:18 - I/O Location"]
247    #[inline(always)]
248    pub fn location(&mut self) -> LOCATION_W {
249        LOCATION_W::new(self)
250    }
251    #[doc = "Writes raw bits to the register."]
252    #[inline(always)]
253    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
254        self.0.bits(bits);
255        self
256    }
257}
258#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
259pub struct ROUTE_SPEC;
260impl crate::RegisterSpec for ROUTE_SPEC {
261    type Ux = u32;
262}
263#[doc = "`read()` method returns [route::R](R) reader structure"]
264impl crate::Readable for ROUTE_SPEC {
265    type Reader = R;
266}
267#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
268impl crate::Writable for ROUTE_SPEC {
269    type Writer = W;
270}
271#[doc = "`reset()` method sets ROUTE to value 0"]
272impl crate::Resettable for ROUTE_SPEC {
273    #[inline(always)]
274    fn reset_value() -> Self::Ux {
275        0
276    }
277}
efm32hg309_pac/timer1/route.rs

efm32hg309_pac/timer1/
route.rs
