efm32hg308_pac/dma/
ch3_ctrl.rs

1#[doc = "Register `CH3_CTRL` reader"]
2pub struct R(crate::R<CH3_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH3_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH3_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH3_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH3_CTRL` writer"]
17pub struct W(crate::W<CH3_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH3_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH3_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH3_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SIGSEL` reader - Signal Select"]
38pub type SIGSEL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SIGSEL` writer - Signal Select"]
40pub type SIGSEL_W<'a> = crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u8, u8, 4, 0>;
41#[doc = "Source Select\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum SOURCESEL_A {
45    #[doc = "0: No source selected"]
46    NONE = 0,
47    #[doc = "12: Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
48    USART0 = 12,
49    #[doc = "13: Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
50    USART1 = 13,
51    #[doc = "16: Low Energy UART 0"]
52    LEUART0 = 16,
53    #[doc = "20: I2C 0"]
54    I2C0 = 20,
55    #[doc = "24: Timer 0"]
56    TIMER0 = 24,
57    #[doc = "25: Timer 1"]
58    TIMER1 = 25,
59    #[doc = "26: Timer 2"]
60    TIMER2 = 26,
61    #[doc = "48: `110000`"]
62    MSC = 48,
63}
64impl From<SOURCESEL_A> for u8 {
65    #[inline(always)]
66    fn from(variant: SOURCESEL_A) -> Self {
67        variant as _
68    }
69}
70#[doc = "Field `SOURCESEL` reader - Source Select"]
71pub type SOURCESEL_R = crate::FieldReader<u8, SOURCESEL_A>;
72impl SOURCESEL_R {
73    #[doc = "Get enumerated values variant"]
74    #[inline(always)]
75    pub fn variant(&self) -> Option<SOURCESEL_A> {
76        match self.bits {
77            0 => Some(SOURCESEL_A::NONE),
78            12 => Some(SOURCESEL_A::USART0),
79            13 => Some(SOURCESEL_A::USART1),
80            16 => Some(SOURCESEL_A::LEUART0),
81            20 => Some(SOURCESEL_A::I2C0),
82            24 => Some(SOURCESEL_A::TIMER0),
83            25 => Some(SOURCESEL_A::TIMER1),
84            26 => Some(SOURCESEL_A::TIMER2),
85            48 => Some(SOURCESEL_A::MSC),
86            _ => None,
87        }
88    }
89    #[doc = "Checks if the value of the field is `NONE`"]
90    #[inline(always)]
91    pub fn is_none(&self) -> bool {
92        *self == SOURCESEL_A::NONE
93    }
94    #[doc = "Checks if the value of the field is `USART0`"]
95    #[inline(always)]
96    pub fn is_usart0(&self) -> bool {
97        *self == SOURCESEL_A::USART0
98    }
99    #[doc = "Checks if the value of the field is `USART1`"]
100    #[inline(always)]
101    pub fn is_usart1(&self) -> bool {
102        *self == SOURCESEL_A::USART1
103    }
104    #[doc = "Checks if the value of the field is `LEUART0`"]
105    #[inline(always)]
106    pub fn is_leuart0(&self) -> bool {
107        *self == SOURCESEL_A::LEUART0
108    }
109    #[doc = "Checks if the value of the field is `I2C0`"]
110    #[inline(always)]
111    pub fn is_i2c0(&self) -> bool {
112        *self == SOURCESEL_A::I2C0
113    }
114    #[doc = "Checks if the value of the field is `TIMER0`"]
115    #[inline(always)]
116    pub fn is_timer0(&self) -> bool {
117        *self == SOURCESEL_A::TIMER0
118    }
119    #[doc = "Checks if the value of the field is `TIMER1`"]
120    #[inline(always)]
121    pub fn is_timer1(&self) -> bool {
122        *self == SOURCESEL_A::TIMER1
123    }
124    #[doc = "Checks if the value of the field is `TIMER2`"]
125    #[inline(always)]
126    pub fn is_timer2(&self) -> bool {
127        *self == SOURCESEL_A::TIMER2
128    }
129    #[doc = "Checks if the value of the field is `MSC`"]
130    #[inline(always)]
131    pub fn is_msc(&self) -> bool {
132        *self == SOURCESEL_A::MSC
133    }
134}
135#[doc = "Field `SOURCESEL` writer - Source Select"]
136pub type SOURCESEL_W<'a> = crate::FieldWriter<'a, u32, CH3_CTRL_SPEC, u8, SOURCESEL_A, 6, 16>;
137impl<'a> SOURCESEL_W<'a> {
138    #[doc = "No source selected"]
139    #[inline(always)]
140    pub fn none(self) -> &'a mut W {
141        self.variant(SOURCESEL_A::NONE)
142    }
143    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
144    #[inline(always)]
145    pub fn usart0(self) -> &'a mut W {
146        self.variant(SOURCESEL_A::USART0)
147    }
148    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
149    #[inline(always)]
150    pub fn usart1(self) -> &'a mut W {
151        self.variant(SOURCESEL_A::USART1)
152    }
153    #[doc = "Low Energy UART 0"]
154    #[inline(always)]
155    pub fn leuart0(self) -> &'a mut W {
156        self.variant(SOURCESEL_A::LEUART0)
157    }
158    #[doc = "I2C 0"]
159    #[inline(always)]
160    pub fn i2c0(self) -> &'a mut W {
161        self.variant(SOURCESEL_A::I2C0)
162    }
163    #[doc = "Timer 0"]
164    #[inline(always)]
165    pub fn timer0(self) -> &'a mut W {
166        self.variant(SOURCESEL_A::TIMER0)
167    }
168    #[doc = "Timer 1"]
169    #[inline(always)]
170    pub fn timer1(self) -> &'a mut W {
171        self.variant(SOURCESEL_A::TIMER1)
172    }
173    #[doc = "Timer 2"]
174    #[inline(always)]
175    pub fn timer2(self) -> &'a mut W {
176        self.variant(SOURCESEL_A::TIMER2)
177    }
178    #[doc = "`110000`"]
179    #[inline(always)]
180    pub fn msc(self) -> &'a mut W {
181        self.variant(SOURCESEL_A::MSC)
182    }
183}
184impl R {
185    #[doc = "Bits 0:3 - Signal Select"]
186    #[inline(always)]
187    pub fn sigsel(&self) -> SIGSEL_R {
188        SIGSEL_R::new((self.bits & 0x0f) as u8)
189    }
190    #[doc = "Bits 16:21 - Source Select"]
191    #[inline(always)]
192    pub fn sourcesel(&self) -> SOURCESEL_R {
193        SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8)
194    }
195}
196impl W {
197    #[doc = "Bits 0:3 - Signal Select"]
198    #[inline(always)]
199    pub fn sigsel(&mut self) -> SIGSEL_W {
200        SIGSEL_W::new(self)
201    }
202    #[doc = "Bits 16:21 - Source Select"]
203    #[inline(always)]
204    pub fn sourcesel(&mut self) -> SOURCESEL_W {
205        SOURCESEL_W::new(self)
206    }
207    #[doc = "Writes raw bits to the register."]
208    #[inline(always)]
209    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
210        self.0.bits(bits);
211        self
212    }
213}
214#[doc = "Channel Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3_ctrl](index.html) module"]
215pub struct CH3_CTRL_SPEC;
216impl crate::RegisterSpec for CH3_CTRL_SPEC {
217    type Ux = u32;
218}
219#[doc = "`read()` method returns [ch3_ctrl::R](R) reader structure"]
220impl crate::Readable for CH3_CTRL_SPEC {
221    type Reader = R;
222}
223#[doc = "`write(|w| ..)` method takes [ch3_ctrl::W](W) writer structure"]
224impl crate::Writable for CH3_CTRL_SPEC {
225    type Writer = W;
226}
227#[doc = "`reset()` method sets CH3_CTRL to value 0"]
228impl crate::Resettable for CH3_CTRL_SPEC {
229    #[inline(always)]
230    fn reset_value() -> Self::Ux {
231        0
232    }
233}
efm32hg308_pac/dma/ch3_ctrl.rs

efm32hg308_pac/dma/
ch3_ctrl.rs
