efm32hg210_pac/usart0/
txdoublex.rs

1#[doc = "Register `TXDOUBLEX` writer"]
2pub struct W(crate::W<TXDOUBLEX_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<TXDOUBLEX_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<TXDOUBLEX_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<TXDOUBLEX_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `TXDATA0` writer - TX Data"]
23pub type TXDATA0_W<'a> = crate::FieldWriter<'a, u32, TXDOUBLEX_SPEC, u16, u16, 9, 0>;
24#[doc = "Field `UBRXAT0` writer - Unblock RX After Transmission"]
25pub type UBRXAT0_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 11>;
26#[doc = "Field `TXTRIAT0` writer - Set TXTRI After Transmission"]
27pub type TXTRIAT0_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 12>;
28#[doc = "Field `TXBREAK0` writer - Transmit Data As Break"]
29pub type TXBREAK0_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 13>;
30#[doc = "Field `TXDISAT0` writer - Clear TXEN After Transmission"]
31pub type TXDISAT0_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 14>;
32#[doc = "Field `RXENAT0` writer - Enable RX After Transmission"]
33pub type RXENAT0_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 15>;
34#[doc = "Field `TXDATA1` writer - TX Data"]
35pub type TXDATA1_W<'a> = crate::FieldWriter<'a, u32, TXDOUBLEX_SPEC, u16, u16, 9, 16>;
36#[doc = "Field `UBRXAT1` writer - Unblock RX After Transmission"]
37pub type UBRXAT1_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 27>;
38#[doc = "Field `TXTRIAT1` writer - Set TXTRI After Transmission"]
39pub type TXTRIAT1_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 28>;
40#[doc = "Field `TXBREAK1` writer - Transmit Data As Break"]
41pub type TXBREAK1_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 29>;
42#[doc = "Field `TXDISAT1` writer - Clear TXEN After Transmission"]
43pub type TXDISAT1_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 30>;
44#[doc = "Field `RXENAT1` writer - Enable RX After Transmission"]
45pub type RXENAT1_W<'a> = crate::BitWriter<'a, u32, TXDOUBLEX_SPEC, bool, 31>;
46impl W {
47    #[doc = "Bits 0:8 - TX Data"]
48    #[inline(always)]
49    pub fn txdata0(&mut self) -> TXDATA0_W {
50        TXDATA0_W::new(self)
51    }
52    #[doc = "Bit 11 - Unblock RX After Transmission"]
53    #[inline(always)]
54    pub fn ubrxat0(&mut self) -> UBRXAT0_W {
55        UBRXAT0_W::new(self)
56    }
57    #[doc = "Bit 12 - Set TXTRI After Transmission"]
58    #[inline(always)]
59    pub fn txtriat0(&mut self) -> TXTRIAT0_W {
60        TXTRIAT0_W::new(self)
61    }
62    #[doc = "Bit 13 - Transmit Data As Break"]
63    #[inline(always)]
64    pub fn txbreak0(&mut self) -> TXBREAK0_W {
65        TXBREAK0_W::new(self)
66    }
67    #[doc = "Bit 14 - Clear TXEN After Transmission"]
68    #[inline(always)]
69    pub fn txdisat0(&mut self) -> TXDISAT0_W {
70        TXDISAT0_W::new(self)
71    }
72    #[doc = "Bit 15 - Enable RX After Transmission"]
73    #[inline(always)]
74    pub fn rxenat0(&mut self) -> RXENAT0_W {
75        RXENAT0_W::new(self)
76    }
77    #[doc = "Bits 16:24 - TX Data"]
78    #[inline(always)]
79    pub fn txdata1(&mut self) -> TXDATA1_W {
80        TXDATA1_W::new(self)
81    }
82    #[doc = "Bit 27 - Unblock RX After Transmission"]
83    #[inline(always)]
84    pub fn ubrxat1(&mut self) -> UBRXAT1_W {
85        UBRXAT1_W::new(self)
86    }
87    #[doc = "Bit 28 - Set TXTRI After Transmission"]
88    #[inline(always)]
89    pub fn txtriat1(&mut self) -> TXTRIAT1_W {
90        TXTRIAT1_W::new(self)
91    }
92    #[doc = "Bit 29 - Transmit Data As Break"]
93    #[inline(always)]
94    pub fn txbreak1(&mut self) -> TXBREAK1_W {
95        TXBREAK1_W::new(self)
96    }
97    #[doc = "Bit 30 - Clear TXEN After Transmission"]
98    #[inline(always)]
99    pub fn txdisat1(&mut self) -> TXDISAT1_W {
100        TXDISAT1_W::new(self)
101    }
102    #[doc = "Bit 31 - Enable RX After Transmission"]
103    #[inline(always)]
104    pub fn rxenat1(&mut self) -> RXENAT1_W {
105        RXENAT1_W::new(self)
106    }
107    #[doc = "Writes raw bits to the register."]
108    #[inline(always)]
109    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
110        self.0.bits(bits);
111        self
112    }
113}
114#[doc = "TX Buffer Double Data Extended Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdoublex](index.html) module"]
115pub struct TXDOUBLEX_SPEC;
116impl crate::RegisterSpec for TXDOUBLEX_SPEC {
117    type Ux = u32;
118}
119#[doc = "`write(|w| ..)` method takes [txdoublex::W](W) writer structure"]
120impl crate::Writable for TXDOUBLEX_SPEC {
121    type Writer = W;
122}
123#[doc = "`reset()` method sets TXDOUBLEX to value 0"]
124impl crate::Resettable for TXDOUBLEX_SPEC {
125    #[inline(always)]
126    fn reset_value() -> Self::Ux {
127        0
128    }
129}
efm32hg210_pac/usart0/txdoublex.rs

efm32hg210_pac/usart0/
txdoublex.rs
