Struct efm32gg990::timer2::RegisterBlock[−][src]

#[repr(C)]

pub struct RegisterBlock {
    pub ctrl: CTRL,
    pub cmd: CMD,
    pub status: STATUS,
    pub ien: IEN,
    pub if_: IF,
    pub ifs: IFS,
    pub ifc: IFC,
    pub top: TOP,
    pub topb: TOPB,
    pub cnt: CNT,
    pub route: ROUTE,
    pub cc0_ctrl: CC0_CTRL,
    pub cc0_ccv: CC0_CCV,
    pub cc0_ccvp: CC0_CCVP,
    pub cc0_ccvb: CC0_CCVB,
    pub cc1_ctrl: CC1_CTRL,
    pub cc1_ccv: CC1_CCV,
    pub cc1_ccvp: CC1_CCVP,
    pub cc1_ccvb: CC1_CCVB,
    pub cc2_ctrl: CC2_CTRL,
    pub cc2_ccv: CC2_CCV,
    pub cc2_ccvp: CC2_CCVP,
    pub cc2_ccvb: CC2_CCVB,
    pub dtctrl: DTCTRL,
    pub dttime: DTTIME,
    pub dtfc: DTFC,
    pub dtogen: DTOGEN,
    pub dtfault: DTFAULT,
    pub dtfaultc: DTFAULTC,
    pub dtlock: DTLOCK,
    // some fields omitted
}

Register block

Fields

0x00 - Control Register

0x04 - Command Register

0x08 - Status Register

0x0c - Interrupt Enable Register

0x10 - Interrupt Flag Register

0x14 - Interrupt Flag Set Register

0x18 - Interrupt Flag Clear Register

0x1c - Counter Top Value Register

0x20 - Counter Top Value Buffer Register

0x24 - Counter Value Register

0x28 - I/O Routing Register

0x30 - CC Channel Control Register

0x34 - CC Channel Value Register

0x38 - CC Channel Value Peek Register

0x3c - CC Channel Buffer Register

0x40 - CC Channel Control Register

0x44 - CC Channel Value Register

0x48 - CC Channel Value Peek Register

0x4c - CC Channel Buffer Register

0x50 - CC Channel Control Register

0x54 - CC Channel Value Register

0x58 - CC Channel Value Peek Register

0x5c - CC Channel Buffer Register

0x70 - DTI Control Register

0x74 - DTI Time Control Register

0x78 - DTI Fault Configuration Register

0x7c - DTI Output Generation Enable Register

0x80 - DTI Fault Register

0x84 - DTI Fault Clear Register

0x88 - DTI Configuration Lock Register

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