efm32gg390_pac/usb/
diep0ctl.rs

1#[doc = "Register `DIEP0CTL` reader"]
2pub struct R(crate::R<DIEP0CTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DIEP0CTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DIEP0CTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DIEP0CTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DIEP0CTL` writer"]
17pub struct W(crate::W<DIEP0CTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DIEP0CTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DIEP0CTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DIEP0CTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Maximum Packet Size\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum MPS_A {
41    #[doc = "0: 64 bytes."]
42    _64B = 0,
43    #[doc = "1: 32 bytes."]
44    _32B = 1,
45    #[doc = "2: 16 bytes."]
46    _16B = 2,
47    #[doc = "3: 8 bytes."]
48    _8B = 3,
49}
50impl From<MPS_A> for u8 {
51    #[inline(always)]
52    fn from(variant: MPS_A) -> Self {
53        variant as _
54    }
55}
56#[doc = "Field `MPS` reader - Maximum Packet Size"]
57pub type MPS_R = crate::FieldReader<u8, MPS_A>;
58impl MPS_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> MPS_A {
62        match self.bits {
63            0 => MPS_A::_64B,
64            1 => MPS_A::_32B,
65            2 => MPS_A::_16B,
66            3 => MPS_A::_8B,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `_64B`"]
71    #[inline(always)]
72    pub fn is_64b(&self) -> bool {
73        *self == MPS_A::_64B
74    }
75    #[doc = "Checks if the value of the field is `_32B`"]
76    #[inline(always)]
77    pub fn is_32b(&self) -> bool {
78        *self == MPS_A::_32B
79    }
80    #[doc = "Checks if the value of the field is `_16B`"]
81    #[inline(always)]
82    pub fn is_16b(&self) -> bool {
83        *self == MPS_A::_16B
84    }
85    #[doc = "Checks if the value of the field is `_8B`"]
86    #[inline(always)]
87    pub fn is_8b(&self) -> bool {
88        *self == MPS_A::_8B
89    }
90}
91#[doc = "Field `MPS` writer - Maximum Packet Size"]
92pub type MPS_W<'a> = crate::FieldWriterSafe<'a, u32, DIEP0CTL_SPEC, u8, MPS_A, 2, 0>;
93impl<'a> MPS_W<'a> {
94    #[doc = "64 bytes."]
95    #[inline(always)]
96    pub fn _64b(self) -> &'a mut W {
97        self.variant(MPS_A::_64B)
98    }
99    #[doc = "32 bytes."]
100    #[inline(always)]
101    pub fn _32b(self) -> &'a mut W {
102        self.variant(MPS_A::_32B)
103    }
104    #[doc = "16 bytes."]
105    #[inline(always)]
106    pub fn _16b(self) -> &'a mut W {
107        self.variant(MPS_A::_16B)
108    }
109    #[doc = "8 bytes."]
110    #[inline(always)]
111    pub fn _8b(self) -> &'a mut W {
112        self.variant(MPS_A::_8B)
113    }
114}
115#[doc = "Field `USBACTEP` reader - USB Active Endpoint"]
116pub type USBACTEP_R = crate::BitReader<bool>;
117#[doc = "Field `NAKSTS` reader - NAK Status"]
118pub type NAKSTS_R = crate::BitReader<bool>;
119#[doc = "Field `EPTYPE` reader - Endpoint Type"]
120pub type EPTYPE_R = crate::FieldReader<u8, u8>;
121#[doc = "Field `STALL` reader - Handshake"]
122pub type STALL_R = crate::BitReader<bool>;
123#[doc = "Field `STALL` writer - Handshake"]
124pub type STALL_W<'a> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, 21>;
125#[doc = "Field `TXFNUM` reader - TxFIFO Number"]
126pub type TXFNUM_R = crate::FieldReader<u8, u8>;
127#[doc = "Field `TXFNUM` writer - TxFIFO Number"]
128pub type TXFNUM_W<'a> = crate::FieldWriter<'a, u32, DIEP0CTL_SPEC, u8, u8, 4, 22>;
129#[doc = "Field `CNAK` writer - Clear NAK"]
130pub type CNAK_W<'a> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, 26>;
131#[doc = "Field `SNAK` writer - Set NAK"]
132pub type SNAK_W<'a> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, 27>;
133#[doc = "Field `EPDIS` reader - Endpoint Disable"]
134pub type EPDIS_R = crate::BitReader<bool>;
135#[doc = "Field `EPDIS` writer - Endpoint Disable"]
136pub type EPDIS_W<'a> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, 30>;
137#[doc = "Field `EPENA` reader - Endpoint Enable"]
138pub type EPENA_R = crate::BitReader<bool>;
139#[doc = "Field `EPENA` writer - Endpoint Enable"]
140pub type EPENA_W<'a> = crate::BitWriter<'a, u32, DIEP0CTL_SPEC, bool, 31>;
141impl R {
142    #[doc = "Bits 0:1 - Maximum Packet Size"]
143    #[inline(always)]
144    pub fn mps(&self) -> MPS_R {
145        MPS_R::new((self.bits & 3) as u8)
146    }
147    #[doc = "Bit 15 - USB Active Endpoint"]
148    #[inline(always)]
149    pub fn usbactep(&self) -> USBACTEP_R {
150        USBACTEP_R::new(((self.bits >> 15) & 1) != 0)
151    }
152    #[doc = "Bit 17 - NAK Status"]
153    #[inline(always)]
154    pub fn naksts(&self) -> NAKSTS_R {
155        NAKSTS_R::new(((self.bits >> 17) & 1) != 0)
156    }
157    #[doc = "Bits 18:19 - Endpoint Type"]
158    #[inline(always)]
159    pub fn eptype(&self) -> EPTYPE_R {
160        EPTYPE_R::new(((self.bits >> 18) & 3) as u8)
161    }
162    #[doc = "Bit 21 - Handshake"]
163    #[inline(always)]
164    pub fn stall(&self) -> STALL_R {
165        STALL_R::new(((self.bits >> 21) & 1) != 0)
166    }
167    #[doc = "Bits 22:25 - TxFIFO Number"]
168    #[inline(always)]
169    pub fn txfnum(&self) -> TXFNUM_R {
170        TXFNUM_R::new(((self.bits >> 22) & 0x0f) as u8)
171    }
172    #[doc = "Bit 30 - Endpoint Disable"]
173    #[inline(always)]
174    pub fn epdis(&self) -> EPDIS_R {
175        EPDIS_R::new(((self.bits >> 30) & 1) != 0)
176    }
177    #[doc = "Bit 31 - Endpoint Enable"]
178    #[inline(always)]
179    pub fn epena(&self) -> EPENA_R {
180        EPENA_R::new(((self.bits >> 31) & 1) != 0)
181    }
182}
183impl W {
184    #[doc = "Bits 0:1 - Maximum Packet Size"]
185    #[inline(always)]
186    pub fn mps(&mut self) -> MPS_W {
187        MPS_W::new(self)
188    }
189    #[doc = "Bit 21 - Handshake"]
190    #[inline(always)]
191    pub fn stall(&mut self) -> STALL_W {
192        STALL_W::new(self)
193    }
194    #[doc = "Bits 22:25 - TxFIFO Number"]
195    #[inline(always)]
196    pub fn txfnum(&mut self) -> TXFNUM_W {
197        TXFNUM_W::new(self)
198    }
199    #[doc = "Bit 26 - Clear NAK"]
200    #[inline(always)]
201    pub fn cnak(&mut self) -> CNAK_W {
202        CNAK_W::new(self)
203    }
204    #[doc = "Bit 27 - Set NAK"]
205    #[inline(always)]
206    pub fn snak(&mut self) -> SNAK_W {
207        SNAK_W::new(self)
208    }
209    #[doc = "Bit 30 - Endpoint Disable"]
210    #[inline(always)]
211    pub fn epdis(&mut self) -> EPDIS_W {
212        EPDIS_W::new(self)
213    }
214    #[doc = "Bit 31 - Endpoint Enable"]
215    #[inline(always)]
216    pub fn epena(&mut self) -> EPENA_W {
217        EPENA_W::new(self)
218    }
219    #[doc = "Writes raw bits to the register."]
220    #[inline(always)]
221    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
222        self.0.bits(bits);
223        self
224    }
225}
226#[doc = "Device IN Endpoint 0 Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep0ctl](index.html) module"]
227pub struct DIEP0CTL_SPEC;
228impl crate::RegisterSpec for DIEP0CTL_SPEC {
229    type Ux = u32;
230}
231#[doc = "`read()` method returns [diep0ctl::R](R) reader structure"]
232impl crate::Readable for DIEP0CTL_SPEC {
233    type Reader = R;
234}
235#[doc = "`write(|w| ..)` method takes [diep0ctl::W](W) writer structure"]
236impl crate::Writable for DIEP0CTL_SPEC {
237    type Writer = W;
238}
239#[doc = "`reset()` method sets DIEP0CTL to value 0x8000"]
240impl crate::Resettable for DIEP0CTL_SPEC {
241    #[inline(always)]
242    fn reset_value() -> Self::Ux {
243        0x8000
244    }
245}