efm32gg290_pac/ebi/
nandctrl.rs1#[doc = "Register `NANDCTRL` reader"]
2pub struct R(crate::R<NANDCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<NANDCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<NANDCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<NANDCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `NANDCTRL` writer"]
17pub struct W(crate::W<NANDCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<NANDCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<NANDCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<NANDCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `EN` reader - NAND Flash control enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - NAND Flash control enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, NANDCTRL_SPEC, bool, 0>;
41#[doc = "NAND Flash Bank\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum BANKSEL_A {
45 #[doc = "0: Memory bank 0 is connected to a NAND Flash device."]
46 BANK0 = 0,
47 #[doc = "1: Memory bank 1 is connected to a NAND Flash device."]
48 BANK1 = 1,
49 #[doc = "2: Memory bank 2 is connected to a NAND Flash device."]
50 BANK2 = 2,
51 #[doc = "3: Memory bank 3 is connected to a NAND Flash device."]
52 BANK3 = 3,
53}
54impl From<BANKSEL_A> for u8 {
55 #[inline(always)]
56 fn from(variant: BANKSEL_A) -> Self {
57 variant as _
58 }
59}
60#[doc = "Field `BANKSEL` reader - NAND Flash Bank"]
61pub type BANKSEL_R = crate::FieldReader<u8, BANKSEL_A>;
62impl BANKSEL_R {
63 #[doc = "Get enumerated values variant"]
64 #[inline(always)]
65 pub fn variant(&self) -> BANKSEL_A {
66 match self.bits {
67 0 => BANKSEL_A::BANK0,
68 1 => BANKSEL_A::BANK1,
69 2 => BANKSEL_A::BANK2,
70 3 => BANKSEL_A::BANK3,
71 _ => unreachable!(),
72 }
73 }
74 #[doc = "Checks if the value of the field is `BANK0`"]
75 #[inline(always)]
76 pub fn is_bank0(&self) -> bool {
77 *self == BANKSEL_A::BANK0
78 }
79 #[doc = "Checks if the value of the field is `BANK1`"]
80 #[inline(always)]
81 pub fn is_bank1(&self) -> bool {
82 *self == BANKSEL_A::BANK1
83 }
84 #[doc = "Checks if the value of the field is `BANK2`"]
85 #[inline(always)]
86 pub fn is_bank2(&self) -> bool {
87 *self == BANKSEL_A::BANK2
88 }
89 #[doc = "Checks if the value of the field is `BANK3`"]
90 #[inline(always)]
91 pub fn is_bank3(&self) -> bool {
92 *self == BANKSEL_A::BANK3
93 }
94}
95#[doc = "Field `BANKSEL` writer - NAND Flash Bank"]
96pub type BANKSEL_W<'a> = crate::FieldWriterSafe<'a, u32, NANDCTRL_SPEC, u8, BANKSEL_A, 2, 4>;
97impl<'a> BANKSEL_W<'a> {
98 #[doc = "Memory bank 0 is connected to a NAND Flash device."]
99 #[inline(always)]
100 pub fn bank0(self) -> &'a mut W {
101 self.variant(BANKSEL_A::BANK0)
102 }
103 #[doc = "Memory bank 1 is connected to a NAND Flash device."]
104 #[inline(always)]
105 pub fn bank1(self) -> &'a mut W {
106 self.variant(BANKSEL_A::BANK1)
107 }
108 #[doc = "Memory bank 2 is connected to a NAND Flash device."]
109 #[inline(always)]
110 pub fn bank2(self) -> &'a mut W {
111 self.variant(BANKSEL_A::BANK2)
112 }
113 #[doc = "Memory bank 3 is connected to a NAND Flash device."]
114 #[inline(always)]
115 pub fn bank3(self) -> &'a mut W {
116 self.variant(BANKSEL_A::BANK3)
117 }
118}
119impl R {
120 #[doc = "Bit 0 - NAND Flash control enable"]
121 #[inline(always)]
122 pub fn en(&self) -> EN_R {
123 EN_R::new((self.bits & 1) != 0)
124 }
125 #[doc = "Bits 4:5 - NAND Flash Bank"]
126 #[inline(always)]
127 pub fn banksel(&self) -> BANKSEL_R {
128 BANKSEL_R::new(((self.bits >> 4) & 3) as u8)
129 }
130}
131impl W {
132 #[doc = "Bit 0 - NAND Flash control enable"]
133 #[inline(always)]
134 pub fn en(&mut self) -> EN_W {
135 EN_W::new(self)
136 }
137 #[doc = "Bits 4:5 - NAND Flash Bank"]
138 #[inline(always)]
139 pub fn banksel(&mut self) -> BANKSEL_W {
140 BANKSEL_W::new(self)
141 }
142 #[doc = "Writes raw bits to the register."]
143 #[inline(always)]
144 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
145 self.0.bits(bits);
146 self
147 }
148}
149#[doc = "NAND Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nandctrl](index.html) module"]
150pub struct NANDCTRL_SPEC;
151impl crate::RegisterSpec for NANDCTRL_SPEC {
152 type Ux = u32;
153}
154#[doc = "`read()` method returns [nandctrl::R](R) reader structure"]
155impl crate::Readable for NANDCTRL_SPEC {
156 type Reader = R;
157}
158#[doc = "`write(|w| ..)` method takes [nandctrl::W](W) writer structure"]
159impl crate::Writable for NANDCTRL_SPEC {
160 type Writer = W;
161}
162#[doc = "`reset()` method sets NANDCTRL to value 0"]
163impl crate::Resettable for NANDCTRL_SPEC {
164 #[inline(always)]
165 fn reset_value() -> Self::Ux {
166 0
167 }
168}