efm32gg12b830_pac/sdio/
ac12errstat.rs

1#[doc = "Register `AC12ERRSTAT` reader"]
2pub struct R(crate::R<AC12ERRSTAT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<AC12ERRSTAT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<AC12ERRSTAT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<AC12ERRSTAT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `AC12ERRSTAT` writer"]
17pub struct W(crate::W<AC12ERRSTAT_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<AC12ERRSTAT_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<AC12ERRSTAT_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<AC12ERRSTAT_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `AC12NOTEXE` reader - Auto CMD12 Not Executed"]
38pub type AC12NOTEXE_R = crate::BitReader<bool>;
39#[doc = "Field `AC12TOE` reader - Auto CMD12 Timeout Error"]
40pub type AC12TOE_R = crate::BitReader<bool>;
41#[doc = "Field `AC12CRCERR` reader - Auto CMD CRC Error"]
42pub type AC12CRCERR_R = crate::BitReader<bool>;
43#[doc = "Field `AC12ENDBITERR` reader - Auto CMD End Bit Error"]
44pub type AC12ENDBITERR_R = crate::BitReader<bool>;
45#[doc = "Field `AC12INDEXERR` reader - Auto CMD Index Error"]
46pub type AC12INDEXERR_R = crate::BitReader<bool>;
47#[doc = "Field `CNIBAC12ERR` reader - Command Not Issued By Auto CMD12 Error"]
48pub type CNIBAC12ERR_R = crate::BitReader<bool>;
49#[doc = "UHS Mode Select\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51#[repr(u8)]
52pub enum UHSMODESEL_A {
53    #[doc = "0: SDR12"]
54    SDR12 = 0,
55    #[doc = "1: SDR25"]
56    SDR25 = 1,
57    #[doc = "2: SDR50"]
58    SDR50 = 2,
59    #[doc = "3: SDR104"]
60    SDR104 = 3,
61    #[doc = "4: DDR50"]
62    DDR50 = 4,
63}
64impl From<UHSMODESEL_A> for u8 {
65    #[inline(always)]
66    fn from(variant: UHSMODESEL_A) -> Self {
67        variant as _
68    }
69}
70#[doc = "Field `UHSMODESEL` reader - UHS Mode Select"]
71pub type UHSMODESEL_R = crate::FieldReader<u8, UHSMODESEL_A>;
72impl UHSMODESEL_R {
73    #[doc = "Get enumerated values variant"]
74    #[inline(always)]
75    pub fn variant(&self) -> Option<UHSMODESEL_A> {
76        match self.bits {
77            0 => Some(UHSMODESEL_A::SDR12),
78            1 => Some(UHSMODESEL_A::SDR25),
79            2 => Some(UHSMODESEL_A::SDR50),
80            3 => Some(UHSMODESEL_A::SDR104),
81            4 => Some(UHSMODESEL_A::DDR50),
82            _ => None,
83        }
84    }
85    #[doc = "Checks if the value of the field is `SDR12`"]
86    #[inline(always)]
87    pub fn is_sdr12(&self) -> bool {
88        *self == UHSMODESEL_A::SDR12
89    }
90    #[doc = "Checks if the value of the field is `SDR25`"]
91    #[inline(always)]
92    pub fn is_sdr25(&self) -> bool {
93        *self == UHSMODESEL_A::SDR25
94    }
95    #[doc = "Checks if the value of the field is `SDR50`"]
96    #[inline(always)]
97    pub fn is_sdr50(&self) -> bool {
98        *self == UHSMODESEL_A::SDR50
99    }
100    #[doc = "Checks if the value of the field is `SDR104`"]
101    #[inline(always)]
102    pub fn is_sdr104(&self) -> bool {
103        *self == UHSMODESEL_A::SDR104
104    }
105    #[doc = "Checks if the value of the field is `DDR50`"]
106    #[inline(always)]
107    pub fn is_ddr50(&self) -> bool {
108        *self == UHSMODESEL_A::DDR50
109    }
110}
111#[doc = "Field `UHSMODESEL` writer - UHS Mode Select"]
112pub type UHSMODESEL_W<'a> = crate::FieldWriter<'a, u32, AC12ERRSTAT_SPEC, u8, UHSMODESEL_A, 3, 16>;
113impl<'a> UHSMODESEL_W<'a> {
114    #[doc = "SDR12"]
115    #[inline(always)]
116    pub fn sdr12(self) -> &'a mut W {
117        self.variant(UHSMODESEL_A::SDR12)
118    }
119    #[doc = "SDR25"]
120    #[inline(always)]
121    pub fn sdr25(self) -> &'a mut W {
122        self.variant(UHSMODESEL_A::SDR25)
123    }
124    #[doc = "SDR50"]
125    #[inline(always)]
126    pub fn sdr50(self) -> &'a mut W {
127        self.variant(UHSMODESEL_A::SDR50)
128    }
129    #[doc = "SDR104"]
130    #[inline(always)]
131    pub fn sdr104(self) -> &'a mut W {
132        self.variant(UHSMODESEL_A::SDR104)
133    }
134    #[doc = "DDR50"]
135    #[inline(always)]
136    pub fn ddr50(self) -> &'a mut W {
137        self.variant(UHSMODESEL_A::DDR50)
138    }
139}
140#[doc = "Field `SIGEN1P8V` reader - Voltage 1.8V Signal Enable"]
141pub type SIGEN1P8V_R = crate::BitReader<bool>;
142#[doc = "Field `SIGEN1P8V` writer - Voltage 1.8V Signal Enable"]
143pub type SIGEN1P8V_W<'a> = crate::BitWriter<'a, u32, AC12ERRSTAT_SPEC, bool, 19>;
144#[doc = "Driver Strength Select\n\nValue on reset: 0"]
145#[derive(Clone, Copy, Debug, PartialEq)]
146#[repr(u8)]
147pub enum DRVSTNSEL_A {
148    #[doc = "0: Driver Type B is selected (Default)"]
149    TYPEB = 0,
150    #[doc = "1: Driver Type A is selected"]
151    TYPEA = 1,
152    #[doc = "2: Driver Type C is selected"]
153    TYPEC = 2,
154    #[doc = "3: Driver Type D is selected"]
155    TYPED = 3,
156}
157impl From<DRVSTNSEL_A> for u8 {
158    #[inline(always)]
159    fn from(variant: DRVSTNSEL_A) -> Self {
160        variant as _
161    }
162}
163#[doc = "Field `DRVSTNSEL` reader - Driver Strength Select"]
164pub type DRVSTNSEL_R = crate::FieldReader<u8, DRVSTNSEL_A>;
165impl DRVSTNSEL_R {
166    #[doc = "Get enumerated values variant"]
167    #[inline(always)]
168    pub fn variant(&self) -> DRVSTNSEL_A {
169        match self.bits {
170            0 => DRVSTNSEL_A::TYPEB,
171            1 => DRVSTNSEL_A::TYPEA,
172            2 => DRVSTNSEL_A::TYPEC,
173            3 => DRVSTNSEL_A::TYPED,
174            _ => unreachable!(),
175        }
176    }
177    #[doc = "Checks if the value of the field is `TYPEB`"]
178    #[inline(always)]
179    pub fn is_typeb(&self) -> bool {
180        *self == DRVSTNSEL_A::TYPEB
181    }
182    #[doc = "Checks if the value of the field is `TYPEA`"]
183    #[inline(always)]
184    pub fn is_typea(&self) -> bool {
185        *self == DRVSTNSEL_A::TYPEA
186    }
187    #[doc = "Checks if the value of the field is `TYPEC`"]
188    #[inline(always)]
189    pub fn is_typec(&self) -> bool {
190        *self == DRVSTNSEL_A::TYPEC
191    }
192    #[doc = "Checks if the value of the field is `TYPED`"]
193    #[inline(always)]
194    pub fn is_typed(&self) -> bool {
195        *self == DRVSTNSEL_A::TYPED
196    }
197}
198#[doc = "Field `DRVSTNSEL` writer - Driver Strength Select"]
199pub type DRVSTNSEL_W<'a> =
200    crate::FieldWriterSafe<'a, u32, AC12ERRSTAT_SPEC, u8, DRVSTNSEL_A, 2, 20>;
201impl<'a> DRVSTNSEL_W<'a> {
202    #[doc = "Driver Type B is selected (Default)"]
203    #[inline(always)]
204    pub fn typeb(self) -> &'a mut W {
205        self.variant(DRVSTNSEL_A::TYPEB)
206    }
207    #[doc = "Driver Type A is selected"]
208    #[inline(always)]
209    pub fn typea(self) -> &'a mut W {
210        self.variant(DRVSTNSEL_A::TYPEA)
211    }
212    #[doc = "Driver Type C is selected"]
213    #[inline(always)]
214    pub fn typec(self) -> &'a mut W {
215        self.variant(DRVSTNSEL_A::TYPEC)
216    }
217    #[doc = "Driver Type D is selected"]
218    #[inline(always)]
219    pub fn typed(self) -> &'a mut W {
220        self.variant(DRVSTNSEL_A::TYPED)
221    }
222}
223#[doc = "Field `EXETUNING` reader - Execute Tuning"]
224pub type EXETUNING_R = crate::BitReader<bool>;
225#[doc = "Field `EXETUNING` writer - Execute Tuning"]
226pub type EXETUNING_W<'a> = crate::BitWriter<'a, u32, AC12ERRSTAT_SPEC, bool, 22>;
227#[doc = "Field `SAMPCLKSEL` reader - Sampling Clock Select"]
228pub type SAMPCLKSEL_R = crate::BitReader<bool>;
229#[doc = "Field `SAMPCLKSEL` writer - Sampling Clock Select"]
230pub type SAMPCLKSEL_W<'a> = crate::BitWriter<'a, u32, AC12ERRSTAT_SPEC, bool, 23>;
231#[doc = "Field `ASYNCINTEN` reader - Asynchronous Interrupt Enable"]
232pub type ASYNCINTEN_R = crate::BitReader<bool>;
233#[doc = "Field `ASYNCINTEN` writer - Asynchronous Interrupt Enable"]
234pub type ASYNCINTEN_W<'a> = crate::BitWriter<'a, u32, AC12ERRSTAT_SPEC, bool, 30>;
235#[doc = "Field `PRSTVALEN` reader - Preset Value Enable"]
236pub type PRSTVALEN_R = crate::BitReader<bool>;
237#[doc = "Field `PRSTVALEN` writer - Preset Value Enable"]
238pub type PRSTVALEN_W<'a> = crate::BitWriter<'a, u32, AC12ERRSTAT_SPEC, bool, 31>;
239impl R {
240    #[doc = "Bit 0 - Auto CMD12 Not Executed"]
241    #[inline(always)]
242    pub fn ac12notexe(&self) -> AC12NOTEXE_R {
243        AC12NOTEXE_R::new((self.bits & 1) != 0)
244    }
245    #[doc = "Bit 1 - Auto CMD12 Timeout Error"]
246    #[inline(always)]
247    pub fn ac12toe(&self) -> AC12TOE_R {
248        AC12TOE_R::new(((self.bits >> 1) & 1) != 0)
249    }
250    #[doc = "Bit 2 - Auto CMD CRC Error"]
251    #[inline(always)]
252    pub fn ac12crcerr(&self) -> AC12CRCERR_R {
253        AC12CRCERR_R::new(((self.bits >> 2) & 1) != 0)
254    }
255    #[doc = "Bit 3 - Auto CMD End Bit Error"]
256    #[inline(always)]
257    pub fn ac12endbiterr(&self) -> AC12ENDBITERR_R {
258        AC12ENDBITERR_R::new(((self.bits >> 3) & 1) != 0)
259    }
260    #[doc = "Bit 4 - Auto CMD Index Error"]
261    #[inline(always)]
262    pub fn ac12indexerr(&self) -> AC12INDEXERR_R {
263        AC12INDEXERR_R::new(((self.bits >> 4) & 1) != 0)
264    }
265    #[doc = "Bit 7 - Command Not Issued By Auto CMD12 Error"]
266    #[inline(always)]
267    pub fn cnibac12err(&self) -> CNIBAC12ERR_R {
268        CNIBAC12ERR_R::new(((self.bits >> 7) & 1) != 0)
269    }
270    #[doc = "Bits 16:18 - UHS Mode Select"]
271    #[inline(always)]
272    pub fn uhsmodesel(&self) -> UHSMODESEL_R {
273        UHSMODESEL_R::new(((self.bits >> 16) & 7) as u8)
274    }
275    #[doc = "Bit 19 - Voltage 1.8V Signal Enable"]
276    #[inline(always)]
277    pub fn sigen1p8v(&self) -> SIGEN1P8V_R {
278        SIGEN1P8V_R::new(((self.bits >> 19) & 1) != 0)
279    }
280    #[doc = "Bits 20:21 - Driver Strength Select"]
281    #[inline(always)]
282    pub fn drvstnsel(&self) -> DRVSTNSEL_R {
283        DRVSTNSEL_R::new(((self.bits >> 20) & 3) as u8)
284    }
285    #[doc = "Bit 22 - Execute Tuning"]
286    #[inline(always)]
287    pub fn exetuning(&self) -> EXETUNING_R {
288        EXETUNING_R::new(((self.bits >> 22) & 1) != 0)
289    }
290    #[doc = "Bit 23 - Sampling Clock Select"]
291    #[inline(always)]
292    pub fn sampclksel(&self) -> SAMPCLKSEL_R {
293        SAMPCLKSEL_R::new(((self.bits >> 23) & 1) != 0)
294    }
295    #[doc = "Bit 30 - Asynchronous Interrupt Enable"]
296    #[inline(always)]
297    pub fn asyncinten(&self) -> ASYNCINTEN_R {
298        ASYNCINTEN_R::new(((self.bits >> 30) & 1) != 0)
299    }
300    #[doc = "Bit 31 - Preset Value Enable"]
301    #[inline(always)]
302    pub fn prstvalen(&self) -> PRSTVALEN_R {
303        PRSTVALEN_R::new(((self.bits >> 31) & 1) != 0)
304    }
305}
306impl W {
307    #[doc = "Bits 16:18 - UHS Mode Select"]
308    #[inline(always)]
309    pub fn uhsmodesel(&mut self) -> UHSMODESEL_W {
310        UHSMODESEL_W::new(self)
311    }
312    #[doc = "Bit 19 - Voltage 1.8V Signal Enable"]
313    #[inline(always)]
314    pub fn sigen1p8v(&mut self) -> SIGEN1P8V_W {
315        SIGEN1P8V_W::new(self)
316    }
317    #[doc = "Bits 20:21 - Driver Strength Select"]
318    #[inline(always)]
319    pub fn drvstnsel(&mut self) -> DRVSTNSEL_W {
320        DRVSTNSEL_W::new(self)
321    }
322    #[doc = "Bit 22 - Execute Tuning"]
323    #[inline(always)]
324    pub fn exetuning(&mut self) -> EXETUNING_W {
325        EXETUNING_W::new(self)
326    }
327    #[doc = "Bit 23 - Sampling Clock Select"]
328    #[inline(always)]
329    pub fn sampclksel(&mut self) -> SAMPCLKSEL_W {
330        SAMPCLKSEL_W::new(self)
331    }
332    #[doc = "Bit 30 - Asynchronous Interrupt Enable"]
333    #[inline(always)]
334    pub fn asyncinten(&mut self) -> ASYNCINTEN_W {
335        ASYNCINTEN_W::new(self)
336    }
337    #[doc = "Bit 31 - Preset Value Enable"]
338    #[inline(always)]
339    pub fn prstvalen(&mut self) -> PRSTVALEN_W {
340        PRSTVALEN_W::new(self)
341    }
342    #[doc = "Writes raw bits to the register."]
343    #[inline(always)]
344    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
345        self.0.bits(bits);
346        self
347    }
348}
349#[doc = "AUTO CMD12 Error Status and Host Control2 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ac12errstat](index.html) module"]
350pub struct AC12ERRSTAT_SPEC;
351impl crate::RegisterSpec for AC12ERRSTAT_SPEC {
352    type Ux = u32;
353}
354#[doc = "`read()` method returns [ac12errstat::R](R) reader structure"]
355impl crate::Readable for AC12ERRSTAT_SPEC {
356    type Reader = R;
357}
358#[doc = "`write(|w| ..)` method takes [ac12errstat::W](W) writer structure"]
359impl crate::Writable for AC12ERRSTAT_SPEC {
360    type Writer = W;
361}
362#[doc = "`reset()` method sets AC12ERRSTAT to value 0"]
363impl crate::Resettable for AC12ERRSTAT_SPEC {
364    #[inline(always)]
365    fn reset_value() -> Self::Ux {
366        0
367    }
368}
efm32gg12b830_pac/sdio/ac12errstat.rs

efm32gg12b830_pac/sdio/
ac12errstat.rs
