efm32gg12b830_pac/vdac0/
opa1_aportconflict.rs

1#[doc = "Register `OPA1_APORTCONFLICT` reader"]
2pub struct R(crate::R<OPA1_APORTCONFLICT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<OPA1_APORTCONFLICT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<OPA1_APORTCONFLICT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<OPA1_APORTCONFLICT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `APORT1XCONFLICT` reader - 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral"]
17pub type APORT1XCONFLICT_R = crate::BitReader<bool>;
18#[doc = "Field `APORT1YCONFLICT` reader - 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral"]
19pub type APORT1YCONFLICT_R = crate::BitReader<bool>;
20#[doc = "Field `APORT2XCONFLICT` reader - 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral"]
21pub type APORT2XCONFLICT_R = crate::BitReader<bool>;
22#[doc = "Field `APORT2YCONFLICT` reader - 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral"]
23pub type APORT2YCONFLICT_R = crate::BitReader<bool>;
24#[doc = "Field `APORT3XCONFLICT` reader - 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral"]
25pub type APORT3XCONFLICT_R = crate::BitReader<bool>;
26#[doc = "Field `APORT3YCONFLICT` reader - 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral"]
27pub type APORT3YCONFLICT_R = crate::BitReader<bool>;
28#[doc = "Field `APORT4XCONFLICT` reader - 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral"]
29pub type APORT4XCONFLICT_R = crate::BitReader<bool>;
30#[doc = "Field `APORT4YCONFLICT` reader - 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral"]
31pub type APORT4YCONFLICT_R = crate::BitReader<bool>;
32impl R {
33    #[doc = "Bit 2 - 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral"]
34    #[inline(always)]
35    pub fn aport1xconflict(&self) -> APORT1XCONFLICT_R {
36        APORT1XCONFLICT_R::new(((self.bits >> 2) & 1) != 0)
37    }
38    #[doc = "Bit 3 - 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral"]
39    #[inline(always)]
40    pub fn aport1yconflict(&self) -> APORT1YCONFLICT_R {
41        APORT1YCONFLICT_R::new(((self.bits >> 3) & 1) != 0)
42    }
43    #[doc = "Bit 4 - 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral"]
44    #[inline(always)]
45    pub fn aport2xconflict(&self) -> APORT2XCONFLICT_R {
46        APORT2XCONFLICT_R::new(((self.bits >> 4) & 1) != 0)
47    }
48    #[doc = "Bit 5 - 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral"]
49    #[inline(always)]
50    pub fn aport2yconflict(&self) -> APORT2YCONFLICT_R {
51        APORT2YCONFLICT_R::new(((self.bits >> 5) & 1) != 0)
52    }
53    #[doc = "Bit 6 - 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral"]
54    #[inline(always)]
55    pub fn aport3xconflict(&self) -> APORT3XCONFLICT_R {
56        APORT3XCONFLICT_R::new(((self.bits >> 6) & 1) != 0)
57    }
58    #[doc = "Bit 7 - 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral"]
59    #[inline(always)]
60    pub fn aport3yconflict(&self) -> APORT3YCONFLICT_R {
61        APORT3YCONFLICT_R::new(((self.bits >> 7) & 1) != 0)
62    }
63    #[doc = "Bit 8 - 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral"]
64    #[inline(always)]
65    pub fn aport4xconflict(&self) -> APORT4XCONFLICT_R {
66        APORT4XCONFLICT_R::new(((self.bits >> 8) & 1) != 0)
67    }
68    #[doc = "Bit 9 - 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral"]
69    #[inline(always)]
70    pub fn aport4yconflict(&self) -> APORT4YCONFLICT_R {
71        APORT4YCONFLICT_R::new(((self.bits >> 9) & 1) != 0)
72    }
73}
74#[doc = "Operational Amplifier APORT Conflict Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [opa1_aportconflict](index.html) module"]
75pub struct OPA1_APORTCONFLICT_SPEC;
76impl crate::RegisterSpec for OPA1_APORTCONFLICT_SPEC {
77    type Ux = u32;
78}
79#[doc = "`read()` method returns [opa1_aportconflict::R](R) reader structure"]
80impl crate::Readable for OPA1_APORTCONFLICT_SPEC {
81    type Reader = R;
82}
83#[doc = "`reset()` method sets OPA1_APORTCONFLICT to value 0"]
84impl crate::Resettable for OPA1_APORTCONFLICT_SPEC {
85    #[inline(always)]
86    fn reset_value() -> Self::Ux {
87        0
88    }
89}
efm32gg12b830_pac/vdac0/opa1_aportconflict.rs

efm32gg12b830_pac/vdac0/
opa1_aportconflict.rs
