efm32gg12b830_pac/usart3/
routepen.rs

1#[doc = "Register `ROUTEPEN` reader"]
2pub struct R(crate::R<ROUTEPEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTEPEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTEPEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTEPEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTEPEN` writer"]
17pub struct W(crate::W<ROUTEPEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTEPEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTEPEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTEPEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `RXPEN` reader - RX Pin Enable"]
38pub type RXPEN_R = crate::BitReader<bool>;
39#[doc = "Field `RXPEN` writer - RX Pin Enable"]
40pub type RXPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 0>;
41#[doc = "Field `TXPEN` reader - TX Pin Enable"]
42pub type TXPEN_R = crate::BitReader<bool>;
43#[doc = "Field `TXPEN` writer - TX Pin Enable"]
44pub type TXPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 1>;
45#[doc = "Field `CSPEN` reader - CS Pin Enable"]
46pub type CSPEN_R = crate::BitReader<bool>;
47#[doc = "Field `CSPEN` writer - CS Pin Enable"]
48pub type CSPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 2>;
49#[doc = "Field `CLKPEN` reader - CLK Pin Enable"]
50pub type CLKPEN_R = crate::BitReader<bool>;
51#[doc = "Field `CLKPEN` writer - CLK Pin Enable"]
52pub type CLKPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 3>;
53#[doc = "Field `CTSPEN` reader - CTS Pin Enable"]
54pub type CTSPEN_R = crate::BitReader<bool>;
55#[doc = "Field `CTSPEN` writer - CTS Pin Enable"]
56pub type CTSPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 4>;
57#[doc = "Field `RTSPEN` reader - RTS Pin Enable"]
58pub type RTSPEN_R = crate::BitReader<bool>;
59#[doc = "Field `RTSPEN` writer - RTS Pin Enable"]
60pub type RTSPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 5>;
61impl R {
62    #[doc = "Bit 0 - RX Pin Enable"]
63    #[inline(always)]
64    pub fn rxpen(&self) -> RXPEN_R {
65        RXPEN_R::new((self.bits & 1) != 0)
66    }
67    #[doc = "Bit 1 - TX Pin Enable"]
68    #[inline(always)]
69    pub fn txpen(&self) -> TXPEN_R {
70        TXPEN_R::new(((self.bits >> 1) & 1) != 0)
71    }
72    #[doc = "Bit 2 - CS Pin Enable"]
73    #[inline(always)]
74    pub fn cspen(&self) -> CSPEN_R {
75        CSPEN_R::new(((self.bits >> 2) & 1) != 0)
76    }
77    #[doc = "Bit 3 - CLK Pin Enable"]
78    #[inline(always)]
79    pub fn clkpen(&self) -> CLKPEN_R {
80        CLKPEN_R::new(((self.bits >> 3) & 1) != 0)
81    }
82    #[doc = "Bit 4 - CTS Pin Enable"]
83    #[inline(always)]
84    pub fn ctspen(&self) -> CTSPEN_R {
85        CTSPEN_R::new(((self.bits >> 4) & 1) != 0)
86    }
87    #[doc = "Bit 5 - RTS Pin Enable"]
88    #[inline(always)]
89    pub fn rtspen(&self) -> RTSPEN_R {
90        RTSPEN_R::new(((self.bits >> 5) & 1) != 0)
91    }
92}
93impl W {
94    #[doc = "Bit 0 - RX Pin Enable"]
95    #[inline(always)]
96    pub fn rxpen(&mut self) -> RXPEN_W {
97        RXPEN_W::new(self)
98    }
99    #[doc = "Bit 1 - TX Pin Enable"]
100    #[inline(always)]
101    pub fn txpen(&mut self) -> TXPEN_W {
102        TXPEN_W::new(self)
103    }
104    #[doc = "Bit 2 - CS Pin Enable"]
105    #[inline(always)]
106    pub fn cspen(&mut self) -> CSPEN_W {
107        CSPEN_W::new(self)
108    }
109    #[doc = "Bit 3 - CLK Pin Enable"]
110    #[inline(always)]
111    pub fn clkpen(&mut self) -> CLKPEN_W {
112        CLKPEN_W::new(self)
113    }
114    #[doc = "Bit 4 - CTS Pin Enable"]
115    #[inline(always)]
116    pub fn ctspen(&mut self) -> CTSPEN_W {
117        CTSPEN_W::new(self)
118    }
119    #[doc = "Bit 5 - RTS Pin Enable"]
120    #[inline(always)]
121    pub fn rtspen(&mut self) -> RTSPEN_W {
122        RTSPEN_W::new(self)
123    }
124    #[doc = "Writes raw bits to the register."]
125    #[inline(always)]
126    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
127        self.0.bits(bits);
128        self
129    }
130}
131#[doc = "I/O Routing Pin Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [routepen](index.html) module"]
132pub struct ROUTEPEN_SPEC;
133impl crate::RegisterSpec for ROUTEPEN_SPEC {
134    type Ux = u32;
135}
136#[doc = "`read()` method returns [routepen::R](R) reader structure"]
137impl crate::Readable for ROUTEPEN_SPEC {
138    type Reader = R;
139}
140#[doc = "`write(|w| ..)` method takes [routepen::W](W) writer structure"]
141impl crate::Writable for ROUTEPEN_SPEC {
142    type Writer = W;
143}
144#[doc = "`reset()` method sets ROUTEPEN to value 0"]
145impl crate::Resettable for ROUTEPEN_SPEC {
146    #[inline(always)]
147    fn reset_value() -> Self::Ux {
148        0
149    }
150}
efm32gg12b830_pac/usart3/routepen.rs

efm32gg12b830_pac/usart3/
routepen.rs
