efm32gg12b810_pac/sdio/
cfgpresetval3.rs

1#[doc = "Register `CFGPRESETVAL3` reader"]
2pub struct R(crate::R<CFGPRESETVAL3_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CFGPRESETVAL3_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CFGPRESETVAL3_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CFGPRESETVAL3_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CFGPRESETVAL3` writer"]
17pub struct W(crate::W<CFGPRESETVAL3_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CFGPRESETVAL3_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CFGPRESETVAL3_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CFGPRESETVAL3_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SDR104SDCLKFREQ` reader - SDR104 SD_CLK Frequency"]
38pub type SDR104SDCLKFREQ_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `SDR104SDCLKFREQ` writer - SDR104 SD_CLK Frequency"]
40pub type SDR104SDCLKFREQ_W<'a> = crate::FieldWriter<'a, u32, CFGPRESETVAL3_SPEC, u16, u16, 10, 0>;
41#[doc = "Field `SDR104CLKGENEN` reader - SDR104 SD_CLK Gen Enable"]
42pub type SDR104CLKGENEN_R = crate::BitReader<bool>;
43#[doc = "Field `SDR104CLKGENEN` writer - SDR104 SD_CLK Gen Enable"]
44pub type SDR104CLKGENEN_W<'a> = crate::BitWriter<'a, u32, CFGPRESETVAL3_SPEC, bool, 10>;
45#[doc = "Field `SDR104DRVST` reader - SDR104 SD Drive Strength"]
46pub type SDR104DRVST_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `SDR104DRVST` writer - SDR104 SD Drive Strength"]
48pub type SDR104DRVST_W<'a> = crate::FieldWriter<'a, u32, CFGPRESETVAL3_SPEC, u8, u8, 2, 11>;
49#[doc = "Field `DDR50SDCLKFREQ` reader - Preset Value for DDR50 Speed of SD_CLK"]
50pub type DDR50SDCLKFREQ_R = crate::FieldReader<u16, u16>;
51#[doc = "Field `DDR50SDCLKFREQ` writer - Preset Value for DDR50 Speed of SD_CLK"]
52pub type DDR50SDCLKFREQ_W<'a> = crate::FieldWriter<'a, u32, CFGPRESETVAL3_SPEC, u16, u16, 10, 16>;
53#[doc = "Field `DDR50CLKGENEN` reader - DDR50 Speed Clock Gen Enable"]
54pub type DDR50CLKGENEN_R = crate::BitReader<bool>;
55#[doc = "Field `DDR50CLKGENEN` writer - DDR50 Speed Clock Gen Enable"]
56pub type DDR50CLKGENEN_W<'a> = crate::BitWriter<'a, u32, CFGPRESETVAL3_SPEC, bool, 26>;
57#[doc = "Field `DDR50DRVST` reader - DDR50 Speed Drive Strength"]
58pub type DDR50DRVST_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `DDR50DRVST` writer - DDR50 Speed Drive Strength"]
60pub type DDR50DRVST_W<'a> = crate::FieldWriter<'a, u32, CFGPRESETVAL3_SPEC, u8, u8, 2, 27>;
61impl R {
62    #[doc = "Bits 0:9 - SDR104 SD_CLK Frequency"]
63    #[inline(always)]
64    pub fn sdr104sdclkfreq(&self) -> SDR104SDCLKFREQ_R {
65        SDR104SDCLKFREQ_R::new((self.bits & 0x03ff) as u16)
66    }
67    #[doc = "Bit 10 - SDR104 SD_CLK Gen Enable"]
68    #[inline(always)]
69    pub fn sdr104clkgenen(&self) -> SDR104CLKGENEN_R {
70        SDR104CLKGENEN_R::new(((self.bits >> 10) & 1) != 0)
71    }
72    #[doc = "Bits 11:12 - SDR104 SD Drive Strength"]
73    #[inline(always)]
74    pub fn sdr104drvst(&self) -> SDR104DRVST_R {
75        SDR104DRVST_R::new(((self.bits >> 11) & 3) as u8)
76    }
77    #[doc = "Bits 16:25 - Preset Value for DDR50 Speed of SD_CLK"]
78    #[inline(always)]
79    pub fn ddr50sdclkfreq(&self) -> DDR50SDCLKFREQ_R {
80        DDR50SDCLKFREQ_R::new(((self.bits >> 16) & 0x03ff) as u16)
81    }
82    #[doc = "Bit 26 - DDR50 Speed Clock Gen Enable"]
83    #[inline(always)]
84    pub fn ddr50clkgenen(&self) -> DDR50CLKGENEN_R {
85        DDR50CLKGENEN_R::new(((self.bits >> 26) & 1) != 0)
86    }
87    #[doc = "Bits 27:28 - DDR50 Speed Drive Strength"]
88    #[inline(always)]
89    pub fn ddr50drvst(&self) -> DDR50DRVST_R {
90        DDR50DRVST_R::new(((self.bits >> 27) & 3) as u8)
91    }
92}
93impl W {
94    #[doc = "Bits 0:9 - SDR104 SD_CLK Frequency"]
95    #[inline(always)]
96    pub fn sdr104sdclkfreq(&mut self) -> SDR104SDCLKFREQ_W {
97        SDR104SDCLKFREQ_W::new(self)
98    }
99    #[doc = "Bit 10 - SDR104 SD_CLK Gen Enable"]
100    #[inline(always)]
101    pub fn sdr104clkgenen(&mut self) -> SDR104CLKGENEN_W {
102        SDR104CLKGENEN_W::new(self)
103    }
104    #[doc = "Bits 11:12 - SDR104 SD Drive Strength"]
105    #[inline(always)]
106    pub fn sdr104drvst(&mut self) -> SDR104DRVST_W {
107        SDR104DRVST_W::new(self)
108    }
109    #[doc = "Bits 16:25 - Preset Value for DDR50 Speed of SD_CLK"]
110    #[inline(always)]
111    pub fn ddr50sdclkfreq(&mut self) -> DDR50SDCLKFREQ_W {
112        DDR50SDCLKFREQ_W::new(self)
113    }
114    #[doc = "Bit 26 - DDR50 Speed Clock Gen Enable"]
115    #[inline(always)]
116    pub fn ddr50clkgenen(&mut self) -> DDR50CLKGENEN_W {
117        DDR50CLKGENEN_W::new(self)
118    }
119    #[doc = "Bits 27:28 - DDR50 Speed Drive Strength"]
120    #[inline(always)]
121    pub fn ddr50drvst(&mut self) -> DDR50DRVST_W {
122        DDR50DRVST_W::new(self)
123    }
124    #[doc = "Writes raw bits to the register."]
125    #[inline(always)]
126    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
127        self.0.bits(bits);
128        self
129    }
130}
131#[doc = "Core Configuration Preset Value 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgpresetval3](index.html) module"]
132pub struct CFGPRESETVAL3_SPEC;
133impl crate::RegisterSpec for CFGPRESETVAL3_SPEC {
134    type Ux = u32;
135}
136#[doc = "`read()` method returns [cfgpresetval3::R](R) reader structure"]
137impl crate::Readable for CFGPRESETVAL3_SPEC {
138    type Reader = R;
139}
140#[doc = "`write(|w| ..)` method takes [cfgpresetval3::W](W) writer structure"]
141impl crate::Writable for CFGPRESETVAL3_SPEC {
142    type Writer = W;
143}
144#[doc = "`reset()` method sets CFGPRESETVAL3 to value 0"]
145impl crate::Resettable for CFGPRESETVAL3_SPEC {
146    #[inline(always)]
147    fn reset_value() -> Self::Ux {
148        0
149    }
150}
efm32gg12b810_pac/sdio/cfgpresetval3.rs

efm32gg12b810_pac/sdio/
cfgpresetval3.rs
