efm32gg12b430_pac/cmu/
oscencmd.rs

1#[doc = "Register `OSCENCMD` writer"]
2pub struct W(crate::W<OSCENCMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<OSCENCMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<OSCENCMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<OSCENCMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `HFRCOEN` writer - HFRCO Enable"]
23pub type HFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 0>;
24#[doc = "Field `HFRCODIS` writer - HFRCO Disable"]
25pub type HFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 1>;
26#[doc = "Field `HFXOEN` writer - HFXO Enable"]
27pub type HFXOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 2>;
28#[doc = "Field `HFXODIS` writer - HFXO Disable"]
29pub type HFXODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 3>;
30#[doc = "Field `AUXHFRCOEN` writer - AUXHFRCO Enable"]
31pub type AUXHFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 4>;
32#[doc = "Field `AUXHFRCODIS` writer - AUXHFRCO Disable"]
33pub type AUXHFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 5>;
34#[doc = "Field `LFRCOEN` writer - LFRCO Enable"]
35pub type LFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 6>;
36#[doc = "Field `LFRCODIS` writer - LFRCO Disable"]
37pub type LFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 7>;
38#[doc = "Field `LFXOEN` writer - LFXO Enable"]
39pub type LFXOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 8>;
40#[doc = "Field `LFXODIS` writer - LFXO Disable"]
41pub type LFXODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 9>;
42#[doc = "Field `USHFRCOEN` writer - USHFRCO Enable"]
43pub type USHFRCOEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 10>;
44#[doc = "Field `USHFRCODIS` writer - USHFRCO Disable"]
45pub type USHFRCODIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 11>;
46#[doc = "Field `DPLLEN` writer - DPLL Enable"]
47pub type DPLLEN_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 12>;
48#[doc = "Field `DPLLDIS` writer - DPLL Disable"]
49pub type DPLLDIS_W<'a> = crate::BitWriter<'a, u32, OSCENCMD_SPEC, bool, 13>;
50impl W {
51    #[doc = "Bit 0 - HFRCO Enable"]
52    #[inline(always)]
53    pub fn hfrcoen(&mut self) -> HFRCOEN_W {
54        HFRCOEN_W::new(self)
55    }
56    #[doc = "Bit 1 - HFRCO Disable"]
57    #[inline(always)]
58    pub fn hfrcodis(&mut self) -> HFRCODIS_W {
59        HFRCODIS_W::new(self)
60    }
61    #[doc = "Bit 2 - HFXO Enable"]
62    #[inline(always)]
63    pub fn hfxoen(&mut self) -> HFXOEN_W {
64        HFXOEN_W::new(self)
65    }
66    #[doc = "Bit 3 - HFXO Disable"]
67    #[inline(always)]
68    pub fn hfxodis(&mut self) -> HFXODIS_W {
69        HFXODIS_W::new(self)
70    }
71    #[doc = "Bit 4 - AUXHFRCO Enable"]
72    #[inline(always)]
73    pub fn auxhfrcoen(&mut self) -> AUXHFRCOEN_W {
74        AUXHFRCOEN_W::new(self)
75    }
76    #[doc = "Bit 5 - AUXHFRCO Disable"]
77    #[inline(always)]
78    pub fn auxhfrcodis(&mut self) -> AUXHFRCODIS_W {
79        AUXHFRCODIS_W::new(self)
80    }
81    #[doc = "Bit 6 - LFRCO Enable"]
82    #[inline(always)]
83    pub fn lfrcoen(&mut self) -> LFRCOEN_W {
84        LFRCOEN_W::new(self)
85    }
86    #[doc = "Bit 7 - LFRCO Disable"]
87    #[inline(always)]
88    pub fn lfrcodis(&mut self) -> LFRCODIS_W {
89        LFRCODIS_W::new(self)
90    }
91    #[doc = "Bit 8 - LFXO Enable"]
92    #[inline(always)]
93    pub fn lfxoen(&mut self) -> LFXOEN_W {
94        LFXOEN_W::new(self)
95    }
96    #[doc = "Bit 9 - LFXO Disable"]
97    #[inline(always)]
98    pub fn lfxodis(&mut self) -> LFXODIS_W {
99        LFXODIS_W::new(self)
100    }
101    #[doc = "Bit 10 - USHFRCO Enable"]
102    #[inline(always)]
103    pub fn ushfrcoen(&mut self) -> USHFRCOEN_W {
104        USHFRCOEN_W::new(self)
105    }
106    #[doc = "Bit 11 - USHFRCO Disable"]
107    #[inline(always)]
108    pub fn ushfrcodis(&mut self) -> USHFRCODIS_W {
109        USHFRCODIS_W::new(self)
110    }
111    #[doc = "Bit 12 - DPLL Enable"]
112    #[inline(always)]
113    pub fn dpllen(&mut self) -> DPLLEN_W {
114        DPLLEN_W::new(self)
115    }
116    #[doc = "Bit 13 - DPLL Disable"]
117    #[inline(always)]
118    pub fn dplldis(&mut self) -> DPLLDIS_W {
119        DPLLDIS_W::new(self)
120    }
121    #[doc = "Writes raw bits to the register."]
122    #[inline(always)]
123    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
124        self.0.bits(bits);
125        self
126    }
127}
128#[doc = "Oscillator Enable/Disable Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [oscencmd](index.html) module"]
129pub struct OSCENCMD_SPEC;
130impl crate::RegisterSpec for OSCENCMD_SPEC {
131    type Ux = u32;
132}
133#[doc = "`write(|w| ..)` method takes [oscencmd::W](W) writer structure"]
134impl crate::Writable for OSCENCMD_SPEC {
135    type Writer = W;
136}
137#[doc = "`reset()` method sets OSCENCMD to value 0"]
138impl crate::Resettable for OSCENCMD_SPEC {
139    #[inline(always)]
140    fn reset_value() -> Self::Ux {
141        0
142    }
143}
efm32gg12b430_pac/cmu/oscencmd.rs

efm32gg12b430_pac/cmu/
oscencmd.rs
