efm32gg12b410_pac/qspi0/
routepen.rs

1#[doc = "Register `ROUTEPEN` reader"]
2pub struct R(crate::R<ROUTEPEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTEPEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTEPEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTEPEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTEPEN` writer"]
17pub struct W(crate::W<ROUTEPEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTEPEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTEPEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTEPEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SCLKPEN` reader - SCLK Pin Enable"]
38pub type SCLKPEN_R = crate::BitReader<bool>;
39#[doc = "Field `SCLKPEN` writer - SCLK Pin Enable"]
40pub type SCLKPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 0>;
41#[doc = "Field `CS0PEN` reader - CS0 Pin Enable"]
42pub type CS0PEN_R = crate::BitReader<bool>;
43#[doc = "Field `CS0PEN` writer - CS0 Pin Enable"]
44pub type CS0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 1>;
45#[doc = "Field `CS1PEN` reader - CS1 Pin Enable"]
46pub type CS1PEN_R = crate::BitReader<bool>;
47#[doc = "Field `CS1PEN` writer - CS1 Pin Enable"]
48pub type CS1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 2>;
49#[doc = "Field `DQ0PEN` reader - DQ0 Pin Enable"]
50pub type DQ0PEN_R = crate::BitReader<bool>;
51#[doc = "Field `DQ0PEN` writer - DQ0 Pin Enable"]
52pub type DQ0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 5>;
53#[doc = "Field `DQ1PEN` reader - DQ1 Pin Enable"]
54pub type DQ1PEN_R = crate::BitReader<bool>;
55#[doc = "Field `DQ1PEN` writer - DQ1 Pin Enable"]
56pub type DQ1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 6>;
57#[doc = "Field `DQ2PEN` reader - DQ2 Pin Enable"]
58pub type DQ2PEN_R = crate::BitReader<bool>;
59#[doc = "Field `DQ2PEN` writer - DQ2 Pin Enable"]
60pub type DQ2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 7>;
61#[doc = "Field `DQ3PEN` reader - DQ3 Pin Enable"]
62pub type DQ3PEN_R = crate::BitReader<bool>;
63#[doc = "Field `DQ3PEN` writer - DQ3 Pin Enable"]
64pub type DQ3PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 8>;
65#[doc = "Field `DQ4PEN` reader - DQ4 Pin Enable"]
66pub type DQ4PEN_R = crate::BitReader<bool>;
67#[doc = "Field `DQ4PEN` writer - DQ4 Pin Enable"]
68pub type DQ4PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 9>;
69#[doc = "Field `DQ5PEN` reader - DQ5 Pin Enable"]
70pub type DQ5PEN_R = crate::BitReader<bool>;
71#[doc = "Field `DQ5PEN` writer - DQ5 Pin Enable"]
72pub type DQ5PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 10>;
73#[doc = "Field `DQ6PEN` reader - DQ6 Pin Enable"]
74pub type DQ6PEN_R = crate::BitReader<bool>;
75#[doc = "Field `DQ6PEN` writer - DQ6 Pin Enable"]
76pub type DQ6PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 11>;
77#[doc = "Field `DQ7PEN` reader - DQ7 Pin Enable"]
78pub type DQ7PEN_R = crate::BitReader<bool>;
79#[doc = "Field `DQ7PEN` writer - DQ7 Pin Enable"]
80pub type DQ7PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 12>;
81#[doc = "Field `DQSPEN` reader - DQS Pin Enable"]
82pub type DQSPEN_R = crate::BitReader<bool>;
83#[doc = "Field `DQSPEN` writer - DQS Pin Enable"]
84pub type DQSPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 13>;
85#[doc = "Field `SCLKINPEN` reader - SCLKIN Pin Enable"]
86pub type SCLKINPEN_R = crate::BitReader<bool>;
87#[doc = "Field `SCLKINPEN` writer - SCLKIN Pin Enable"]
88pub type SCLKINPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 14>;
89#[doc = "Field `RST0PEN` reader - RST0 Pin Enable"]
90pub type RST0PEN_R = crate::BitReader<bool>;
91#[doc = "Field `RST0PEN` writer - RST0 Pin Enable"]
92pub type RST0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 16>;
93#[doc = "Field `RST1PEN` reader - RST1 Pin Enable"]
94pub type RST1PEN_R = crate::BitReader<bool>;
95#[doc = "Field `RST1PEN` writer - RST1 Pin Enable"]
96pub type RST1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 17>;
97impl R {
98    #[doc = "Bit 0 - SCLK Pin Enable"]
99    #[inline(always)]
100    pub fn sclkpen(&self) -> SCLKPEN_R {
101        SCLKPEN_R::new((self.bits & 1) != 0)
102    }
103    #[doc = "Bit 1 - CS0 Pin Enable"]
104    #[inline(always)]
105    pub fn cs0pen(&self) -> CS0PEN_R {
106        CS0PEN_R::new(((self.bits >> 1) & 1) != 0)
107    }
108    #[doc = "Bit 2 - CS1 Pin Enable"]
109    #[inline(always)]
110    pub fn cs1pen(&self) -> CS1PEN_R {
111        CS1PEN_R::new(((self.bits >> 2) & 1) != 0)
112    }
113    #[doc = "Bit 5 - DQ0 Pin Enable"]
114    #[inline(always)]
115    pub fn dq0pen(&self) -> DQ0PEN_R {
116        DQ0PEN_R::new(((self.bits >> 5) & 1) != 0)
117    }
118    #[doc = "Bit 6 - DQ1 Pin Enable"]
119    #[inline(always)]
120    pub fn dq1pen(&self) -> DQ1PEN_R {
121        DQ1PEN_R::new(((self.bits >> 6) & 1) != 0)
122    }
123    #[doc = "Bit 7 - DQ2 Pin Enable"]
124    #[inline(always)]
125    pub fn dq2pen(&self) -> DQ2PEN_R {
126        DQ2PEN_R::new(((self.bits >> 7) & 1) != 0)
127    }
128    #[doc = "Bit 8 - DQ3 Pin Enable"]
129    #[inline(always)]
130    pub fn dq3pen(&self) -> DQ3PEN_R {
131        DQ3PEN_R::new(((self.bits >> 8) & 1) != 0)
132    }
133    #[doc = "Bit 9 - DQ4 Pin Enable"]
134    #[inline(always)]
135    pub fn dq4pen(&self) -> DQ4PEN_R {
136        DQ4PEN_R::new(((self.bits >> 9) & 1) != 0)
137    }
138    #[doc = "Bit 10 - DQ5 Pin Enable"]
139    #[inline(always)]
140    pub fn dq5pen(&self) -> DQ5PEN_R {
141        DQ5PEN_R::new(((self.bits >> 10) & 1) != 0)
142    }
143    #[doc = "Bit 11 - DQ6 Pin Enable"]
144    #[inline(always)]
145    pub fn dq6pen(&self) -> DQ6PEN_R {
146        DQ6PEN_R::new(((self.bits >> 11) & 1) != 0)
147    }
148    #[doc = "Bit 12 - DQ7 Pin Enable"]
149    #[inline(always)]
150    pub fn dq7pen(&self) -> DQ7PEN_R {
151        DQ7PEN_R::new(((self.bits >> 12) & 1) != 0)
152    }
153    #[doc = "Bit 13 - DQS Pin Enable"]
154    #[inline(always)]
155    pub fn dqspen(&self) -> DQSPEN_R {
156        DQSPEN_R::new(((self.bits >> 13) & 1) != 0)
157    }
158    #[doc = "Bit 14 - SCLKIN Pin Enable"]
159    #[inline(always)]
160    pub fn sclkinpen(&self) -> SCLKINPEN_R {
161        SCLKINPEN_R::new(((self.bits >> 14) & 1) != 0)
162    }
163    #[doc = "Bit 16 - RST0 Pin Enable"]
164    #[inline(always)]
165    pub fn rst0pen(&self) -> RST0PEN_R {
166        RST0PEN_R::new(((self.bits >> 16) & 1) != 0)
167    }
168    #[doc = "Bit 17 - RST1 Pin Enable"]
169    #[inline(always)]
170    pub fn rst1pen(&self) -> RST1PEN_R {
171        RST1PEN_R::new(((self.bits >> 17) & 1) != 0)
172    }
173}
174impl W {
175    #[doc = "Bit 0 - SCLK Pin Enable"]
176    #[inline(always)]
177    pub fn sclkpen(&mut self) -> SCLKPEN_W {
178        SCLKPEN_W::new(self)
179    }
180    #[doc = "Bit 1 - CS0 Pin Enable"]
181    #[inline(always)]
182    pub fn cs0pen(&mut self) -> CS0PEN_W {
183        CS0PEN_W::new(self)
184    }
185    #[doc = "Bit 2 - CS1 Pin Enable"]
186    #[inline(always)]
187    pub fn cs1pen(&mut self) -> CS1PEN_W {
188        CS1PEN_W::new(self)
189    }
190    #[doc = "Bit 5 - DQ0 Pin Enable"]
191    #[inline(always)]
192    pub fn dq0pen(&mut self) -> DQ0PEN_W {
193        DQ0PEN_W::new(self)
194    }
195    #[doc = "Bit 6 - DQ1 Pin Enable"]
196    #[inline(always)]
197    pub fn dq1pen(&mut self) -> DQ1PEN_W {
198        DQ1PEN_W::new(self)
199    }
200    #[doc = "Bit 7 - DQ2 Pin Enable"]
201    #[inline(always)]
202    pub fn dq2pen(&mut self) -> DQ2PEN_W {
203        DQ2PEN_W::new(self)
204    }
205    #[doc = "Bit 8 - DQ3 Pin Enable"]
206    #[inline(always)]
207    pub fn dq3pen(&mut self) -> DQ3PEN_W {
208        DQ3PEN_W::new(self)
209    }
210    #[doc = "Bit 9 - DQ4 Pin Enable"]
211    #[inline(always)]
212    pub fn dq4pen(&mut self) -> DQ4PEN_W {
213        DQ4PEN_W::new(self)
214    }
215    #[doc = "Bit 10 - DQ5 Pin Enable"]
216    #[inline(always)]
217    pub fn dq5pen(&mut self) -> DQ5PEN_W {
218        DQ5PEN_W::new(self)
219    }
220    #[doc = "Bit 11 - DQ6 Pin Enable"]
221    #[inline(always)]
222    pub fn dq6pen(&mut self) -> DQ6PEN_W {
223        DQ6PEN_W::new(self)
224    }
225    #[doc = "Bit 12 - DQ7 Pin Enable"]
226    #[inline(always)]
227    pub fn dq7pen(&mut self) -> DQ7PEN_W {
228        DQ7PEN_W::new(self)
229    }
230    #[doc = "Bit 13 - DQS Pin Enable"]
231    #[inline(always)]
232    pub fn dqspen(&mut self) -> DQSPEN_W {
233        DQSPEN_W::new(self)
234    }
235    #[doc = "Bit 14 - SCLKIN Pin Enable"]
236    #[inline(always)]
237    pub fn sclkinpen(&mut self) -> SCLKINPEN_W {
238        SCLKINPEN_W::new(self)
239    }
240    #[doc = "Bit 16 - RST0 Pin Enable"]
241    #[inline(always)]
242    pub fn rst0pen(&mut self) -> RST0PEN_W {
243        RST0PEN_W::new(self)
244    }
245    #[doc = "Bit 17 - RST1 Pin Enable"]
246    #[inline(always)]
247    pub fn rst1pen(&mut self) -> RST1PEN_W {
248        RST1PEN_W::new(self)
249    }
250    #[doc = "Writes raw bits to the register."]
251    #[inline(always)]
252    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
253        self.0.bits(bits);
254        self
255    }
256}
257#[doc = "I/O Routing Pin Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [routepen](index.html) module"]
258pub struct ROUTEPEN_SPEC;
259impl crate::RegisterSpec for ROUTEPEN_SPEC {
260    type Ux = u32;
261}
262#[doc = "`read()` method returns [routepen::R](R) reader structure"]
263impl crate::Readable for ROUTEPEN_SPEC {
264    type Reader = R;
265}
266#[doc = "`write(|w| ..)` method takes [routepen::W](W) writer structure"]
267impl crate::Writable for ROUTEPEN_SPEC {
268    type Writer = W;
269}
270#[doc = "`reset()` method sets ROUTEPEN to value 0"]
271impl crate::Resettable for ROUTEPEN_SPEC {
272    #[inline(always)]
273    fn reset_value() -> Self::Ux {
274        0
275    }
276}
efm32gg12b410_pac/qspi0/routepen.rs

efm32gg12b410_pac/qspi0/
routepen.rs
