efm32gg12b410_pac/sdio/
routepen.rs

1#[doc = "Register `ROUTEPEN` reader"]
2pub struct R(crate::R<ROUTEPEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTEPEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTEPEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTEPEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTEPEN` writer"]
17pub struct W(crate::W<ROUTEPEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTEPEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTEPEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTEPEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CLKPEN` reader - CLK I/O Enable"]
38pub type CLKPEN_R = crate::BitReader<bool>;
39#[doc = "Field `CLKPEN` writer - CLK I/O Enable"]
40pub type CLKPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 0>;
41#[doc = "Field `CMDPEN` reader - CMD I/O Enable"]
42pub type CMDPEN_R = crate::BitReader<bool>;
43#[doc = "Field `CMDPEN` writer - CMD I/O Enable"]
44pub type CMDPEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 1>;
45#[doc = "Field `D0PEN` reader - Dat0 I/O Enable"]
46pub type D0PEN_R = crate::BitReader<bool>;
47#[doc = "Field `D0PEN` writer - Dat0 I/O Enable"]
48pub type D0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 2>;
49#[doc = "Field `D1PEN` reader - Dat1 I/O Enable"]
50pub type D1PEN_R = crate::BitReader<bool>;
51#[doc = "Field `D1PEN` writer - Dat1 I/O Enable"]
52pub type D1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 3>;
53#[doc = "Field `D2PEN` reader - Dat2 I/O Enable"]
54pub type D2PEN_R = crate::BitReader<bool>;
55#[doc = "Field `D2PEN` writer - Dat2 I/O Enable"]
56pub type D2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 4>;
57#[doc = "Field `D3PEN` reader - Dat3 I/O Enable"]
58pub type D3PEN_R = crate::BitReader<bool>;
59#[doc = "Field `D3PEN` writer - Dat3 I/O Enable"]
60pub type D3PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 5>;
61#[doc = "Field `D4PEN` reader - Dat4 I/O Enable"]
62pub type D4PEN_R = crate::BitReader<bool>;
63#[doc = "Field `D4PEN` writer - Dat4 I/O Enable"]
64pub type D4PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 6>;
65#[doc = "Field `D5PEN` reader - Dat5 Enable"]
66pub type D5PEN_R = crate::BitReader<bool>;
67#[doc = "Field `D5PEN` writer - Dat5 Enable"]
68pub type D5PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 7>;
69#[doc = "Field `D6PEN` reader - Dat6 Enable"]
70pub type D6PEN_R = crate::BitReader<bool>;
71#[doc = "Field `D6PEN` writer - Dat6 Enable"]
72pub type D6PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 8>;
73#[doc = "Field `D7PEN` reader - Data7 I/O Enable"]
74pub type D7PEN_R = crate::BitReader<bool>;
75#[doc = "Field `D7PEN` writer - Data7 I/O Enable"]
76pub type D7PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 9>;
77impl R {
78    #[doc = "Bit 0 - CLK I/O Enable"]
79    #[inline(always)]
80    pub fn clkpen(&self) -> CLKPEN_R {
81        CLKPEN_R::new((self.bits & 1) != 0)
82    }
83    #[doc = "Bit 1 - CMD I/O Enable"]
84    #[inline(always)]
85    pub fn cmdpen(&self) -> CMDPEN_R {
86        CMDPEN_R::new(((self.bits >> 1) & 1) != 0)
87    }
88    #[doc = "Bit 2 - Dat0 I/O Enable"]
89    #[inline(always)]
90    pub fn d0pen(&self) -> D0PEN_R {
91        D0PEN_R::new(((self.bits >> 2) & 1) != 0)
92    }
93    #[doc = "Bit 3 - Dat1 I/O Enable"]
94    #[inline(always)]
95    pub fn d1pen(&self) -> D1PEN_R {
96        D1PEN_R::new(((self.bits >> 3) & 1) != 0)
97    }
98    #[doc = "Bit 4 - Dat2 I/O Enable"]
99    #[inline(always)]
100    pub fn d2pen(&self) -> D2PEN_R {
101        D2PEN_R::new(((self.bits >> 4) & 1) != 0)
102    }
103    #[doc = "Bit 5 - Dat3 I/O Enable"]
104    #[inline(always)]
105    pub fn d3pen(&self) -> D3PEN_R {
106        D3PEN_R::new(((self.bits >> 5) & 1) != 0)
107    }
108    #[doc = "Bit 6 - Dat4 I/O Enable"]
109    #[inline(always)]
110    pub fn d4pen(&self) -> D4PEN_R {
111        D4PEN_R::new(((self.bits >> 6) & 1) != 0)
112    }
113    #[doc = "Bit 7 - Dat5 Enable"]
114    #[inline(always)]
115    pub fn d5pen(&self) -> D5PEN_R {
116        D5PEN_R::new(((self.bits >> 7) & 1) != 0)
117    }
118    #[doc = "Bit 8 - Dat6 Enable"]
119    #[inline(always)]
120    pub fn d6pen(&self) -> D6PEN_R {
121        D6PEN_R::new(((self.bits >> 8) & 1) != 0)
122    }
123    #[doc = "Bit 9 - Data7 I/O Enable"]
124    #[inline(always)]
125    pub fn d7pen(&self) -> D7PEN_R {
126        D7PEN_R::new(((self.bits >> 9) & 1) != 0)
127    }
128}
129impl W {
130    #[doc = "Bit 0 - CLK I/O Enable"]
131    #[inline(always)]
132    pub fn clkpen(&mut self) -> CLKPEN_W {
133        CLKPEN_W::new(self)
134    }
135    #[doc = "Bit 1 - CMD I/O Enable"]
136    #[inline(always)]
137    pub fn cmdpen(&mut self) -> CMDPEN_W {
138        CMDPEN_W::new(self)
139    }
140    #[doc = "Bit 2 - Dat0 I/O Enable"]
141    #[inline(always)]
142    pub fn d0pen(&mut self) -> D0PEN_W {
143        D0PEN_W::new(self)
144    }
145    #[doc = "Bit 3 - Dat1 I/O Enable"]
146    #[inline(always)]
147    pub fn d1pen(&mut self) -> D1PEN_W {
148        D1PEN_W::new(self)
149    }
150    #[doc = "Bit 4 - Dat2 I/O Enable"]
151    #[inline(always)]
152    pub fn d2pen(&mut self) -> D2PEN_W {
153        D2PEN_W::new(self)
154    }
155    #[doc = "Bit 5 - Dat3 I/O Enable"]
156    #[inline(always)]
157    pub fn d3pen(&mut self) -> D3PEN_W {
158        D3PEN_W::new(self)
159    }
160    #[doc = "Bit 6 - Dat4 I/O Enable"]
161    #[inline(always)]
162    pub fn d4pen(&mut self) -> D4PEN_W {
163        D4PEN_W::new(self)
164    }
165    #[doc = "Bit 7 - Dat5 Enable"]
166    #[inline(always)]
167    pub fn d5pen(&mut self) -> D5PEN_W {
168        D5PEN_W::new(self)
169    }
170    #[doc = "Bit 8 - Dat6 Enable"]
171    #[inline(always)]
172    pub fn d6pen(&mut self) -> D6PEN_W {
173        D6PEN_W::new(self)
174    }
175    #[doc = "Bit 9 - Data7 I/O Enable"]
176    #[inline(always)]
177    pub fn d7pen(&mut self) -> D7PEN_W {
178        D7PEN_W::new(self)
179    }
180    #[doc = "Writes raw bits to the register."]
181    #[inline(always)]
182    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
183        self.0.bits(bits);
184        self
185    }
186}
187#[doc = "I/O LOCATION Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [routepen](index.html) module"]
188pub struct ROUTEPEN_SPEC;
189impl crate::RegisterSpec for ROUTEPEN_SPEC {
190    type Ux = u32;
191}
192#[doc = "`read()` method returns [routepen::R](R) reader structure"]
193impl crate::Readable for ROUTEPEN_SPEC {
194    type Reader = R;
195}
196#[doc = "`write(|w| ..)` method takes [routepen::W](W) writer structure"]
197impl crate::Writable for ROUTEPEN_SPEC {
198    type Writer = W;
199}
200#[doc = "`reset()` method sets ROUTEPEN to value 0"]
201impl crate::Resettable for ROUTEPEN_SPEC {
202    #[inline(always)]
203    fn reset_value() -> Self::Ux {
204        0
205    }
206}
efm32gg12b410_pac/sdio/routepen.rs

efm32gg12b410_pac/sdio/
routepen.rs
