1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - DMA Control Register"]
5 pub ctrl: crate::Reg<ctrl::CTRL_SPEC>,
6 #[doc = "0x04 - DMA Status Register"]
7 pub status: crate::Reg<status::STATUS_SPEC>,
8 #[doc = "0x08 - DMA Synchronization Trigger Register (Single-Cycle RMW)"]
9 pub sync: crate::Reg<sync::SYNC_SPEC>,
10 _reserved3: [u8; 0x14],
11 #[doc = "0x20 - DMA Channel Enable Register (Single-Cycle RMW)"]
12 pub chen: crate::Reg<chen::CHEN_SPEC>,
13 #[doc = "0x24 - DMA Channel Busy Register"]
14 pub chbusy: crate::Reg<chbusy::CHBUSY_SPEC>,
15 #[doc = "0x28 - DMA Channel Linking Done Register (Single-Cycle RMW)"]
16 pub chdone: crate::Reg<chdone::CHDONE_SPEC>,
17 #[doc = "0x2c - DMA Channel Debug Halt Register"]
18 pub dbghalt: crate::Reg<dbghalt::DBGHALT_SPEC>,
19 #[doc = "0x30 - DMA Channel Software Transfer Request Register"]
20 pub swreq: crate::Reg<swreq::SWREQ_SPEC>,
21 #[doc = "0x34 - DMA Channel Request Disable Register"]
22 pub reqdis: crate::Reg<reqdis::REQDIS_SPEC>,
23 #[doc = "0x38 - DMA Channel Requests Pending Register"]
24 pub reqpend: crate::Reg<reqpend::REQPEND_SPEC>,
25 #[doc = "0x3c - DMA Channel Link Load Register"]
26 pub linkload: crate::Reg<linkload::LINKLOAD_SPEC>,
27 #[doc = "0x40 - DMA Channel Request Clear Register"]
28 pub reqclear: crate::Reg<reqclear::REQCLEAR_SPEC>,
29 _reserved12: [u8; 0x1c],
30 #[doc = "0x60 - Interrupt Flag Register"]
31 pub if_: crate::Reg<if_::IF_SPEC>,
32 #[doc = "0x64 - Interrupt Flag Set Register"]
33 pub ifs: crate::Reg<ifs::IFS_SPEC>,
34 #[doc = "0x68 - Interrupt Flag Clear Register"]
35 pub ifc: crate::Reg<ifc::IFC_SPEC>,
36 #[doc = "0x6c - Interrupt Enable Register"]
37 pub ien: crate::Reg<ien::IEN_SPEC>,
38 _reserved16: [u8; 0x10],
39 #[doc = "0x80 - Channel Peripheral Request Select Register"]
40 pub ch0_reqsel: crate::Reg<ch0_reqsel::CH0_REQSEL_SPEC>,
41 #[doc = "0x84 - Channel Configuration Register"]
42 pub ch0_cfg: crate::Reg<ch0_cfg::CH0_CFG_SPEC>,
43 #[doc = "0x88 - Channel Loop Counter Register"]
44 pub ch0_loop: crate::Reg<ch0_loop::CH0_LOOP_SPEC>,
45 #[doc = "0x8c - Channel Descriptor Control Word Register"]
46 pub ch0_ctrl: crate::Reg<ch0_ctrl::CH0_CTRL_SPEC>,
47 #[doc = "0x90 - Channel Descriptor Source Data Address Register"]
48 pub ch0_src: crate::Reg<ch0_src::CH0_SRC_SPEC>,
49 #[doc = "0x94 - Channel Descriptor Destination Data Address Register"]
50 pub ch0_dst: crate::Reg<ch0_dst::CH0_DST_SPEC>,
51 #[doc = "0x98 - Channel Descriptor Link Structure Address Register"]
52 pub ch0_link: crate::Reg<ch0_link::CH0_LINK_SPEC>,
53 _reserved23: [u8; 0x14],
54 #[doc = "0xb0 - Channel Peripheral Request Select Register"]
55 pub ch1_reqsel: crate::Reg<ch1_reqsel::CH1_REQSEL_SPEC>,
56 #[doc = "0xb4 - Channel Configuration Register"]
57 pub ch1_cfg: crate::Reg<ch1_cfg::CH1_CFG_SPEC>,
58 #[doc = "0xb8 - Channel Loop Counter Register"]
59 pub ch1_loop: crate::Reg<ch1_loop::CH1_LOOP_SPEC>,
60 #[doc = "0xbc - Channel Descriptor Control Word Register"]
61 pub ch1_ctrl: crate::Reg<ch1_ctrl::CH1_CTRL_SPEC>,
62 #[doc = "0xc0 - Channel Descriptor Source Data Address Register"]
63 pub ch1_src: crate::Reg<ch1_src::CH1_SRC_SPEC>,
64 #[doc = "0xc4 - Channel Descriptor Destination Data Address Register"]
65 pub ch1_dst: crate::Reg<ch1_dst::CH1_DST_SPEC>,
66 #[doc = "0xc8 - Channel Descriptor Link Structure Address Register"]
67 pub ch1_link: crate::Reg<ch1_link::CH1_LINK_SPEC>,
68 _reserved30: [u8; 0x14],
69 #[doc = "0xe0 - Channel Peripheral Request Select Register"]
70 pub ch2_reqsel: crate::Reg<ch2_reqsel::CH2_REQSEL_SPEC>,
71 #[doc = "0xe4 - Channel Configuration Register"]
72 pub ch2_cfg: crate::Reg<ch2_cfg::CH2_CFG_SPEC>,
73 #[doc = "0xe8 - Channel Loop Counter Register"]
74 pub ch2_loop: crate::Reg<ch2_loop::CH2_LOOP_SPEC>,
75 #[doc = "0xec - Channel Descriptor Control Word Register"]
76 pub ch2_ctrl: crate::Reg<ch2_ctrl::CH2_CTRL_SPEC>,
77 #[doc = "0xf0 - Channel Descriptor Source Data Address Register"]
78 pub ch2_src: crate::Reg<ch2_src::CH2_SRC_SPEC>,
79 #[doc = "0xf4 - Channel Descriptor Destination Data Address Register"]
80 pub ch2_dst: crate::Reg<ch2_dst::CH2_DST_SPEC>,
81 #[doc = "0xf8 - Channel Descriptor Link Structure Address Register"]
82 pub ch2_link: crate::Reg<ch2_link::CH2_LINK_SPEC>,
83 _reserved37: [u8; 0x14],
84 #[doc = "0x110 - Channel Peripheral Request Select Register"]
85 pub ch3_reqsel: crate::Reg<ch3_reqsel::CH3_REQSEL_SPEC>,
86 #[doc = "0x114 - Channel Configuration Register"]
87 pub ch3_cfg: crate::Reg<ch3_cfg::CH3_CFG_SPEC>,
88 #[doc = "0x118 - Channel Loop Counter Register"]
89 pub ch3_loop: crate::Reg<ch3_loop::CH3_LOOP_SPEC>,
90 #[doc = "0x11c - Channel Descriptor Control Word Register"]
91 pub ch3_ctrl: crate::Reg<ch3_ctrl::CH3_CTRL_SPEC>,
92 #[doc = "0x120 - Channel Descriptor Source Data Address Register"]
93 pub ch3_src: crate::Reg<ch3_src::CH3_SRC_SPEC>,
94 #[doc = "0x124 - Channel Descriptor Destination Data Address Register"]
95 pub ch3_dst: crate::Reg<ch3_dst::CH3_DST_SPEC>,
96 #[doc = "0x128 - Channel Descriptor Link Structure Address Register"]
97 pub ch3_link: crate::Reg<ch3_link::CH3_LINK_SPEC>,
98 _reserved44: [u8; 0x14],
99 #[doc = "0x140 - Channel Peripheral Request Select Register"]
100 pub ch4_reqsel: crate::Reg<ch4_reqsel::CH4_REQSEL_SPEC>,
101 #[doc = "0x144 - Channel Configuration Register"]
102 pub ch4_cfg: crate::Reg<ch4_cfg::CH4_CFG_SPEC>,
103 #[doc = "0x148 - Channel Loop Counter Register"]
104 pub ch4_loop: crate::Reg<ch4_loop::CH4_LOOP_SPEC>,
105 #[doc = "0x14c - Channel Descriptor Control Word Register"]
106 pub ch4_ctrl: crate::Reg<ch4_ctrl::CH4_CTRL_SPEC>,
107 #[doc = "0x150 - Channel Descriptor Source Data Address Register"]
108 pub ch4_src: crate::Reg<ch4_src::CH4_SRC_SPEC>,
109 #[doc = "0x154 - Channel Descriptor Destination Data Address Register"]
110 pub ch4_dst: crate::Reg<ch4_dst::CH4_DST_SPEC>,
111 #[doc = "0x158 - Channel Descriptor Link Structure Address Register"]
112 pub ch4_link: crate::Reg<ch4_link::CH4_LINK_SPEC>,
113 _reserved51: [u8; 0x14],
114 #[doc = "0x170 - Channel Peripheral Request Select Register"]
115 pub ch5_reqsel: crate::Reg<ch5_reqsel::CH5_REQSEL_SPEC>,
116 #[doc = "0x174 - Channel Configuration Register"]
117 pub ch5_cfg: crate::Reg<ch5_cfg::CH5_CFG_SPEC>,
118 #[doc = "0x178 - Channel Loop Counter Register"]
119 pub ch5_loop: crate::Reg<ch5_loop::CH5_LOOP_SPEC>,
120 #[doc = "0x17c - Channel Descriptor Control Word Register"]
121 pub ch5_ctrl: crate::Reg<ch5_ctrl::CH5_CTRL_SPEC>,
122 #[doc = "0x180 - Channel Descriptor Source Data Address Register"]
123 pub ch5_src: crate::Reg<ch5_src::CH5_SRC_SPEC>,
124 #[doc = "0x184 - Channel Descriptor Destination Data Address Register"]
125 pub ch5_dst: crate::Reg<ch5_dst::CH5_DST_SPEC>,
126 #[doc = "0x188 - Channel Descriptor Link Structure Address Register"]
127 pub ch5_link: crate::Reg<ch5_link::CH5_LINK_SPEC>,
128 _reserved58: [u8; 0x14],
129 #[doc = "0x1a0 - Channel Peripheral Request Select Register"]
130 pub ch6_reqsel: crate::Reg<ch6_reqsel::CH6_REQSEL_SPEC>,
131 #[doc = "0x1a4 - Channel Configuration Register"]
132 pub ch6_cfg: crate::Reg<ch6_cfg::CH6_CFG_SPEC>,
133 #[doc = "0x1a8 - Channel Loop Counter Register"]
134 pub ch6_loop: crate::Reg<ch6_loop::CH6_LOOP_SPEC>,
135 #[doc = "0x1ac - Channel Descriptor Control Word Register"]
136 pub ch6_ctrl: crate::Reg<ch6_ctrl::CH6_CTRL_SPEC>,
137 #[doc = "0x1b0 - Channel Descriptor Source Data Address Register"]
138 pub ch6_src: crate::Reg<ch6_src::CH6_SRC_SPEC>,
139 #[doc = "0x1b4 - Channel Descriptor Destination Data Address Register"]
140 pub ch6_dst: crate::Reg<ch6_dst::CH6_DST_SPEC>,
141 #[doc = "0x1b8 - Channel Descriptor Link Structure Address Register"]
142 pub ch6_link: crate::Reg<ch6_link::CH6_LINK_SPEC>,
143 _reserved65: [u8; 0x14],
144 #[doc = "0x1d0 - Channel Peripheral Request Select Register"]
145 pub ch7_reqsel: crate::Reg<ch7_reqsel::CH7_REQSEL_SPEC>,
146 #[doc = "0x1d4 - Channel Configuration Register"]
147 pub ch7_cfg: crate::Reg<ch7_cfg::CH7_CFG_SPEC>,
148 #[doc = "0x1d8 - Channel Loop Counter Register"]
149 pub ch7_loop: crate::Reg<ch7_loop::CH7_LOOP_SPEC>,
150 #[doc = "0x1dc - Channel Descriptor Control Word Register"]
151 pub ch7_ctrl: crate::Reg<ch7_ctrl::CH7_CTRL_SPEC>,
152 #[doc = "0x1e0 - Channel Descriptor Source Data Address Register"]
153 pub ch7_src: crate::Reg<ch7_src::CH7_SRC_SPEC>,
154 #[doc = "0x1e4 - Channel Descriptor Destination Data Address Register"]
155 pub ch7_dst: crate::Reg<ch7_dst::CH7_DST_SPEC>,
156 #[doc = "0x1e8 - Channel Descriptor Link Structure Address Register"]
157 pub ch7_link: crate::Reg<ch7_link::CH7_LINK_SPEC>,
158 _reserved72: [u8; 0x14],
159 #[doc = "0x200 - Channel Peripheral Request Select Register"]
160 pub ch8_reqsel: crate::Reg<ch8_reqsel::CH8_REQSEL_SPEC>,
161 #[doc = "0x204 - Channel Configuration Register"]
162 pub ch8_cfg: crate::Reg<ch8_cfg::CH8_CFG_SPEC>,
163 #[doc = "0x208 - Channel Loop Counter Register"]
164 pub ch8_loop: crate::Reg<ch8_loop::CH8_LOOP_SPEC>,
165 #[doc = "0x20c - Channel Descriptor Control Word Register"]
166 pub ch8_ctrl: crate::Reg<ch8_ctrl::CH8_CTRL_SPEC>,
167 #[doc = "0x210 - Channel Descriptor Source Data Address Register"]
168 pub ch8_src: crate::Reg<ch8_src::CH8_SRC_SPEC>,
169 #[doc = "0x214 - Channel Descriptor Destination Data Address Register"]
170 pub ch8_dst: crate::Reg<ch8_dst::CH8_DST_SPEC>,
171 #[doc = "0x218 - Channel Descriptor Link Structure Address Register"]
172 pub ch8_link: crate::Reg<ch8_link::CH8_LINK_SPEC>,
173 _reserved79: [u8; 0x14],
174 #[doc = "0x230 - Channel Peripheral Request Select Register"]
175 pub ch9_reqsel: crate::Reg<ch9_reqsel::CH9_REQSEL_SPEC>,
176 #[doc = "0x234 - Channel Configuration Register"]
177 pub ch9_cfg: crate::Reg<ch9_cfg::CH9_CFG_SPEC>,
178 #[doc = "0x238 - Channel Loop Counter Register"]
179 pub ch9_loop: crate::Reg<ch9_loop::CH9_LOOP_SPEC>,
180 #[doc = "0x23c - Channel Descriptor Control Word Register"]
181 pub ch9_ctrl: crate::Reg<ch9_ctrl::CH9_CTRL_SPEC>,
182 #[doc = "0x240 - Channel Descriptor Source Data Address Register"]
183 pub ch9_src: crate::Reg<ch9_src::CH9_SRC_SPEC>,
184 #[doc = "0x244 - Channel Descriptor Destination Data Address Register"]
185 pub ch9_dst: crate::Reg<ch9_dst::CH9_DST_SPEC>,
186 #[doc = "0x248 - Channel Descriptor Link Structure Address Register"]
187 pub ch9_link: crate::Reg<ch9_link::CH9_LINK_SPEC>,
188 _reserved86: [u8; 0x14],
189 #[doc = "0x260 - Channel Peripheral Request Select Register"]
190 pub ch10_reqsel: crate::Reg<ch10_reqsel::CH10_REQSEL_SPEC>,
191 #[doc = "0x264 - Channel Configuration Register"]
192 pub ch10_cfg: crate::Reg<ch10_cfg::CH10_CFG_SPEC>,
193 #[doc = "0x268 - Channel Loop Counter Register"]
194 pub ch10_loop: crate::Reg<ch10_loop::CH10_LOOP_SPEC>,
195 #[doc = "0x26c - Channel Descriptor Control Word Register"]
196 pub ch10_ctrl: crate::Reg<ch10_ctrl::CH10_CTRL_SPEC>,
197 #[doc = "0x270 - Channel Descriptor Source Data Address Register"]
198 pub ch10_src: crate::Reg<ch10_src::CH10_SRC_SPEC>,
199 #[doc = "0x274 - Channel Descriptor Destination Data Address Register"]
200 pub ch10_dst: crate::Reg<ch10_dst::CH10_DST_SPEC>,
201 #[doc = "0x278 - Channel Descriptor Link Structure Address Register"]
202 pub ch10_link: crate::Reg<ch10_link::CH10_LINK_SPEC>,
203 _reserved93: [u8; 0x14],
204 #[doc = "0x290 - Channel Peripheral Request Select Register"]
205 pub ch11_reqsel: crate::Reg<ch11_reqsel::CH11_REQSEL_SPEC>,
206 #[doc = "0x294 - Channel Configuration Register"]
207 pub ch11_cfg: crate::Reg<ch11_cfg::CH11_CFG_SPEC>,
208 #[doc = "0x298 - Channel Loop Counter Register"]
209 pub ch11_loop: crate::Reg<ch11_loop::CH11_LOOP_SPEC>,
210 #[doc = "0x29c - Channel Descriptor Control Word Register"]
211 pub ch11_ctrl: crate::Reg<ch11_ctrl::CH11_CTRL_SPEC>,
212 #[doc = "0x2a0 - Channel Descriptor Source Data Address Register"]
213 pub ch11_src: crate::Reg<ch11_src::CH11_SRC_SPEC>,
214 #[doc = "0x2a4 - Channel Descriptor Destination Data Address Register"]
215 pub ch11_dst: crate::Reg<ch11_dst::CH11_DST_SPEC>,
216 #[doc = "0x2a8 - Channel Descriptor Link Structure Address Register"]
217 pub ch11_link: crate::Reg<ch11_link::CH11_LINK_SPEC>,
218}
219#[doc = "CTRL register accessor: an alias for `Reg<CTRL_SPEC>`"]
220pub type CTRL = crate::Reg<ctrl::CTRL_SPEC>;
221#[doc = "DMA Control Register"]
222pub mod ctrl;
223#[doc = "STATUS register accessor: an alias for `Reg<STATUS_SPEC>`"]
224pub type STATUS = crate::Reg<status::STATUS_SPEC>;
225#[doc = "DMA Status Register"]
226pub mod status;
227#[doc = "SYNC register accessor: an alias for `Reg<SYNC_SPEC>`"]
228pub type SYNC = crate::Reg<sync::SYNC_SPEC>;
229#[doc = "DMA Synchronization Trigger Register (Single-Cycle RMW)"]
230pub mod sync;
231#[doc = "CHEN register accessor: an alias for `Reg<CHEN_SPEC>`"]
232pub type CHEN = crate::Reg<chen::CHEN_SPEC>;
233#[doc = "DMA Channel Enable Register (Single-Cycle RMW)"]
234pub mod chen;
235#[doc = "CHBUSY register accessor: an alias for `Reg<CHBUSY_SPEC>`"]
236pub type CHBUSY = crate::Reg<chbusy::CHBUSY_SPEC>;
237#[doc = "DMA Channel Busy Register"]
238pub mod chbusy;
239#[doc = "CHDONE register accessor: an alias for `Reg<CHDONE_SPEC>`"]
240pub type CHDONE = crate::Reg<chdone::CHDONE_SPEC>;
241#[doc = "DMA Channel Linking Done Register (Single-Cycle RMW)"]
242pub mod chdone;
243#[doc = "DBGHALT register accessor: an alias for `Reg<DBGHALT_SPEC>`"]
244pub type DBGHALT = crate::Reg<dbghalt::DBGHALT_SPEC>;
245#[doc = "DMA Channel Debug Halt Register"]
246pub mod dbghalt;
247#[doc = "SWREQ register accessor: an alias for `Reg<SWREQ_SPEC>`"]
248pub type SWREQ = crate::Reg<swreq::SWREQ_SPEC>;
249#[doc = "DMA Channel Software Transfer Request Register"]
250pub mod swreq;
251#[doc = "REQDIS register accessor: an alias for `Reg<REQDIS_SPEC>`"]
252pub type REQDIS = crate::Reg<reqdis::REQDIS_SPEC>;
253#[doc = "DMA Channel Request Disable Register"]
254pub mod reqdis;
255#[doc = "REQPEND register accessor: an alias for `Reg<REQPEND_SPEC>`"]
256pub type REQPEND = crate::Reg<reqpend::REQPEND_SPEC>;
257#[doc = "DMA Channel Requests Pending Register"]
258pub mod reqpend;
259#[doc = "LINKLOAD register accessor: an alias for `Reg<LINKLOAD_SPEC>`"]
260pub type LINKLOAD = crate::Reg<linkload::LINKLOAD_SPEC>;
261#[doc = "DMA Channel Link Load Register"]
262pub mod linkload;
263#[doc = "REQCLEAR register accessor: an alias for `Reg<REQCLEAR_SPEC>`"]
264pub type REQCLEAR = crate::Reg<reqclear::REQCLEAR_SPEC>;
265#[doc = "DMA Channel Request Clear Register"]
266pub mod reqclear;
267#[doc = "IF register accessor: an alias for `Reg<IF_SPEC>`"]
268pub type IF = crate::Reg<if_::IF_SPEC>;
269#[doc = "Interrupt Flag Register"]
270pub mod if_;
271#[doc = "IFS register accessor: an alias for `Reg<IFS_SPEC>`"]
272pub type IFS = crate::Reg<ifs::IFS_SPEC>;
273#[doc = "Interrupt Flag Set Register"]
274pub mod ifs;
275#[doc = "IFC register accessor: an alias for `Reg<IFC_SPEC>`"]
276pub type IFC = crate::Reg<ifc::IFC_SPEC>;
277#[doc = "Interrupt Flag Clear Register"]
278pub mod ifc;
279#[doc = "IEN register accessor: an alias for `Reg<IEN_SPEC>`"]
280pub type IEN = crate::Reg<ien::IEN_SPEC>;
281#[doc = "Interrupt Enable Register"]
282pub mod ien;
283#[doc = "CH0_REQSEL register accessor: an alias for `Reg<CH0_REQSEL_SPEC>`"]
284pub type CH0_REQSEL = crate::Reg<ch0_reqsel::CH0_REQSEL_SPEC>;
285#[doc = "Channel Peripheral Request Select Register"]
286pub mod ch0_reqsel;
287#[doc = "CH0_CFG register accessor: an alias for `Reg<CH0_CFG_SPEC>`"]
288pub type CH0_CFG = crate::Reg<ch0_cfg::CH0_CFG_SPEC>;
289#[doc = "Channel Configuration Register"]
290pub mod ch0_cfg;
291#[doc = "CH0_LOOP register accessor: an alias for `Reg<CH0_LOOP_SPEC>`"]
292pub type CH0_LOOP = crate::Reg<ch0_loop::CH0_LOOP_SPEC>;
293#[doc = "Channel Loop Counter Register"]
294pub mod ch0_loop;
295#[doc = "CH0_CTRL register accessor: an alias for `Reg<CH0_CTRL_SPEC>`"]
296pub type CH0_CTRL = crate::Reg<ch0_ctrl::CH0_CTRL_SPEC>;
297#[doc = "Channel Descriptor Control Word Register"]
298pub mod ch0_ctrl;
299#[doc = "CH0_SRC register accessor: an alias for `Reg<CH0_SRC_SPEC>`"]
300pub type CH0_SRC = crate::Reg<ch0_src::CH0_SRC_SPEC>;
301#[doc = "Channel Descriptor Source Data Address Register"]
302pub mod ch0_src;
303#[doc = "CH0_DST register accessor: an alias for `Reg<CH0_DST_SPEC>`"]
304pub type CH0_DST = crate::Reg<ch0_dst::CH0_DST_SPEC>;
305#[doc = "Channel Descriptor Destination Data Address Register"]
306pub mod ch0_dst;
307#[doc = "CH0_LINK register accessor: an alias for `Reg<CH0_LINK_SPEC>`"]
308pub type CH0_LINK = crate::Reg<ch0_link::CH0_LINK_SPEC>;
309#[doc = "Channel Descriptor Link Structure Address Register"]
310pub mod ch0_link;
311#[doc = "CH1_REQSEL register accessor: an alias for `Reg<CH1_REQSEL_SPEC>`"]
312pub type CH1_REQSEL = crate::Reg<ch1_reqsel::CH1_REQSEL_SPEC>;
313#[doc = "Channel Peripheral Request Select Register"]
314pub mod ch1_reqsel;
315#[doc = "CH1_CFG register accessor: an alias for `Reg<CH1_CFG_SPEC>`"]
316pub type CH1_CFG = crate::Reg<ch1_cfg::CH1_CFG_SPEC>;
317#[doc = "Channel Configuration Register"]
318pub mod ch1_cfg;
319#[doc = "CH1_LOOP register accessor: an alias for `Reg<CH1_LOOP_SPEC>`"]
320pub type CH1_LOOP = crate::Reg<ch1_loop::CH1_LOOP_SPEC>;
321#[doc = "Channel Loop Counter Register"]
322pub mod ch1_loop;
323#[doc = "CH1_CTRL register accessor: an alias for `Reg<CH1_CTRL_SPEC>`"]
324pub type CH1_CTRL = crate::Reg<ch1_ctrl::CH1_CTRL_SPEC>;
325#[doc = "Channel Descriptor Control Word Register"]
326pub mod ch1_ctrl;
327#[doc = "CH1_SRC register accessor: an alias for `Reg<CH1_SRC_SPEC>`"]
328pub type CH1_SRC = crate::Reg<ch1_src::CH1_SRC_SPEC>;
329#[doc = "Channel Descriptor Source Data Address Register"]
330pub mod ch1_src;
331#[doc = "CH1_DST register accessor: an alias for `Reg<CH1_DST_SPEC>`"]
332pub type CH1_DST = crate::Reg<ch1_dst::CH1_DST_SPEC>;
333#[doc = "Channel Descriptor Destination Data Address Register"]
334pub mod ch1_dst;
335#[doc = "CH1_LINK register accessor: an alias for `Reg<CH1_LINK_SPEC>`"]
336pub type CH1_LINK = crate::Reg<ch1_link::CH1_LINK_SPEC>;
337#[doc = "Channel Descriptor Link Structure Address Register"]
338pub mod ch1_link;
339#[doc = "CH2_REQSEL register accessor: an alias for `Reg<CH2_REQSEL_SPEC>`"]
340pub type CH2_REQSEL = crate::Reg<ch2_reqsel::CH2_REQSEL_SPEC>;
341#[doc = "Channel Peripheral Request Select Register"]
342pub mod ch2_reqsel;
343#[doc = "CH2_CFG register accessor: an alias for `Reg<CH2_CFG_SPEC>`"]
344pub type CH2_CFG = crate::Reg<ch2_cfg::CH2_CFG_SPEC>;
345#[doc = "Channel Configuration Register"]
346pub mod ch2_cfg;
347#[doc = "CH2_LOOP register accessor: an alias for `Reg<CH2_LOOP_SPEC>`"]
348pub type CH2_LOOP = crate::Reg<ch2_loop::CH2_LOOP_SPEC>;
349#[doc = "Channel Loop Counter Register"]
350pub mod ch2_loop;
351#[doc = "CH2_CTRL register accessor: an alias for `Reg<CH2_CTRL_SPEC>`"]
352pub type CH2_CTRL = crate::Reg<ch2_ctrl::CH2_CTRL_SPEC>;
353#[doc = "Channel Descriptor Control Word Register"]
354pub mod ch2_ctrl;
355#[doc = "CH2_SRC register accessor: an alias for `Reg<CH2_SRC_SPEC>`"]
356pub type CH2_SRC = crate::Reg<ch2_src::CH2_SRC_SPEC>;
357#[doc = "Channel Descriptor Source Data Address Register"]
358pub mod ch2_src;
359#[doc = "CH2_DST register accessor: an alias for `Reg<CH2_DST_SPEC>`"]
360pub type CH2_DST = crate::Reg<ch2_dst::CH2_DST_SPEC>;
361#[doc = "Channel Descriptor Destination Data Address Register"]
362pub mod ch2_dst;
363#[doc = "CH2_LINK register accessor: an alias for `Reg<CH2_LINK_SPEC>`"]
364pub type CH2_LINK = crate::Reg<ch2_link::CH2_LINK_SPEC>;
365#[doc = "Channel Descriptor Link Structure Address Register"]
366pub mod ch2_link;
367#[doc = "CH3_REQSEL register accessor: an alias for `Reg<CH3_REQSEL_SPEC>`"]
368pub type CH3_REQSEL = crate::Reg<ch3_reqsel::CH3_REQSEL_SPEC>;
369#[doc = "Channel Peripheral Request Select Register"]
370pub mod ch3_reqsel;
371#[doc = "CH3_CFG register accessor: an alias for `Reg<CH3_CFG_SPEC>`"]
372pub type CH3_CFG = crate::Reg<ch3_cfg::CH3_CFG_SPEC>;
373#[doc = "Channel Configuration Register"]
374pub mod ch3_cfg;
375#[doc = "CH3_LOOP register accessor: an alias for `Reg<CH3_LOOP_SPEC>`"]
376pub type CH3_LOOP = crate::Reg<ch3_loop::CH3_LOOP_SPEC>;
377#[doc = "Channel Loop Counter Register"]
378pub mod ch3_loop;
379#[doc = "CH3_CTRL register accessor: an alias for `Reg<CH3_CTRL_SPEC>`"]
380pub type CH3_CTRL = crate::Reg<ch3_ctrl::CH3_CTRL_SPEC>;
381#[doc = "Channel Descriptor Control Word Register"]
382pub mod ch3_ctrl;
383#[doc = "CH3_SRC register accessor: an alias for `Reg<CH3_SRC_SPEC>`"]
384pub type CH3_SRC = crate::Reg<ch3_src::CH3_SRC_SPEC>;
385#[doc = "Channel Descriptor Source Data Address Register"]
386pub mod ch3_src;
387#[doc = "CH3_DST register accessor: an alias for `Reg<CH3_DST_SPEC>`"]
388pub type CH3_DST = crate::Reg<ch3_dst::CH3_DST_SPEC>;
389#[doc = "Channel Descriptor Destination Data Address Register"]
390pub mod ch3_dst;
391#[doc = "CH3_LINK register accessor: an alias for `Reg<CH3_LINK_SPEC>`"]
392pub type CH3_LINK = crate::Reg<ch3_link::CH3_LINK_SPEC>;
393#[doc = "Channel Descriptor Link Structure Address Register"]
394pub mod ch3_link;
395#[doc = "CH4_REQSEL register accessor: an alias for `Reg<CH4_REQSEL_SPEC>`"]
396pub type CH4_REQSEL = crate::Reg<ch4_reqsel::CH4_REQSEL_SPEC>;
397#[doc = "Channel Peripheral Request Select Register"]
398pub mod ch4_reqsel;
399#[doc = "CH4_CFG register accessor: an alias for `Reg<CH4_CFG_SPEC>`"]
400pub type CH4_CFG = crate::Reg<ch4_cfg::CH4_CFG_SPEC>;
401#[doc = "Channel Configuration Register"]
402pub mod ch4_cfg;
403#[doc = "CH4_LOOP register accessor: an alias for `Reg<CH4_LOOP_SPEC>`"]
404pub type CH4_LOOP = crate::Reg<ch4_loop::CH4_LOOP_SPEC>;
405#[doc = "Channel Loop Counter Register"]
406pub mod ch4_loop;
407#[doc = "CH4_CTRL register accessor: an alias for `Reg<CH4_CTRL_SPEC>`"]
408pub type CH4_CTRL = crate::Reg<ch4_ctrl::CH4_CTRL_SPEC>;
409#[doc = "Channel Descriptor Control Word Register"]
410pub mod ch4_ctrl;
411#[doc = "CH4_SRC register accessor: an alias for `Reg<CH4_SRC_SPEC>`"]
412pub type CH4_SRC = crate::Reg<ch4_src::CH4_SRC_SPEC>;
413#[doc = "Channel Descriptor Source Data Address Register"]
414pub mod ch4_src;
415#[doc = "CH4_DST register accessor: an alias for `Reg<CH4_DST_SPEC>`"]
416pub type CH4_DST = crate::Reg<ch4_dst::CH4_DST_SPEC>;
417#[doc = "Channel Descriptor Destination Data Address Register"]
418pub mod ch4_dst;
419#[doc = "CH4_LINK register accessor: an alias for `Reg<CH4_LINK_SPEC>`"]
420pub type CH4_LINK = crate::Reg<ch4_link::CH4_LINK_SPEC>;
421#[doc = "Channel Descriptor Link Structure Address Register"]
422pub mod ch4_link;
423#[doc = "CH5_REQSEL register accessor: an alias for `Reg<CH5_REQSEL_SPEC>`"]
424pub type CH5_REQSEL = crate::Reg<ch5_reqsel::CH5_REQSEL_SPEC>;
425#[doc = "Channel Peripheral Request Select Register"]
426pub mod ch5_reqsel;
427#[doc = "CH5_CFG register accessor: an alias for `Reg<CH5_CFG_SPEC>`"]
428pub type CH5_CFG = crate::Reg<ch5_cfg::CH5_CFG_SPEC>;
429#[doc = "Channel Configuration Register"]
430pub mod ch5_cfg;
431#[doc = "CH5_LOOP register accessor: an alias for `Reg<CH5_LOOP_SPEC>`"]
432pub type CH5_LOOP = crate::Reg<ch5_loop::CH5_LOOP_SPEC>;
433#[doc = "Channel Loop Counter Register"]
434pub mod ch5_loop;
435#[doc = "CH5_CTRL register accessor: an alias for `Reg<CH5_CTRL_SPEC>`"]
436pub type CH5_CTRL = crate::Reg<ch5_ctrl::CH5_CTRL_SPEC>;
437#[doc = "Channel Descriptor Control Word Register"]
438pub mod ch5_ctrl;
439#[doc = "CH5_SRC register accessor: an alias for `Reg<CH5_SRC_SPEC>`"]
440pub type CH5_SRC = crate::Reg<ch5_src::CH5_SRC_SPEC>;
441#[doc = "Channel Descriptor Source Data Address Register"]
442pub mod ch5_src;
443#[doc = "CH5_DST register accessor: an alias for `Reg<CH5_DST_SPEC>`"]
444pub type CH5_DST = crate::Reg<ch5_dst::CH5_DST_SPEC>;
445#[doc = "Channel Descriptor Destination Data Address Register"]
446pub mod ch5_dst;
447#[doc = "CH5_LINK register accessor: an alias for `Reg<CH5_LINK_SPEC>`"]
448pub type CH5_LINK = crate::Reg<ch5_link::CH5_LINK_SPEC>;
449#[doc = "Channel Descriptor Link Structure Address Register"]
450pub mod ch5_link;
451#[doc = "CH6_REQSEL register accessor: an alias for `Reg<CH6_REQSEL_SPEC>`"]
452pub type CH6_REQSEL = crate::Reg<ch6_reqsel::CH6_REQSEL_SPEC>;
453#[doc = "Channel Peripheral Request Select Register"]
454pub mod ch6_reqsel;
455#[doc = "CH6_CFG register accessor: an alias for `Reg<CH6_CFG_SPEC>`"]
456pub type CH6_CFG = crate::Reg<ch6_cfg::CH6_CFG_SPEC>;
457#[doc = "Channel Configuration Register"]
458pub mod ch6_cfg;
459#[doc = "CH6_LOOP register accessor: an alias for `Reg<CH6_LOOP_SPEC>`"]
460pub type CH6_LOOP = crate::Reg<ch6_loop::CH6_LOOP_SPEC>;
461#[doc = "Channel Loop Counter Register"]
462pub mod ch6_loop;
463#[doc = "CH6_CTRL register accessor: an alias for `Reg<CH6_CTRL_SPEC>`"]
464pub type CH6_CTRL = crate::Reg<ch6_ctrl::CH6_CTRL_SPEC>;
465#[doc = "Channel Descriptor Control Word Register"]
466pub mod ch6_ctrl;
467#[doc = "CH6_SRC register accessor: an alias for `Reg<CH6_SRC_SPEC>`"]
468pub type CH6_SRC = crate::Reg<ch6_src::CH6_SRC_SPEC>;
469#[doc = "Channel Descriptor Source Data Address Register"]
470pub mod ch6_src;
471#[doc = "CH6_DST register accessor: an alias for `Reg<CH6_DST_SPEC>`"]
472pub type CH6_DST = crate::Reg<ch6_dst::CH6_DST_SPEC>;
473#[doc = "Channel Descriptor Destination Data Address Register"]
474pub mod ch6_dst;
475#[doc = "CH6_LINK register accessor: an alias for `Reg<CH6_LINK_SPEC>`"]
476pub type CH6_LINK = crate::Reg<ch6_link::CH6_LINK_SPEC>;
477#[doc = "Channel Descriptor Link Structure Address Register"]
478pub mod ch6_link;
479#[doc = "CH7_REQSEL register accessor: an alias for `Reg<CH7_REQSEL_SPEC>`"]
480pub type CH7_REQSEL = crate::Reg<ch7_reqsel::CH7_REQSEL_SPEC>;
481#[doc = "Channel Peripheral Request Select Register"]
482pub mod ch7_reqsel;
483#[doc = "CH7_CFG register accessor: an alias for `Reg<CH7_CFG_SPEC>`"]
484pub type CH7_CFG = crate::Reg<ch7_cfg::CH7_CFG_SPEC>;
485#[doc = "Channel Configuration Register"]
486pub mod ch7_cfg;
487#[doc = "CH7_LOOP register accessor: an alias for `Reg<CH7_LOOP_SPEC>`"]
488pub type CH7_LOOP = crate::Reg<ch7_loop::CH7_LOOP_SPEC>;
489#[doc = "Channel Loop Counter Register"]
490pub mod ch7_loop;
491#[doc = "CH7_CTRL register accessor: an alias for `Reg<CH7_CTRL_SPEC>`"]
492pub type CH7_CTRL = crate::Reg<ch7_ctrl::CH7_CTRL_SPEC>;
493#[doc = "Channel Descriptor Control Word Register"]
494pub mod ch7_ctrl;
495#[doc = "CH7_SRC register accessor: an alias for `Reg<CH7_SRC_SPEC>`"]
496pub type CH7_SRC = crate::Reg<ch7_src::CH7_SRC_SPEC>;
497#[doc = "Channel Descriptor Source Data Address Register"]
498pub mod ch7_src;
499#[doc = "CH7_DST register accessor: an alias for `Reg<CH7_DST_SPEC>`"]
500pub type CH7_DST = crate::Reg<ch7_dst::CH7_DST_SPEC>;
501#[doc = "Channel Descriptor Destination Data Address Register"]
502pub mod ch7_dst;
503#[doc = "CH7_LINK register accessor: an alias for `Reg<CH7_LINK_SPEC>`"]
504pub type CH7_LINK = crate::Reg<ch7_link::CH7_LINK_SPEC>;
505#[doc = "Channel Descriptor Link Structure Address Register"]
506pub mod ch7_link;
507#[doc = "CH8_REQSEL register accessor: an alias for `Reg<CH8_REQSEL_SPEC>`"]
508pub type CH8_REQSEL = crate::Reg<ch8_reqsel::CH8_REQSEL_SPEC>;
509#[doc = "Channel Peripheral Request Select Register"]
510pub mod ch8_reqsel;
511#[doc = "CH8_CFG register accessor: an alias for `Reg<CH8_CFG_SPEC>`"]
512pub type CH8_CFG = crate::Reg<ch8_cfg::CH8_CFG_SPEC>;
513#[doc = "Channel Configuration Register"]
514pub mod ch8_cfg;
515#[doc = "CH8_LOOP register accessor: an alias for `Reg<CH8_LOOP_SPEC>`"]
516pub type CH8_LOOP = crate::Reg<ch8_loop::CH8_LOOP_SPEC>;
517#[doc = "Channel Loop Counter Register"]
518pub mod ch8_loop;
519#[doc = "CH8_CTRL register accessor: an alias for `Reg<CH8_CTRL_SPEC>`"]
520pub type CH8_CTRL = crate::Reg<ch8_ctrl::CH8_CTRL_SPEC>;
521#[doc = "Channel Descriptor Control Word Register"]
522pub mod ch8_ctrl;
523#[doc = "CH8_SRC register accessor: an alias for `Reg<CH8_SRC_SPEC>`"]
524pub type CH8_SRC = crate::Reg<ch8_src::CH8_SRC_SPEC>;
525#[doc = "Channel Descriptor Source Data Address Register"]
526pub mod ch8_src;
527#[doc = "CH8_DST register accessor: an alias for `Reg<CH8_DST_SPEC>`"]
528pub type CH8_DST = crate::Reg<ch8_dst::CH8_DST_SPEC>;
529#[doc = "Channel Descriptor Destination Data Address Register"]
530pub mod ch8_dst;
531#[doc = "CH8_LINK register accessor: an alias for `Reg<CH8_LINK_SPEC>`"]
532pub type CH8_LINK = crate::Reg<ch8_link::CH8_LINK_SPEC>;
533#[doc = "Channel Descriptor Link Structure Address Register"]
534pub mod ch8_link;
535#[doc = "CH9_REQSEL register accessor: an alias for `Reg<CH9_REQSEL_SPEC>`"]
536pub type CH9_REQSEL = crate::Reg<ch9_reqsel::CH9_REQSEL_SPEC>;
537#[doc = "Channel Peripheral Request Select Register"]
538pub mod ch9_reqsel;
539#[doc = "CH9_CFG register accessor: an alias for `Reg<CH9_CFG_SPEC>`"]
540pub type CH9_CFG = crate::Reg<ch9_cfg::CH9_CFG_SPEC>;
541#[doc = "Channel Configuration Register"]
542pub mod ch9_cfg;
543#[doc = "CH9_LOOP register accessor: an alias for `Reg<CH9_LOOP_SPEC>`"]
544pub type CH9_LOOP = crate::Reg<ch9_loop::CH9_LOOP_SPEC>;
545#[doc = "Channel Loop Counter Register"]
546pub mod ch9_loop;
547#[doc = "CH9_CTRL register accessor: an alias for `Reg<CH9_CTRL_SPEC>`"]
548pub type CH9_CTRL = crate::Reg<ch9_ctrl::CH9_CTRL_SPEC>;
549#[doc = "Channel Descriptor Control Word Register"]
550pub mod ch9_ctrl;
551#[doc = "CH9_SRC register accessor: an alias for `Reg<CH9_SRC_SPEC>`"]
552pub type CH9_SRC = crate::Reg<ch9_src::CH9_SRC_SPEC>;
553#[doc = "Channel Descriptor Source Data Address Register"]
554pub mod ch9_src;
555#[doc = "CH9_DST register accessor: an alias for `Reg<CH9_DST_SPEC>`"]
556pub type CH9_DST = crate::Reg<ch9_dst::CH9_DST_SPEC>;
557#[doc = "Channel Descriptor Destination Data Address Register"]
558pub mod ch9_dst;
559#[doc = "CH9_LINK register accessor: an alias for `Reg<CH9_LINK_SPEC>`"]
560pub type CH9_LINK = crate::Reg<ch9_link::CH9_LINK_SPEC>;
561#[doc = "Channel Descriptor Link Structure Address Register"]
562pub mod ch9_link;
563#[doc = "CH10_REQSEL register accessor: an alias for `Reg<CH10_REQSEL_SPEC>`"]
564pub type CH10_REQSEL = crate::Reg<ch10_reqsel::CH10_REQSEL_SPEC>;
565#[doc = "Channel Peripheral Request Select Register"]
566pub mod ch10_reqsel;
567#[doc = "CH10_CFG register accessor: an alias for `Reg<CH10_CFG_SPEC>`"]
568pub type CH10_CFG = crate::Reg<ch10_cfg::CH10_CFG_SPEC>;
569#[doc = "Channel Configuration Register"]
570pub mod ch10_cfg;
571#[doc = "CH10_LOOP register accessor: an alias for `Reg<CH10_LOOP_SPEC>`"]
572pub type CH10_LOOP = crate::Reg<ch10_loop::CH10_LOOP_SPEC>;
573#[doc = "Channel Loop Counter Register"]
574pub mod ch10_loop;
575#[doc = "CH10_CTRL register accessor: an alias for `Reg<CH10_CTRL_SPEC>`"]
576pub type CH10_CTRL = crate::Reg<ch10_ctrl::CH10_CTRL_SPEC>;
577#[doc = "Channel Descriptor Control Word Register"]
578pub mod ch10_ctrl;
579#[doc = "CH10_SRC register accessor: an alias for `Reg<CH10_SRC_SPEC>`"]
580pub type CH10_SRC = crate::Reg<ch10_src::CH10_SRC_SPEC>;
581#[doc = "Channel Descriptor Source Data Address Register"]
582pub mod ch10_src;
583#[doc = "CH10_DST register accessor: an alias for `Reg<CH10_DST_SPEC>`"]
584pub type CH10_DST = crate::Reg<ch10_dst::CH10_DST_SPEC>;
585#[doc = "Channel Descriptor Destination Data Address Register"]
586pub mod ch10_dst;
587#[doc = "CH10_LINK register accessor: an alias for `Reg<CH10_LINK_SPEC>`"]
588pub type CH10_LINK = crate::Reg<ch10_link::CH10_LINK_SPEC>;
589#[doc = "Channel Descriptor Link Structure Address Register"]
590pub mod ch10_link;
591#[doc = "CH11_REQSEL register accessor: an alias for `Reg<CH11_REQSEL_SPEC>`"]
592pub type CH11_REQSEL = crate::Reg<ch11_reqsel::CH11_REQSEL_SPEC>;
593#[doc = "Channel Peripheral Request Select Register"]
594pub mod ch11_reqsel;
595#[doc = "CH11_CFG register accessor: an alias for `Reg<CH11_CFG_SPEC>`"]
596pub type CH11_CFG = crate::Reg<ch11_cfg::CH11_CFG_SPEC>;
597#[doc = "Channel Configuration Register"]
598pub mod ch11_cfg;
599#[doc = "CH11_LOOP register accessor: an alias for `Reg<CH11_LOOP_SPEC>`"]
600pub type CH11_LOOP = crate::Reg<ch11_loop::CH11_LOOP_SPEC>;
601#[doc = "Channel Loop Counter Register"]
602pub mod ch11_loop;
603#[doc = "CH11_CTRL register accessor: an alias for `Reg<CH11_CTRL_SPEC>`"]
604pub type CH11_CTRL = crate::Reg<ch11_ctrl::CH11_CTRL_SPEC>;
605#[doc = "Channel Descriptor Control Word Register"]
606pub mod ch11_ctrl;
607#[doc = "CH11_SRC register accessor: an alias for `Reg<CH11_SRC_SPEC>`"]
608pub type CH11_SRC = crate::Reg<ch11_src::CH11_SRC_SPEC>;
609#[doc = "Channel Descriptor Source Data Address Register"]
610pub mod ch11_src;
611#[doc = "CH11_DST register accessor: an alias for `Reg<CH11_DST_SPEC>`"]
612pub type CH11_DST = crate::Reg<ch11_dst::CH11_DST_SPEC>;
613#[doc = "Channel Descriptor Destination Data Address Register"]
614pub mod ch11_dst;
615#[doc = "CH11_LINK register accessor: an alias for `Reg<CH11_LINK_SPEC>`"]
616pub type CH11_LINK = crate::Reg<ch11_link::CH11_LINK_SPEC>;
617#[doc = "Channel Descriptor Link Structure Address Register"]
618pub mod ch11_link;