efm32gg12b330_pac/can1/
mir1_cmdreq.rs

1#[doc = "Register `MIR1_CMDREQ` reader"]
2pub struct R(crate::R<MIR1_CMDREQ_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MIR1_CMDREQ_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MIR1_CMDREQ_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MIR1_CMDREQ_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MIR1_CMDREQ` writer"]
17pub struct W(crate::W<MIR1_CMDREQ_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MIR1_CMDREQ_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MIR1_CMDREQ_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MIR1_CMDREQ_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `MSGNUM` reader - Message Number"]
38pub type MSGNUM_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `MSGNUM` writer - Message Number"]
40pub type MSGNUM_W<'a> = crate::FieldWriter<'a, u32, MIR1_CMDREQ_SPEC, u8, u8, 6, 0>;
41#[doc = "Field `BUSY` reader - Busy Flag"]
42pub type BUSY_R = crate::BitReader<bool>;
43impl R {
44    #[doc = "Bits 0:5 - Message Number"]
45    #[inline(always)]
46    pub fn msgnum(&self) -> MSGNUM_R {
47        MSGNUM_R::new((self.bits & 0x3f) as u8)
48    }
49    #[doc = "Bit 15 - Busy Flag"]
50    #[inline(always)]
51    pub fn busy(&self) -> BUSY_R {
52        BUSY_R::new(((self.bits >> 15) & 1) != 0)
53    }
54}
55impl W {
56    #[doc = "Bits 0:5 - Message Number"]
57    #[inline(always)]
58    pub fn msgnum(&mut self) -> MSGNUM_W {
59        MSGNUM_W::new(self)
60    }
61    #[doc = "Writes raw bits to the register."]
62    #[inline(always)]
63    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
64        self.0.bits(bits);
65        self
66    }
67}
68#[doc = "Interface Command Request Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mir1_cmdreq](index.html) module"]
69pub struct MIR1_CMDREQ_SPEC;
70impl crate::RegisterSpec for MIR1_CMDREQ_SPEC {
71    type Ux = u32;
72}
73#[doc = "`read()` method returns [mir1_cmdreq::R](R) reader structure"]
74impl crate::Readable for MIR1_CMDREQ_SPEC {
75    type Reader = R;
76}
77#[doc = "`write(|w| ..)` method takes [mir1_cmdreq::W](W) writer structure"]
78impl crate::Writable for MIR1_CMDREQ_SPEC {
79    type Writer = W;
80}
81#[doc = "`reset()` method sets MIR1_CMDREQ to value 0x01"]
82impl crate::Resettable for MIR1_CMDREQ_SPEC {
83    #[inline(always)]
84    fn reset_value() -> Self::Ux {
85        0x01
86    }
87}
efm32gg12b330_pac/can1/mir1_cmdreq.rs

efm32gg12b330_pac/can1/
mir1_cmdreq.rs
