efm32gg12b330_pac/ldma/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `ANYBUSY` reader - Any DMA Channel Busy"]
17pub type ANYBUSY_R = crate::BitReader<bool>;
18#[doc = "Field `ANYREQ` reader - Any DMA Channel Request Pending"]
19pub type ANYREQ_R = crate::BitReader<bool>;
20#[doc = "Field `CHGRANT` reader - Granted Channel Number"]
21pub type CHGRANT_R = crate::FieldReader<u8, u8>;
22#[doc = "Field `CHERROR` reader - Errant Channel Number"]
23pub type CHERROR_R = crate::FieldReader<u8, u8>;
24#[doc = "Field `FIFOLEVEL` reader - FIFO Level"]
25pub type FIFOLEVEL_R = crate::FieldReader<u8, u8>;
26#[doc = "Field `CHNUM` reader - Number of Channels"]
27pub type CHNUM_R = crate::FieldReader<u8, u8>;
28impl R {
29    #[doc = "Bit 0 - Any DMA Channel Busy"]
30    #[inline(always)]
31    pub fn anybusy(&self) -> ANYBUSY_R {
32        ANYBUSY_R::new((self.bits & 1) != 0)
33    }
34    #[doc = "Bit 1 - Any DMA Channel Request Pending"]
35    #[inline(always)]
36    pub fn anyreq(&self) -> ANYREQ_R {
37        ANYREQ_R::new(((self.bits >> 1) & 1) != 0)
38    }
39    #[doc = "Bits 3:6 - Granted Channel Number"]
40    #[inline(always)]
41    pub fn chgrant(&self) -> CHGRANT_R {
42        CHGRANT_R::new(((self.bits >> 3) & 0x0f) as u8)
43    }
44    #[doc = "Bits 8:11 - Errant Channel Number"]
45    #[inline(always)]
46    pub fn cherror(&self) -> CHERROR_R {
47        CHERROR_R::new(((self.bits >> 8) & 0x0f) as u8)
48    }
49    #[doc = "Bits 16:20 - FIFO Level"]
50    #[inline(always)]
51    pub fn fifolevel(&self) -> FIFOLEVEL_R {
52        FIFOLEVEL_R::new(((self.bits >> 16) & 0x1f) as u8)
53    }
54    #[doc = "Bits 24:28 - Number of Channels"]
55    #[inline(always)]
56    pub fn chnum(&self) -> CHNUM_R {
57        CHNUM_R::new(((self.bits >> 24) & 0x1f) as u8)
58    }
59}
60#[doc = "DMA Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
61pub struct STATUS_SPEC;
62impl crate::RegisterSpec for STATUS_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [status::R](R) reader structure"]
66impl crate::Readable for STATUS_SPEC {
67    type Reader = R;
68}
69#[doc = "`reset()` method sets STATUS to value 0x0c10_0000"]
70impl crate::Resettable for STATUS_SPEC {
71    #[inline(always)]
72    fn reset_value() -> Self::Ux {
73        0x0c10_0000
74    }
75}
efm32gg12b330_pac/ldma/status.rs

efm32gg12b330_pac/ldma/
status.rs
