efm32gg12b330_pac/ldma/
ch2_reqsel.rs

1#[doc = "Register `CH2_REQSEL` reader"]
2pub struct R(crate::R<CH2_REQSEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH2_REQSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH2_REQSEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH2_REQSEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH2_REQSEL` writer"]
17pub struct W(crate::W<CH2_REQSEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH2_REQSEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH2_REQSEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH2_REQSEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SIGSEL` reader - Signal Select"]
38pub type SIGSEL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SIGSEL` writer - Signal Select"]
40pub type SIGSEL_W<'a> = crate::FieldWriter<'a, u32, CH2_REQSEL_SPEC, u8, u8, 4, 0>;
41#[doc = "Source Select\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum SOURCESEL_A {
45    #[doc = "0: No source selected"]
46    NONE = 0,
47    #[doc = "1: Peripheral Reflex System"]
48    PRS = 1,
49    #[doc = "8: Analog to Digital Converter 0"]
50    ADC0 = 8,
51    #[doc = "9: Analog to Digital Converter 0"]
52    ADC1 = 9,
53    #[doc = "10: Digital to Analog Converter 0"]
54    VDAC0 = 10,
55    #[doc = "12: Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
56    USART0 = 12,
57    #[doc = "13: Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
58    USART1 = 13,
59    #[doc = "14: Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
60    USART2 = 14,
61    #[doc = "15: Universal Synchronous/Asynchronous Receiver/Transmitter 3"]
62    USART3 = 15,
63    #[doc = "16: Universal Synchronous/Asynchronous Receiver/Transmitter 4"]
64    USART4 = 16,
65    #[doc = "18: Universal Asynchronous Receiver/Transmitter 0"]
66    UART0 = 18,
67    #[doc = "19: Universal Asynchronous Receiver/Transmitter 1"]
68    UART1 = 19,
69    #[doc = "20: Low Energy UART 0"]
70    LEUART0 = 20,
71    #[doc = "21: Low Energy UART 1"]
72    LEUART1 = 21,
73    #[doc = "22: I2C 0"]
74    I2C0 = 22,
75    #[doc = "23: I2C 1"]
76    I2C1 = 23,
77    #[doc = "25: Timer 0"]
78    TIMER0 = 25,
79    #[doc = "26: Timer 1"]
80    TIMER1 = 26,
81    #[doc = "27: Timer 2"]
82    TIMER2 = 27,
83    #[doc = "28: Timer 3"]
84    TIMER3 = 28,
85    #[doc = "32: Wide Timer 0"]
86    WTIMER0 = 32,
87    #[doc = "33: Wide Timer 0"]
88    WTIMER1 = 33,
89    #[doc = "48: Memory System Controller"]
90    MSC = 48,
91    #[doc = "49: Advanced Encryption Standard Accelerator"]
92    CRYPTO0 = 49,
93    #[doc = "50: External Bus Interface"]
94    EBI = 50,
95    #[doc = "51: PDM Interface"]
96    PDM = 51,
97    #[doc = "61: Capacitive touch sense module"]
98    CSEN = 61,
99    #[doc = "62: Low Energy Sensor Interface"]
100    LESENSE = 62,
101}
102impl From<SOURCESEL_A> for u8 {
103    #[inline(always)]
104    fn from(variant: SOURCESEL_A) -> Self {
105        variant as _
106    }
107}
108#[doc = "Field `SOURCESEL` reader - Source Select"]
109pub type SOURCESEL_R = crate::FieldReader<u8, SOURCESEL_A>;
110impl SOURCESEL_R {
111    #[doc = "Get enumerated values variant"]
112    #[inline(always)]
113    pub fn variant(&self) -> Option<SOURCESEL_A> {
114        match self.bits {
115            0 => Some(SOURCESEL_A::NONE),
116            1 => Some(SOURCESEL_A::PRS),
117            8 => Some(SOURCESEL_A::ADC0),
118            9 => Some(SOURCESEL_A::ADC1),
119            10 => Some(SOURCESEL_A::VDAC0),
120            12 => Some(SOURCESEL_A::USART0),
121            13 => Some(SOURCESEL_A::USART1),
122            14 => Some(SOURCESEL_A::USART2),
123            15 => Some(SOURCESEL_A::USART3),
124            16 => Some(SOURCESEL_A::USART4),
125            18 => Some(SOURCESEL_A::UART0),
126            19 => Some(SOURCESEL_A::UART1),
127            20 => Some(SOURCESEL_A::LEUART0),
128            21 => Some(SOURCESEL_A::LEUART1),
129            22 => Some(SOURCESEL_A::I2C0),
130            23 => Some(SOURCESEL_A::I2C1),
131            25 => Some(SOURCESEL_A::TIMER0),
132            26 => Some(SOURCESEL_A::TIMER1),
133            27 => Some(SOURCESEL_A::TIMER2),
134            28 => Some(SOURCESEL_A::TIMER3),
135            32 => Some(SOURCESEL_A::WTIMER0),
136            33 => Some(SOURCESEL_A::WTIMER1),
137            48 => Some(SOURCESEL_A::MSC),
138            49 => Some(SOURCESEL_A::CRYPTO0),
139            50 => Some(SOURCESEL_A::EBI),
140            51 => Some(SOURCESEL_A::PDM),
141            61 => Some(SOURCESEL_A::CSEN),
142            62 => Some(SOURCESEL_A::LESENSE),
143            _ => None,
144        }
145    }
146    #[doc = "Checks if the value of the field is `NONE`"]
147    #[inline(always)]
148    pub fn is_none(&self) -> bool {
149        *self == SOURCESEL_A::NONE
150    }
151    #[doc = "Checks if the value of the field is `PRS`"]
152    #[inline(always)]
153    pub fn is_prs(&self) -> bool {
154        *self == SOURCESEL_A::PRS
155    }
156    #[doc = "Checks if the value of the field is `ADC0`"]
157    #[inline(always)]
158    pub fn is_adc0(&self) -> bool {
159        *self == SOURCESEL_A::ADC0
160    }
161    #[doc = "Checks if the value of the field is `ADC1`"]
162    #[inline(always)]
163    pub fn is_adc1(&self) -> bool {
164        *self == SOURCESEL_A::ADC1
165    }
166    #[doc = "Checks if the value of the field is `VDAC0`"]
167    #[inline(always)]
168    pub fn is_vdac0(&self) -> bool {
169        *self == SOURCESEL_A::VDAC0
170    }
171    #[doc = "Checks if the value of the field is `USART0`"]
172    #[inline(always)]
173    pub fn is_usart0(&self) -> bool {
174        *self == SOURCESEL_A::USART0
175    }
176    #[doc = "Checks if the value of the field is `USART1`"]
177    #[inline(always)]
178    pub fn is_usart1(&self) -> bool {
179        *self == SOURCESEL_A::USART1
180    }
181    #[doc = "Checks if the value of the field is `USART2`"]
182    #[inline(always)]
183    pub fn is_usart2(&self) -> bool {
184        *self == SOURCESEL_A::USART2
185    }
186    #[doc = "Checks if the value of the field is `USART3`"]
187    #[inline(always)]
188    pub fn is_usart3(&self) -> bool {
189        *self == SOURCESEL_A::USART3
190    }
191    #[doc = "Checks if the value of the field is `USART4`"]
192    #[inline(always)]
193    pub fn is_usart4(&self) -> bool {
194        *self == SOURCESEL_A::USART4
195    }
196    #[doc = "Checks if the value of the field is `UART0`"]
197    #[inline(always)]
198    pub fn is_uart0(&self) -> bool {
199        *self == SOURCESEL_A::UART0
200    }
201    #[doc = "Checks if the value of the field is `UART1`"]
202    #[inline(always)]
203    pub fn is_uart1(&self) -> bool {
204        *self == SOURCESEL_A::UART1
205    }
206    #[doc = "Checks if the value of the field is `LEUART0`"]
207    #[inline(always)]
208    pub fn is_leuart0(&self) -> bool {
209        *self == SOURCESEL_A::LEUART0
210    }
211    #[doc = "Checks if the value of the field is `LEUART1`"]
212    #[inline(always)]
213    pub fn is_leuart1(&self) -> bool {
214        *self == SOURCESEL_A::LEUART1
215    }
216    #[doc = "Checks if the value of the field is `I2C0`"]
217    #[inline(always)]
218    pub fn is_i2c0(&self) -> bool {
219        *self == SOURCESEL_A::I2C0
220    }
221    #[doc = "Checks if the value of the field is `I2C1`"]
222    #[inline(always)]
223    pub fn is_i2c1(&self) -> bool {
224        *self == SOURCESEL_A::I2C1
225    }
226    #[doc = "Checks if the value of the field is `TIMER0`"]
227    #[inline(always)]
228    pub fn is_timer0(&self) -> bool {
229        *self == SOURCESEL_A::TIMER0
230    }
231    #[doc = "Checks if the value of the field is `TIMER1`"]
232    #[inline(always)]
233    pub fn is_timer1(&self) -> bool {
234        *self == SOURCESEL_A::TIMER1
235    }
236    #[doc = "Checks if the value of the field is `TIMER2`"]
237    #[inline(always)]
238    pub fn is_timer2(&self) -> bool {
239        *self == SOURCESEL_A::TIMER2
240    }
241    #[doc = "Checks if the value of the field is `TIMER3`"]
242    #[inline(always)]
243    pub fn is_timer3(&self) -> bool {
244        *self == SOURCESEL_A::TIMER3
245    }
246    #[doc = "Checks if the value of the field is `WTIMER0`"]
247    #[inline(always)]
248    pub fn is_wtimer0(&self) -> bool {
249        *self == SOURCESEL_A::WTIMER0
250    }
251    #[doc = "Checks if the value of the field is `WTIMER1`"]
252    #[inline(always)]
253    pub fn is_wtimer1(&self) -> bool {
254        *self == SOURCESEL_A::WTIMER1
255    }
256    #[doc = "Checks if the value of the field is `MSC`"]
257    #[inline(always)]
258    pub fn is_msc(&self) -> bool {
259        *self == SOURCESEL_A::MSC
260    }
261    #[doc = "Checks if the value of the field is `CRYPTO0`"]
262    #[inline(always)]
263    pub fn is_crypto0(&self) -> bool {
264        *self == SOURCESEL_A::CRYPTO0
265    }
266    #[doc = "Checks if the value of the field is `EBI`"]
267    #[inline(always)]
268    pub fn is_ebi(&self) -> bool {
269        *self == SOURCESEL_A::EBI
270    }
271    #[doc = "Checks if the value of the field is `PDM`"]
272    #[inline(always)]
273    pub fn is_pdm(&self) -> bool {
274        *self == SOURCESEL_A::PDM
275    }
276    #[doc = "Checks if the value of the field is `CSEN`"]
277    #[inline(always)]
278    pub fn is_csen(&self) -> bool {
279        *self == SOURCESEL_A::CSEN
280    }
281    #[doc = "Checks if the value of the field is `LESENSE`"]
282    #[inline(always)]
283    pub fn is_lesense(&self) -> bool {
284        *self == SOURCESEL_A::LESENSE
285    }
286}
287#[doc = "Field `SOURCESEL` writer - Source Select"]
288pub type SOURCESEL_W<'a> = crate::FieldWriter<'a, u32, CH2_REQSEL_SPEC, u8, SOURCESEL_A, 6, 16>;
289impl<'a> SOURCESEL_W<'a> {
290    #[doc = "No source selected"]
291    #[inline(always)]
292    pub fn none(self) -> &'a mut W {
293        self.variant(SOURCESEL_A::NONE)
294    }
295    #[doc = "Peripheral Reflex System"]
296    #[inline(always)]
297    pub fn prs(self) -> &'a mut W {
298        self.variant(SOURCESEL_A::PRS)
299    }
300    #[doc = "Analog to Digital Converter 0"]
301    #[inline(always)]
302    pub fn adc0(self) -> &'a mut W {
303        self.variant(SOURCESEL_A::ADC0)
304    }
305    #[doc = "Analog to Digital Converter 0"]
306    #[inline(always)]
307    pub fn adc1(self) -> &'a mut W {
308        self.variant(SOURCESEL_A::ADC1)
309    }
310    #[doc = "Digital to Analog Converter 0"]
311    #[inline(always)]
312    pub fn vdac0(self) -> &'a mut W {
313        self.variant(SOURCESEL_A::VDAC0)
314    }
315    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 0"]
316    #[inline(always)]
317    pub fn usart0(self) -> &'a mut W {
318        self.variant(SOURCESEL_A::USART0)
319    }
320    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 1"]
321    #[inline(always)]
322    pub fn usart1(self) -> &'a mut W {
323        self.variant(SOURCESEL_A::USART1)
324    }
325    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 2"]
326    #[inline(always)]
327    pub fn usart2(self) -> &'a mut W {
328        self.variant(SOURCESEL_A::USART2)
329    }
330    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 3"]
331    #[inline(always)]
332    pub fn usart3(self) -> &'a mut W {
333        self.variant(SOURCESEL_A::USART3)
334    }
335    #[doc = "Universal Synchronous/Asynchronous Receiver/Transmitter 4"]
336    #[inline(always)]
337    pub fn usart4(self) -> &'a mut W {
338        self.variant(SOURCESEL_A::USART4)
339    }
340    #[doc = "Universal Asynchronous Receiver/Transmitter 0"]
341    #[inline(always)]
342    pub fn uart0(self) -> &'a mut W {
343        self.variant(SOURCESEL_A::UART0)
344    }
345    #[doc = "Universal Asynchronous Receiver/Transmitter 1"]
346    #[inline(always)]
347    pub fn uart1(self) -> &'a mut W {
348        self.variant(SOURCESEL_A::UART1)
349    }
350    #[doc = "Low Energy UART 0"]
351    #[inline(always)]
352    pub fn leuart0(self) -> &'a mut W {
353        self.variant(SOURCESEL_A::LEUART0)
354    }
355    #[doc = "Low Energy UART 1"]
356    #[inline(always)]
357    pub fn leuart1(self) -> &'a mut W {
358        self.variant(SOURCESEL_A::LEUART1)
359    }
360    #[doc = "I2C 0"]
361    #[inline(always)]
362    pub fn i2c0(self) -> &'a mut W {
363        self.variant(SOURCESEL_A::I2C0)
364    }
365    #[doc = "I2C 1"]
366    #[inline(always)]
367    pub fn i2c1(self) -> &'a mut W {
368        self.variant(SOURCESEL_A::I2C1)
369    }
370    #[doc = "Timer 0"]
371    #[inline(always)]
372    pub fn timer0(self) -> &'a mut W {
373        self.variant(SOURCESEL_A::TIMER0)
374    }
375    #[doc = "Timer 1"]
376    #[inline(always)]
377    pub fn timer1(self) -> &'a mut W {
378        self.variant(SOURCESEL_A::TIMER1)
379    }
380    #[doc = "Timer 2"]
381    #[inline(always)]
382    pub fn timer2(self) -> &'a mut W {
383        self.variant(SOURCESEL_A::TIMER2)
384    }
385    #[doc = "Timer 3"]
386    #[inline(always)]
387    pub fn timer3(self) -> &'a mut W {
388        self.variant(SOURCESEL_A::TIMER3)
389    }
390    #[doc = "Wide Timer 0"]
391    #[inline(always)]
392    pub fn wtimer0(self) -> &'a mut W {
393        self.variant(SOURCESEL_A::WTIMER0)
394    }
395    #[doc = "Wide Timer 0"]
396    #[inline(always)]
397    pub fn wtimer1(self) -> &'a mut W {
398        self.variant(SOURCESEL_A::WTIMER1)
399    }
400    #[doc = "Memory System Controller"]
401    #[inline(always)]
402    pub fn msc(self) -> &'a mut W {
403        self.variant(SOURCESEL_A::MSC)
404    }
405    #[doc = "Advanced Encryption Standard Accelerator"]
406    #[inline(always)]
407    pub fn crypto0(self) -> &'a mut W {
408        self.variant(SOURCESEL_A::CRYPTO0)
409    }
410    #[doc = "External Bus Interface"]
411    #[inline(always)]
412    pub fn ebi(self) -> &'a mut W {
413        self.variant(SOURCESEL_A::EBI)
414    }
415    #[doc = "PDM Interface"]
416    #[inline(always)]
417    pub fn pdm(self) -> &'a mut W {
418        self.variant(SOURCESEL_A::PDM)
419    }
420    #[doc = "Capacitive touch sense module"]
421    #[inline(always)]
422    pub fn csen(self) -> &'a mut W {
423        self.variant(SOURCESEL_A::CSEN)
424    }
425    #[doc = "Low Energy Sensor Interface"]
426    #[inline(always)]
427    pub fn lesense(self) -> &'a mut W {
428        self.variant(SOURCESEL_A::LESENSE)
429    }
430}
431impl R {
432    #[doc = "Bits 0:3 - Signal Select"]
433    #[inline(always)]
434    pub fn sigsel(&self) -> SIGSEL_R {
435        SIGSEL_R::new((self.bits & 0x0f) as u8)
436    }
437    #[doc = "Bits 16:21 - Source Select"]
438    #[inline(always)]
439    pub fn sourcesel(&self) -> SOURCESEL_R {
440        SOURCESEL_R::new(((self.bits >> 16) & 0x3f) as u8)
441    }
442}
443impl W {
444    #[doc = "Bits 0:3 - Signal Select"]
445    #[inline(always)]
446    pub fn sigsel(&mut self) -> SIGSEL_W {
447        SIGSEL_W::new(self)
448    }
449    #[doc = "Bits 16:21 - Source Select"]
450    #[inline(always)]
451    pub fn sourcesel(&mut self) -> SOURCESEL_W {
452        SOURCESEL_W::new(self)
453    }
454    #[doc = "Writes raw bits to the register."]
455    #[inline(always)]
456    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
457        self.0.bits(bits);
458        self
459    }
460}
461#[doc = "Channel Peripheral Request Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2_reqsel](index.html) module"]
462pub struct CH2_REQSEL_SPEC;
463impl crate::RegisterSpec for CH2_REQSEL_SPEC {
464    type Ux = u32;
465}
466#[doc = "`read()` method returns [ch2_reqsel::R](R) reader structure"]
467impl crate::Readable for CH2_REQSEL_SPEC {
468    type Reader = R;
469}
470#[doc = "`write(|w| ..)` method takes [ch2_reqsel::W](W) writer structure"]
471impl crate::Writable for CH2_REQSEL_SPEC {
472    type Writer = W;
473}
474#[doc = "`reset()` method sets CH2_REQSEL to value 0"]
475impl crate::Resettable for CH2_REQSEL_SPEC {
476    #[inline(always)]
477    fn reset_value() -> Self::Ux {
478        0
479    }
480}
efm32gg12b330_pac/ldma/ch2_reqsel.rs

efm32gg12b330_pac/ldma/
ch2_reqsel.rs
