1#[doc = "Register `SCANCTRLX` reader"]
2pub struct R(crate::R<SCANCTRLX_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SCANCTRLX_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SCANCTRLX_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SCANCTRLX_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SCANCTRLX` writer"]
17pub struct W(crate::W<SCANCTRLX_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SCANCTRLX_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SCANCTRLX_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SCANCTRLX_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Scan Channel Reference Selection\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum VREFSEL_A {
41 #[doc = "0: Internal 0.83V Bandgap reference"]
42 VBGR = 0,
43 #[doc = "1: Scaled AVDD: AVDD*(the VREF attenuation factor)"]
44 VDDXWATT = 1,
45 #[doc = "2: Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
46 VREFPWATT = 2,
47 #[doc = "3: Raw single ended external Vref: ADCn_EXTP"]
48 VREFP = 3,
49 #[doc = "5: Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
50 VREFPNWATT = 5,
51 #[doc = "6: Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
52 VREFPN = 6,
53 #[doc = "7: Internal Bandgap reference at low setting 0.78V"]
54 VBGRLOW = 7,
55}
56impl From<VREFSEL_A> for u8 {
57 #[inline(always)]
58 fn from(variant: VREFSEL_A) -> Self {
59 variant as _
60 }
61}
62#[doc = "Field `VREFSEL` reader - Scan Channel Reference Selection"]
63pub type VREFSEL_R = crate::FieldReader<u8, VREFSEL_A>;
64impl VREFSEL_R {
65 #[doc = "Get enumerated values variant"]
66 #[inline(always)]
67 pub fn variant(&self) -> Option<VREFSEL_A> {
68 match self.bits {
69 0 => Some(VREFSEL_A::VBGR),
70 1 => Some(VREFSEL_A::VDDXWATT),
71 2 => Some(VREFSEL_A::VREFPWATT),
72 3 => Some(VREFSEL_A::VREFP),
73 5 => Some(VREFSEL_A::VREFPNWATT),
74 6 => Some(VREFSEL_A::VREFPN),
75 7 => Some(VREFSEL_A::VBGRLOW),
76 _ => None,
77 }
78 }
79 #[doc = "Checks if the value of the field is `VBGR`"]
80 #[inline(always)]
81 pub fn is_vbgr(&self) -> bool {
82 *self == VREFSEL_A::VBGR
83 }
84 #[doc = "Checks if the value of the field is `VDDXWATT`"]
85 #[inline(always)]
86 pub fn is_vddxwatt(&self) -> bool {
87 *self == VREFSEL_A::VDDXWATT
88 }
89 #[doc = "Checks if the value of the field is `VREFPWATT`"]
90 #[inline(always)]
91 pub fn is_vrefpwatt(&self) -> bool {
92 *self == VREFSEL_A::VREFPWATT
93 }
94 #[doc = "Checks if the value of the field is `VREFP`"]
95 #[inline(always)]
96 pub fn is_vrefp(&self) -> bool {
97 *self == VREFSEL_A::VREFP
98 }
99 #[doc = "Checks if the value of the field is `VREFPNWATT`"]
100 #[inline(always)]
101 pub fn is_vrefpnwatt(&self) -> bool {
102 *self == VREFSEL_A::VREFPNWATT
103 }
104 #[doc = "Checks if the value of the field is `VREFPN`"]
105 #[inline(always)]
106 pub fn is_vrefpn(&self) -> bool {
107 *self == VREFSEL_A::VREFPN
108 }
109 #[doc = "Checks if the value of the field is `VBGRLOW`"]
110 #[inline(always)]
111 pub fn is_vbgrlow(&self) -> bool {
112 *self == VREFSEL_A::VBGRLOW
113 }
114}
115#[doc = "Field `VREFSEL` writer - Scan Channel Reference Selection"]
116pub type VREFSEL_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, VREFSEL_A, 3, 0>;
117impl<'a> VREFSEL_W<'a> {
118 #[doc = "Internal 0.83V Bandgap reference"]
119 #[inline(always)]
120 pub fn vbgr(self) -> &'a mut W {
121 self.variant(VREFSEL_A::VBGR)
122 }
123 #[doc = "Scaled AVDD: AVDD*(the VREF attenuation factor)"]
124 #[inline(always)]
125 pub fn vddxwatt(self) -> &'a mut W {
126 self.variant(VREFSEL_A::VDDXWATT)
127 }
128 #[doc = "Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
129 #[inline(always)]
130 pub fn vrefpwatt(self) -> &'a mut W {
131 self.variant(VREFSEL_A::VREFPWATT)
132 }
133 #[doc = "Raw single ended external Vref: ADCn_EXTP"]
134 #[inline(always)]
135 pub fn vrefp(self) -> &'a mut W {
136 self.variant(VREFSEL_A::VREFP)
137 }
138 #[doc = "Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
139 #[inline(always)]
140 pub fn vrefpnwatt(self) -> &'a mut W {
141 self.variant(VREFSEL_A::VREFPNWATT)
142 }
143 #[doc = "Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
144 #[inline(always)]
145 pub fn vrefpn(self) -> &'a mut W {
146 self.variant(VREFSEL_A::VREFPN)
147 }
148 #[doc = "Internal Bandgap reference at low setting 0.78V"]
149 #[inline(always)]
150 pub fn vbgrlow(self) -> &'a mut W {
151 self.variant(VREFSEL_A::VBGRLOW)
152 }
153}
154#[doc = "Field `VREFATTFIX` reader - Enable Fixed Scaling on VREF"]
155pub type VREFATTFIX_R = crate::BitReader<bool>;
156#[doc = "Field `VREFATTFIX` writer - Enable Fixed Scaling on VREF"]
157pub type VREFATTFIX_W<'a> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, 3>;
158#[doc = "Field `VREFATT` reader - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
159pub type VREFATT_R = crate::FieldReader<u8, u8>;
160#[doc = "Field `VREFATT` writer - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
161pub type VREFATT_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 4, 4>;
162#[doc = "Field `VINATT` reader - Code for VIN Attenuation Factor"]
163pub type VINATT_R = crate::FieldReader<u8, u8>;
164#[doc = "Field `VINATT` writer - Code for VIN Attenuation Factor"]
165pub type VINATT_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 4, 8>;
166#[doc = "Field `DVL` reader - Scan DV Level Select"]
167pub type DVL_R = crate::FieldReader<u8, u8>;
168#[doc = "Field `DVL` writer - Scan DV Level Select"]
169pub type DVL_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 2, 12>;
170#[doc = "Field `FIFOOFACT` reader - Scan FIFO Overflow Action"]
171pub type FIFOOFACT_R = crate::BitReader<bool>;
172#[doc = "Field `FIFOOFACT` writer - Scan FIFO Overflow Action"]
173pub type FIFOOFACT_W<'a> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, 14>;
174#[doc = "Field `PRSMODE` reader - Scan PRS Trigger Mode"]
175pub type PRSMODE_R = crate::BitReader<bool>;
176#[doc = "Field `PRSMODE` writer - Scan PRS Trigger Mode"]
177pub type PRSMODE_W<'a> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, 16>;
178#[doc = "Scan Sequence PRS Trigger Select\n\nValue on reset: 0"]
179#[derive(Clone, Copy, Debug, PartialEq)]
180#[repr(u8)]
181pub enum PRSSEL_A {
182 #[doc = "0: PRS ch 0 triggers scan sequence"]
183 PRSCH0 = 0,
184 #[doc = "1: PRS ch 1 triggers scan sequence"]
185 PRSCH1 = 1,
186 #[doc = "2: PRS ch 2 triggers scan sequence"]
187 PRSCH2 = 2,
188 #[doc = "3: PRS ch 3 triggers scan sequence"]
189 PRSCH3 = 3,
190 #[doc = "4: PRS ch 4 triggers scan sequence"]
191 PRSCH4 = 4,
192 #[doc = "5: PRS ch 5 triggers scan sequence"]
193 PRSCH5 = 5,
194 #[doc = "6: PRS ch 6 triggers scan sequence"]
195 PRSCH6 = 6,
196 #[doc = "7: PRS ch 7 triggers scan sequence"]
197 PRSCH7 = 7,
198 #[doc = "8: PRS ch 8 triggers scan sequence"]
199 PRSCH8 = 8,
200 #[doc = "9: PRS ch 9 triggers scan sequence"]
201 PRSCH9 = 9,
202 #[doc = "10: PRS ch 10 triggers scan sequence"]
203 PRSCH10 = 10,
204 #[doc = "11: PRS ch 11 triggers scan sequence"]
205 PRSCH11 = 11,
206 #[doc = "12: PRS ch 12 triggers scan sequence"]
207 PRSCH12 = 12,
208 #[doc = "13: PRS ch 13 triggers scan sequence"]
209 PRSCH13 = 13,
210 #[doc = "14: PRS ch 14 triggers scan sequence"]
211 PRSCH14 = 14,
212 #[doc = "15: PRS ch 15 triggers scan sequence"]
213 PRSCH15 = 15,
214}
215impl From<PRSSEL_A> for u8 {
216 #[inline(always)]
217 fn from(variant: PRSSEL_A) -> Self {
218 variant as _
219 }
220}
221#[doc = "Field `PRSSEL` reader - Scan Sequence PRS Trigger Select"]
222pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
223impl PRSSEL_R {
224 #[doc = "Get enumerated values variant"]
225 #[inline(always)]
226 pub fn variant(&self) -> PRSSEL_A {
227 match self.bits {
228 0 => PRSSEL_A::PRSCH0,
229 1 => PRSSEL_A::PRSCH1,
230 2 => PRSSEL_A::PRSCH2,
231 3 => PRSSEL_A::PRSCH3,
232 4 => PRSSEL_A::PRSCH4,
233 5 => PRSSEL_A::PRSCH5,
234 6 => PRSSEL_A::PRSCH6,
235 7 => PRSSEL_A::PRSCH7,
236 8 => PRSSEL_A::PRSCH8,
237 9 => PRSSEL_A::PRSCH9,
238 10 => PRSSEL_A::PRSCH10,
239 11 => PRSSEL_A::PRSCH11,
240 12 => PRSSEL_A::PRSCH12,
241 13 => PRSSEL_A::PRSCH13,
242 14 => PRSSEL_A::PRSCH14,
243 15 => PRSSEL_A::PRSCH15,
244 _ => unreachable!(),
245 }
246 }
247 #[doc = "Checks if the value of the field is `PRSCH0`"]
248 #[inline(always)]
249 pub fn is_prsch0(&self) -> bool {
250 *self == PRSSEL_A::PRSCH0
251 }
252 #[doc = "Checks if the value of the field is `PRSCH1`"]
253 #[inline(always)]
254 pub fn is_prsch1(&self) -> bool {
255 *self == PRSSEL_A::PRSCH1
256 }
257 #[doc = "Checks if the value of the field is `PRSCH2`"]
258 #[inline(always)]
259 pub fn is_prsch2(&self) -> bool {
260 *self == PRSSEL_A::PRSCH2
261 }
262 #[doc = "Checks if the value of the field is `PRSCH3`"]
263 #[inline(always)]
264 pub fn is_prsch3(&self) -> bool {
265 *self == PRSSEL_A::PRSCH3
266 }
267 #[doc = "Checks if the value of the field is `PRSCH4`"]
268 #[inline(always)]
269 pub fn is_prsch4(&self) -> bool {
270 *self == PRSSEL_A::PRSCH4
271 }
272 #[doc = "Checks if the value of the field is `PRSCH5`"]
273 #[inline(always)]
274 pub fn is_prsch5(&self) -> bool {
275 *self == PRSSEL_A::PRSCH5
276 }
277 #[doc = "Checks if the value of the field is `PRSCH6`"]
278 #[inline(always)]
279 pub fn is_prsch6(&self) -> bool {
280 *self == PRSSEL_A::PRSCH6
281 }
282 #[doc = "Checks if the value of the field is `PRSCH7`"]
283 #[inline(always)]
284 pub fn is_prsch7(&self) -> bool {
285 *self == PRSSEL_A::PRSCH7
286 }
287 #[doc = "Checks if the value of the field is `PRSCH8`"]
288 #[inline(always)]
289 pub fn is_prsch8(&self) -> bool {
290 *self == PRSSEL_A::PRSCH8
291 }
292 #[doc = "Checks if the value of the field is `PRSCH9`"]
293 #[inline(always)]
294 pub fn is_prsch9(&self) -> bool {
295 *self == PRSSEL_A::PRSCH9
296 }
297 #[doc = "Checks if the value of the field is `PRSCH10`"]
298 #[inline(always)]
299 pub fn is_prsch10(&self) -> bool {
300 *self == PRSSEL_A::PRSCH10
301 }
302 #[doc = "Checks if the value of the field is `PRSCH11`"]
303 #[inline(always)]
304 pub fn is_prsch11(&self) -> bool {
305 *self == PRSSEL_A::PRSCH11
306 }
307 #[doc = "Checks if the value of the field is `PRSCH12`"]
308 #[inline(always)]
309 pub fn is_prsch12(&self) -> bool {
310 *self == PRSSEL_A::PRSCH12
311 }
312 #[doc = "Checks if the value of the field is `PRSCH13`"]
313 #[inline(always)]
314 pub fn is_prsch13(&self) -> bool {
315 *self == PRSSEL_A::PRSCH13
316 }
317 #[doc = "Checks if the value of the field is `PRSCH14`"]
318 #[inline(always)]
319 pub fn is_prsch14(&self) -> bool {
320 *self == PRSSEL_A::PRSCH14
321 }
322 #[doc = "Checks if the value of the field is `PRSCH15`"]
323 #[inline(always)]
324 pub fn is_prsch15(&self) -> bool {
325 *self == PRSSEL_A::PRSCH15
326 }
327}
328#[doc = "Field `PRSSEL` writer - Scan Sequence PRS Trigger Select"]
329pub type PRSSEL_W<'a> = crate::FieldWriterSafe<'a, u32, SCANCTRLX_SPEC, u8, PRSSEL_A, 4, 17>;
330impl<'a> PRSSEL_W<'a> {
331 #[doc = "PRS ch 0 triggers scan sequence"]
332 #[inline(always)]
333 pub fn prsch0(self) -> &'a mut W {
334 self.variant(PRSSEL_A::PRSCH0)
335 }
336 #[doc = "PRS ch 1 triggers scan sequence"]
337 #[inline(always)]
338 pub fn prsch1(self) -> &'a mut W {
339 self.variant(PRSSEL_A::PRSCH1)
340 }
341 #[doc = "PRS ch 2 triggers scan sequence"]
342 #[inline(always)]
343 pub fn prsch2(self) -> &'a mut W {
344 self.variant(PRSSEL_A::PRSCH2)
345 }
346 #[doc = "PRS ch 3 triggers scan sequence"]
347 #[inline(always)]
348 pub fn prsch3(self) -> &'a mut W {
349 self.variant(PRSSEL_A::PRSCH3)
350 }
351 #[doc = "PRS ch 4 triggers scan sequence"]
352 #[inline(always)]
353 pub fn prsch4(self) -> &'a mut W {
354 self.variant(PRSSEL_A::PRSCH4)
355 }
356 #[doc = "PRS ch 5 triggers scan sequence"]
357 #[inline(always)]
358 pub fn prsch5(self) -> &'a mut W {
359 self.variant(PRSSEL_A::PRSCH5)
360 }
361 #[doc = "PRS ch 6 triggers scan sequence"]
362 #[inline(always)]
363 pub fn prsch6(self) -> &'a mut W {
364 self.variant(PRSSEL_A::PRSCH6)
365 }
366 #[doc = "PRS ch 7 triggers scan sequence"]
367 #[inline(always)]
368 pub fn prsch7(self) -> &'a mut W {
369 self.variant(PRSSEL_A::PRSCH7)
370 }
371 #[doc = "PRS ch 8 triggers scan sequence"]
372 #[inline(always)]
373 pub fn prsch8(self) -> &'a mut W {
374 self.variant(PRSSEL_A::PRSCH8)
375 }
376 #[doc = "PRS ch 9 triggers scan sequence"]
377 #[inline(always)]
378 pub fn prsch9(self) -> &'a mut W {
379 self.variant(PRSSEL_A::PRSCH9)
380 }
381 #[doc = "PRS ch 10 triggers scan sequence"]
382 #[inline(always)]
383 pub fn prsch10(self) -> &'a mut W {
384 self.variant(PRSSEL_A::PRSCH10)
385 }
386 #[doc = "PRS ch 11 triggers scan sequence"]
387 #[inline(always)]
388 pub fn prsch11(self) -> &'a mut W {
389 self.variant(PRSSEL_A::PRSCH11)
390 }
391 #[doc = "PRS ch 12 triggers scan sequence"]
392 #[inline(always)]
393 pub fn prsch12(self) -> &'a mut W {
394 self.variant(PRSSEL_A::PRSCH12)
395 }
396 #[doc = "PRS ch 13 triggers scan sequence"]
397 #[inline(always)]
398 pub fn prsch13(self) -> &'a mut W {
399 self.variant(PRSSEL_A::PRSCH13)
400 }
401 #[doc = "PRS ch 14 triggers scan sequence"]
402 #[inline(always)]
403 pub fn prsch14(self) -> &'a mut W {
404 self.variant(PRSSEL_A::PRSCH14)
405 }
406 #[doc = "PRS ch 15 triggers scan sequence"]
407 #[inline(always)]
408 pub fn prsch15(self) -> &'a mut W {
409 self.variant(PRSSEL_A::PRSCH15)
410 }
411}
412#[doc = "Field `CONVSTARTDELAY` reader - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
413pub type CONVSTARTDELAY_R = crate::FieldReader<u8, u8>;
414#[doc = "Field `CONVSTARTDELAY` writer - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
415pub type CONVSTARTDELAY_W<'a> = crate::FieldWriter<'a, u32, SCANCTRLX_SPEC, u8, u8, 5, 22>;
416#[doc = "Field `CONVSTARTDELAYEN` reader - Enable Delaying Next Conversion Start"]
417pub type CONVSTARTDELAYEN_R = crate::BitReader<bool>;
418#[doc = "Field `CONVSTARTDELAYEN` writer - Enable Delaying Next Conversion Start"]
419pub type CONVSTARTDELAYEN_W<'a> = crate::BitWriter<'a, u32, SCANCTRLX_SPEC, bool, 27>;
420#[doc = "REPDELAY Select for SCAN REP Mode\n\nValue on reset: 0"]
421#[derive(Clone, Copy, Debug, PartialEq)]
422#[repr(u8)]
423pub enum REPDELAY_A {
424 #[doc = "0: No delay"]
425 NODELAY = 0,
426 #[doc = "1: 4 conversion clock cycles"]
427 _4CYCLES = 1,
428 #[doc = "2: 8 conversion clock cycles"]
429 _8CYCLES = 2,
430 #[doc = "3: 16 conversion clock cycles"]
431 _16CYCLES = 3,
432 #[doc = "4: 32 conversion clock cycles"]
433 _32CYCLES = 4,
434 #[doc = "5: 64 conversion clock cycles"]
435 _64CYCLES = 5,
436 #[doc = "6: 128 conversion clock cycles"]
437 _128CYCLES = 6,
438 #[doc = "7: 256 conversion clock cycles"]
439 _256CYCLES = 7,
440}
441impl From<REPDELAY_A> for u8 {
442 #[inline(always)]
443 fn from(variant: REPDELAY_A) -> Self {
444 variant as _
445 }
446}
447#[doc = "Field `REPDELAY` reader - REPDELAY Select for SCAN REP Mode"]
448pub type REPDELAY_R = crate::FieldReader<u8, REPDELAY_A>;
449impl REPDELAY_R {
450 #[doc = "Get enumerated values variant"]
451 #[inline(always)]
452 pub fn variant(&self) -> REPDELAY_A {
453 match self.bits {
454 0 => REPDELAY_A::NODELAY,
455 1 => REPDELAY_A::_4CYCLES,
456 2 => REPDELAY_A::_8CYCLES,
457 3 => REPDELAY_A::_16CYCLES,
458 4 => REPDELAY_A::_32CYCLES,
459 5 => REPDELAY_A::_64CYCLES,
460 6 => REPDELAY_A::_128CYCLES,
461 7 => REPDELAY_A::_256CYCLES,
462 _ => unreachable!(),
463 }
464 }
465 #[doc = "Checks if the value of the field is `NODELAY`"]
466 #[inline(always)]
467 pub fn is_nodelay(&self) -> bool {
468 *self == REPDELAY_A::NODELAY
469 }
470 #[doc = "Checks if the value of the field is `_4CYCLES`"]
471 #[inline(always)]
472 pub fn is_4cycles(&self) -> bool {
473 *self == REPDELAY_A::_4CYCLES
474 }
475 #[doc = "Checks if the value of the field is `_8CYCLES`"]
476 #[inline(always)]
477 pub fn is_8cycles(&self) -> bool {
478 *self == REPDELAY_A::_8CYCLES
479 }
480 #[doc = "Checks if the value of the field is `_16CYCLES`"]
481 #[inline(always)]
482 pub fn is_16cycles(&self) -> bool {
483 *self == REPDELAY_A::_16CYCLES
484 }
485 #[doc = "Checks if the value of the field is `_32CYCLES`"]
486 #[inline(always)]
487 pub fn is_32cycles(&self) -> bool {
488 *self == REPDELAY_A::_32CYCLES
489 }
490 #[doc = "Checks if the value of the field is `_64CYCLES`"]
491 #[inline(always)]
492 pub fn is_64cycles(&self) -> bool {
493 *self == REPDELAY_A::_64CYCLES
494 }
495 #[doc = "Checks if the value of the field is `_128CYCLES`"]
496 #[inline(always)]
497 pub fn is_128cycles(&self) -> bool {
498 *self == REPDELAY_A::_128CYCLES
499 }
500 #[doc = "Checks if the value of the field is `_256CYCLES`"]
501 #[inline(always)]
502 pub fn is_256cycles(&self) -> bool {
503 *self == REPDELAY_A::_256CYCLES
504 }
505}
506#[doc = "Field `REPDELAY` writer - REPDELAY Select for SCAN REP Mode"]
507pub type REPDELAY_W<'a> = crate::FieldWriterSafe<'a, u32, SCANCTRLX_SPEC, u8, REPDELAY_A, 3, 29>;
508impl<'a> REPDELAY_W<'a> {
509 #[doc = "No delay"]
510 #[inline(always)]
511 pub fn nodelay(self) -> &'a mut W {
512 self.variant(REPDELAY_A::NODELAY)
513 }
514 #[doc = "4 conversion clock cycles"]
515 #[inline(always)]
516 pub fn _4cycles(self) -> &'a mut W {
517 self.variant(REPDELAY_A::_4CYCLES)
518 }
519 #[doc = "8 conversion clock cycles"]
520 #[inline(always)]
521 pub fn _8cycles(self) -> &'a mut W {
522 self.variant(REPDELAY_A::_8CYCLES)
523 }
524 #[doc = "16 conversion clock cycles"]
525 #[inline(always)]
526 pub fn _16cycles(self) -> &'a mut W {
527 self.variant(REPDELAY_A::_16CYCLES)
528 }
529 #[doc = "32 conversion clock cycles"]
530 #[inline(always)]
531 pub fn _32cycles(self) -> &'a mut W {
532 self.variant(REPDELAY_A::_32CYCLES)
533 }
534 #[doc = "64 conversion clock cycles"]
535 #[inline(always)]
536 pub fn _64cycles(self) -> &'a mut W {
537 self.variant(REPDELAY_A::_64CYCLES)
538 }
539 #[doc = "128 conversion clock cycles"]
540 #[inline(always)]
541 pub fn _128cycles(self) -> &'a mut W {
542 self.variant(REPDELAY_A::_128CYCLES)
543 }
544 #[doc = "256 conversion clock cycles"]
545 #[inline(always)]
546 pub fn _256cycles(self) -> &'a mut W {
547 self.variant(REPDELAY_A::_256CYCLES)
548 }
549}
550impl R {
551 #[doc = "Bits 0:2 - Scan Channel Reference Selection"]
552 #[inline(always)]
553 pub fn vrefsel(&self) -> VREFSEL_R {
554 VREFSEL_R::new((self.bits & 7) as u8)
555 }
556 #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
557 #[inline(always)]
558 pub fn vrefattfix(&self) -> VREFATTFIX_R {
559 VREFATTFIX_R::new(((self.bits >> 3) & 1) != 0)
560 }
561 #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
562 #[inline(always)]
563 pub fn vrefatt(&self) -> VREFATT_R {
564 VREFATT_R::new(((self.bits >> 4) & 0x0f) as u8)
565 }
566 #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
567 #[inline(always)]
568 pub fn vinatt(&self) -> VINATT_R {
569 VINATT_R::new(((self.bits >> 8) & 0x0f) as u8)
570 }
571 #[doc = "Bits 12:13 - Scan DV Level Select"]
572 #[inline(always)]
573 pub fn dvl(&self) -> DVL_R {
574 DVL_R::new(((self.bits >> 12) & 3) as u8)
575 }
576 #[doc = "Bit 14 - Scan FIFO Overflow Action"]
577 #[inline(always)]
578 pub fn fifoofact(&self) -> FIFOOFACT_R {
579 FIFOOFACT_R::new(((self.bits >> 14) & 1) != 0)
580 }
581 #[doc = "Bit 16 - Scan PRS Trigger Mode"]
582 #[inline(always)]
583 pub fn prsmode(&self) -> PRSMODE_R {
584 PRSMODE_R::new(((self.bits >> 16) & 1) != 0)
585 }
586 #[doc = "Bits 17:20 - Scan Sequence PRS Trigger Select"]
587 #[inline(always)]
588 pub fn prssel(&self) -> PRSSEL_R {
589 PRSSEL_R::new(((self.bits >> 17) & 0x0f) as u8)
590 }
591 #[doc = "Bits 22:26 - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
592 #[inline(always)]
593 pub fn convstartdelay(&self) -> CONVSTARTDELAY_R {
594 CONVSTARTDELAY_R::new(((self.bits >> 22) & 0x1f) as u8)
595 }
596 #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
597 #[inline(always)]
598 pub fn convstartdelayen(&self) -> CONVSTARTDELAYEN_R {
599 CONVSTARTDELAYEN_R::new(((self.bits >> 27) & 1) != 0)
600 }
601 #[doc = "Bits 29:31 - REPDELAY Select for SCAN REP Mode"]
602 #[inline(always)]
603 pub fn repdelay(&self) -> REPDELAY_R {
604 REPDELAY_R::new(((self.bits >> 29) & 7) as u8)
605 }
606}
607impl W {
608 #[doc = "Bits 0:2 - Scan Channel Reference Selection"]
609 #[inline(always)]
610 pub fn vrefsel(&mut self) -> VREFSEL_W {
611 VREFSEL_W::new(self)
612 }
613 #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
614 #[inline(always)]
615 pub fn vrefattfix(&mut self) -> VREFATTFIX_W {
616 VREFATTFIX_W::new(self)
617 }
618 #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
619 #[inline(always)]
620 pub fn vrefatt(&mut self) -> VREFATT_W {
621 VREFATT_W::new(self)
622 }
623 #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
624 #[inline(always)]
625 pub fn vinatt(&mut self) -> VINATT_W {
626 VINATT_W::new(self)
627 }
628 #[doc = "Bits 12:13 - Scan DV Level Select"]
629 #[inline(always)]
630 pub fn dvl(&mut self) -> DVL_W {
631 DVL_W::new(self)
632 }
633 #[doc = "Bit 14 - Scan FIFO Overflow Action"]
634 #[inline(always)]
635 pub fn fifoofact(&mut self) -> FIFOOFACT_W {
636 FIFOOFACT_W::new(self)
637 }
638 #[doc = "Bit 16 - Scan PRS Trigger Mode"]
639 #[inline(always)]
640 pub fn prsmode(&mut self) -> PRSMODE_W {
641 PRSMODE_W::new(self)
642 }
643 #[doc = "Bits 17:20 - Scan Sequence PRS Trigger Select"]
644 #[inline(always)]
645 pub fn prssel(&mut self) -> PRSSEL_W {
646 PRSSEL_W::new(self)
647 }
648 #[doc = "Bits 22:26 - Delay Next Conversion Start If CONVSTARTDELAYEN is Set"]
649 #[inline(always)]
650 pub fn convstartdelay(&mut self) -> CONVSTARTDELAY_W {
651 CONVSTARTDELAY_W::new(self)
652 }
653 #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
654 #[inline(always)]
655 pub fn convstartdelayen(&mut self) -> CONVSTARTDELAYEN_W {
656 CONVSTARTDELAYEN_W::new(self)
657 }
658 #[doc = "Bits 29:31 - REPDELAY Select for SCAN REP Mode"]
659 #[inline(always)]
660 pub fn repdelay(&mut self) -> REPDELAY_W {
661 REPDELAY_W::new(self)
662 }
663 #[doc = "Writes raw bits to the register."]
664 #[inline(always)]
665 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
666 self.0.bits(bits);
667 self
668 }
669}
670#[doc = "Scan Control Register Continued\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scanctrlx](index.html) module"]
671pub struct SCANCTRLX_SPEC;
672impl crate::RegisterSpec for SCANCTRLX_SPEC {
673 type Ux = u32;
674}
675#[doc = "`read()` method returns [scanctrlx::R](R) reader structure"]
676impl crate::Readable for SCANCTRLX_SPEC {
677 type Reader = R;
678}
679#[doc = "`write(|w| ..)` method takes [scanctrlx::W](W) writer structure"]
680impl crate::Writable for SCANCTRLX_SPEC {
681 type Writer = W;
682}
683#[doc = "`reset()` method sets SCANCTRLX to value 0"]
684impl crate::Resettable for SCANCTRLX_SPEC {
685 #[inline(always)]
686 fn reset_value() -> Self::Ux {
687 0
688 }
689}