efm32gg12b130_pac/wtimer0/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `RUNNING` reader - Running"]
17pub type RUNNING_R = crate::BitReader<bool>;
18#[doc = "Field `DIR` reader - Direction"]
19pub type DIR_R = crate::BitReader<bool>;
20#[doc = "Field `TOPBV` reader - TOPB Valid"]
21pub type TOPBV_R = crate::BitReader<bool>;
22#[doc = "Field `CCVBV0` reader - CC0 CCVB Valid"]
23pub type CCVBV0_R = crate::BitReader<bool>;
24#[doc = "Field `CCVBV1` reader - CC1 CCVB Valid"]
25pub type CCVBV1_R = crate::BitReader<bool>;
26#[doc = "Field `CCVBV2` reader - CC2 CCVB Valid"]
27pub type CCVBV2_R = crate::BitReader<bool>;
28#[doc = "Field `CCVBV3` reader - CC3 CCVB Valid"]
29pub type CCVBV3_R = crate::BitReader<bool>;
30#[doc = "Field `ICV0` reader - CC0 Input Capture Valid"]
31pub type ICV0_R = crate::BitReader<bool>;
32#[doc = "Field `ICV1` reader - CC1 Input Capture Valid"]
33pub type ICV1_R = crate::BitReader<bool>;
34#[doc = "Field `ICV2` reader - CC2 Input Capture Valid"]
35pub type ICV2_R = crate::BitReader<bool>;
36#[doc = "Field `ICV3` reader - CC3 Input Capture Valid"]
37pub type ICV3_R = crate::BitReader<bool>;
38#[doc = "Field `CCPOL0` reader - CC0 Polarity"]
39pub type CCPOL0_R = crate::BitReader<bool>;
40#[doc = "Field `CCPOL1` reader - CC1 Polarity"]
41pub type CCPOL1_R = crate::BitReader<bool>;
42#[doc = "Field `CCPOL2` reader - CC2 Polarity"]
43pub type CCPOL2_R = crate::BitReader<bool>;
44#[doc = "Field `CCPOL3` reader - CC3 Polarity"]
45pub type CCPOL3_R = crate::BitReader<bool>;
46impl R {
47    #[doc = "Bit 0 - Running"]
48    #[inline(always)]
49    pub fn running(&self) -> RUNNING_R {
50        RUNNING_R::new((self.bits & 1) != 0)
51    }
52    #[doc = "Bit 1 - Direction"]
53    #[inline(always)]
54    pub fn dir(&self) -> DIR_R {
55        DIR_R::new(((self.bits >> 1) & 1) != 0)
56    }
57    #[doc = "Bit 2 - TOPB Valid"]
58    #[inline(always)]
59    pub fn topbv(&self) -> TOPBV_R {
60        TOPBV_R::new(((self.bits >> 2) & 1) != 0)
61    }
62    #[doc = "Bit 8 - CC0 CCVB Valid"]
63    #[inline(always)]
64    pub fn ccvbv0(&self) -> CCVBV0_R {
65        CCVBV0_R::new(((self.bits >> 8) & 1) != 0)
66    }
67    #[doc = "Bit 9 - CC1 CCVB Valid"]
68    #[inline(always)]
69    pub fn ccvbv1(&self) -> CCVBV1_R {
70        CCVBV1_R::new(((self.bits >> 9) & 1) != 0)
71    }
72    #[doc = "Bit 10 - CC2 CCVB Valid"]
73    #[inline(always)]
74    pub fn ccvbv2(&self) -> CCVBV2_R {
75        CCVBV2_R::new(((self.bits >> 10) & 1) != 0)
76    }
77    #[doc = "Bit 11 - CC3 CCVB Valid"]
78    #[inline(always)]
79    pub fn ccvbv3(&self) -> CCVBV3_R {
80        CCVBV3_R::new(((self.bits >> 11) & 1) != 0)
81    }
82    #[doc = "Bit 16 - CC0 Input Capture Valid"]
83    #[inline(always)]
84    pub fn icv0(&self) -> ICV0_R {
85        ICV0_R::new(((self.bits >> 16) & 1) != 0)
86    }
87    #[doc = "Bit 17 - CC1 Input Capture Valid"]
88    #[inline(always)]
89    pub fn icv1(&self) -> ICV1_R {
90        ICV1_R::new(((self.bits >> 17) & 1) != 0)
91    }
92    #[doc = "Bit 18 - CC2 Input Capture Valid"]
93    #[inline(always)]
94    pub fn icv2(&self) -> ICV2_R {
95        ICV2_R::new(((self.bits >> 18) & 1) != 0)
96    }
97    #[doc = "Bit 19 - CC3 Input Capture Valid"]
98    #[inline(always)]
99    pub fn icv3(&self) -> ICV3_R {
100        ICV3_R::new(((self.bits >> 19) & 1) != 0)
101    }
102    #[doc = "Bit 24 - CC0 Polarity"]
103    #[inline(always)]
104    pub fn ccpol0(&self) -> CCPOL0_R {
105        CCPOL0_R::new(((self.bits >> 24) & 1) != 0)
106    }
107    #[doc = "Bit 25 - CC1 Polarity"]
108    #[inline(always)]
109    pub fn ccpol1(&self) -> CCPOL1_R {
110        CCPOL1_R::new(((self.bits >> 25) & 1) != 0)
111    }
112    #[doc = "Bit 26 - CC2 Polarity"]
113    #[inline(always)]
114    pub fn ccpol2(&self) -> CCPOL2_R {
115        CCPOL2_R::new(((self.bits >> 26) & 1) != 0)
116    }
117    #[doc = "Bit 27 - CC3 Polarity"]
118    #[inline(always)]
119    pub fn ccpol3(&self) -> CCPOL3_R {
120        CCPOL3_R::new(((self.bits >> 27) & 1) != 0)
121    }
122}
123#[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
124pub struct STATUS_SPEC;
125impl crate::RegisterSpec for STATUS_SPEC {
126    type Ux = u32;
127}
128#[doc = "`read()` method returns [status::R](R) reader structure"]
129impl crate::Readable for STATUS_SPEC {
130    type Reader = R;
131}
132#[doc = "`reset()` method sets STATUS to value 0"]
133impl crate::Resettable for STATUS_SPEC {
134    #[inline(always)]
135    fn reset_value() -> Self::Ux {
136        0
137    }
138}
efm32gg12b130_pac/wtimer0/status.rs

efm32gg12b130_pac/wtimer0/
status.rs
