efm32gg12b_pac/efm32gg12b110/leuart0/
ifs.rs1#[doc = "Register `IFS` writer"]
2pub struct W(crate::W<IFS_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<IFS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<IFS_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<IFS_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `TXC` writer - Set TXC Interrupt Flag"]
23pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
24#[doc = "Field `RXOF` writer - Set RXOF Interrupt Flag"]
25pub type RXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
26#[doc = "Field `RXUF` writer - Set RXUF Interrupt Flag"]
27pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
28#[doc = "Field `TXOF` writer - Set TXOF Interrupt Flag"]
29pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
30#[doc = "Field `PERR` writer - Set PERR Interrupt Flag"]
31pub type PERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
32#[doc = "Field `FERR` writer - Set FERR Interrupt Flag"]
33pub type FERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
34#[doc = "Field `MPAF` writer - Set MPAF Interrupt Flag"]
35pub type MPAF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
36#[doc = "Field `STARTF` writer - Set STARTF Interrupt Flag"]
37pub type STARTF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
38#[doc = "Field `SIGF` writer - Set SIGF Interrupt Flag"]
39pub type SIGF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFS_SPEC, bool, O>;
40impl W {
41 #[doc = "Bit 0 - Set TXC Interrupt Flag"]
42 #[inline(always)]
43 #[must_use]
44 pub fn txc(&mut self) -> TXC_W<0> {
45 TXC_W::new(self)
46 }
47 #[doc = "Bit 3 - Set RXOF Interrupt Flag"]
48 #[inline(always)]
49 #[must_use]
50 pub fn rxof(&mut self) -> RXOF_W<3> {
51 RXOF_W::new(self)
52 }
53 #[doc = "Bit 4 - Set RXUF Interrupt Flag"]
54 #[inline(always)]
55 #[must_use]
56 pub fn rxuf(&mut self) -> RXUF_W<4> {
57 RXUF_W::new(self)
58 }
59 #[doc = "Bit 5 - Set TXOF Interrupt Flag"]
60 #[inline(always)]
61 #[must_use]
62 pub fn txof(&mut self) -> TXOF_W<5> {
63 TXOF_W::new(self)
64 }
65 #[doc = "Bit 6 - Set PERR Interrupt Flag"]
66 #[inline(always)]
67 #[must_use]
68 pub fn perr(&mut self) -> PERR_W<6> {
69 PERR_W::new(self)
70 }
71 #[doc = "Bit 7 - Set FERR Interrupt Flag"]
72 #[inline(always)]
73 #[must_use]
74 pub fn ferr(&mut self) -> FERR_W<7> {
75 FERR_W::new(self)
76 }
77 #[doc = "Bit 8 - Set MPAF Interrupt Flag"]
78 #[inline(always)]
79 #[must_use]
80 pub fn mpaf(&mut self) -> MPAF_W<8> {
81 MPAF_W::new(self)
82 }
83 #[doc = "Bit 9 - Set STARTF Interrupt Flag"]
84 #[inline(always)]
85 #[must_use]
86 pub fn startf(&mut self) -> STARTF_W<9> {
87 STARTF_W::new(self)
88 }
89 #[doc = "Bit 10 - Set SIGF Interrupt Flag"]
90 #[inline(always)]
91 #[must_use]
92 pub fn sigf(&mut self) -> SIGF_W<10> {
93 SIGF_W::new(self)
94 }
95 #[doc = "Writes raw bits to the register."]
96 #[inline(always)]
97 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
98 self.0.bits(bits);
99 self
100 }
101}
102#[doc = "Interrupt Flag Set Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifs](index.html) module"]
103pub struct IFS_SPEC;
104impl crate::RegisterSpec for IFS_SPEC {
105 type Ux = u32;
106}
107#[doc = "`write(|w| ..)` method takes [ifs::W](W) writer structure"]
108impl crate::Writable for IFS_SPEC {
109 type Writer = W;
110 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
111 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
112}
113#[doc = "`reset()` method sets IFS to value 0"]
114impl crate::Resettable for IFS_SPEC {
115 const RESET_VALUE: Self::Ux = 0;
116}