efm32gg12b_pac/efm32gg12b830/wdog0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - Watchdog Timer Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Watchdog Timer Enable"]
40pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
41#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"]
42pub type DEBUGRUN_R = crate::BitReader<bool>;
43#[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"]
44pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
45#[doc = "Field `EM2RUN` reader - Energy Mode 2 Run Enable"]
46pub type EM2RUN_R = crate::BitReader<bool>;
47#[doc = "Field `EM2RUN` writer - Energy Mode 2 Run Enable"]
48pub type EM2RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
49#[doc = "Field `EM3RUN` reader - Energy Mode 3 Run Enable"]
50pub type EM3RUN_R = crate::BitReader<bool>;
51#[doc = "Field `EM3RUN` writer - Energy Mode 3 Run Enable"]
52pub type EM3RUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
53#[doc = "Field `LOCK` reader - Configuration Lock"]
54pub type LOCK_R = crate::BitReader<bool>;
55#[doc = "Field `LOCK` writer - Configuration Lock"]
56pub type LOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
57#[doc = "Field `EM4BLOCK` reader - Energy Mode 4 Block"]
58pub type EM4BLOCK_R = crate::BitReader<bool>;
59#[doc = "Field `EM4BLOCK` writer - Energy Mode 4 Block"]
60pub type EM4BLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
61#[doc = "Field `SWOSCBLOCK` reader - Software Oscillator Disable Block"]
62pub type SWOSCBLOCK_R = crate::BitReader<bool>;
63#[doc = "Field `SWOSCBLOCK` writer - Software Oscillator Disable Block"]
64pub type SWOSCBLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
65#[doc = "Field `PERSEL` reader - Watchdog Timeout Period Select"]
66pub type PERSEL_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `PERSEL` writer - Watchdog Timeout Period Select"]
68pub type PERSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 4, O>;
69#[doc = "Field `CLKSEL` reader - Watchdog Clock Select"]
70pub type CLKSEL_R = crate::FieldReader<u8, CLKSEL_A>;
71#[doc = "Watchdog Clock Select\n\nValue on reset: 0"]
72#[derive(Clone, Copy, Debug, PartialEq, Eq)]
73#[repr(u8)]
74pub enum CLKSEL_A {
75    #[doc = "0: ULFRCO"]
76    ULFRCO = 0,
77    #[doc = "1: LFRCO"]
78    LFRCO = 1,
79    #[doc = "2: LFXO"]
80    LFXO = 2,
81    #[doc = "3: HFCORECLK"]
82    HFCORECLK = 3,
83}
84impl From<CLKSEL_A> for u8 {
85    #[inline(always)]
86    fn from(variant: CLKSEL_A) -> Self {
87        variant as _
88    }
89}
90impl CLKSEL_R {
91    #[doc = "Get enumerated values variant"]
92    #[inline(always)]
93    pub fn variant(&self) -> CLKSEL_A {
94        match self.bits {
95            0 => CLKSEL_A::ULFRCO,
96            1 => CLKSEL_A::LFRCO,
97            2 => CLKSEL_A::LFXO,
98            3 => CLKSEL_A::HFCORECLK,
99            _ => unreachable!(),
100        }
101    }
102    #[doc = "Checks if the value of the field is `ULFRCO`"]
103    #[inline(always)]
104    pub fn is_ulfrco(&self) -> bool {
105        *self == CLKSEL_A::ULFRCO
106    }
107    #[doc = "Checks if the value of the field is `LFRCO`"]
108    #[inline(always)]
109    pub fn is_lfrco(&self) -> bool {
110        *self == CLKSEL_A::LFRCO
111    }
112    #[doc = "Checks if the value of the field is `LFXO`"]
113    #[inline(always)]
114    pub fn is_lfxo(&self) -> bool {
115        *self == CLKSEL_A::LFXO
116    }
117    #[doc = "Checks if the value of the field is `HFCORECLK`"]
118    #[inline(always)]
119    pub fn is_hfcoreclk(&self) -> bool {
120        *self == CLKSEL_A::HFCORECLK
121    }
122}
123#[doc = "Field `CLKSEL` writer - Watchdog Clock Select"]
124pub type CLKSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, CLKSEL_A, 2, O>;
125impl<'a, const O: u8> CLKSEL_W<'a, O> {
126    #[doc = "ULFRCO"]
127    #[inline(always)]
128    pub fn ulfrco(self) -> &'a mut W {
129        self.variant(CLKSEL_A::ULFRCO)
130    }
131    #[doc = "LFRCO"]
132    #[inline(always)]
133    pub fn lfrco(self) -> &'a mut W {
134        self.variant(CLKSEL_A::LFRCO)
135    }
136    #[doc = "LFXO"]
137    #[inline(always)]
138    pub fn lfxo(self) -> &'a mut W {
139        self.variant(CLKSEL_A::LFXO)
140    }
141    #[doc = "HFCORECLK"]
142    #[inline(always)]
143    pub fn hfcoreclk(self) -> &'a mut W {
144        self.variant(CLKSEL_A::HFCORECLK)
145    }
146}
147#[doc = "Field `WARNSEL` reader - Watchdog Timeout Period Select"]
148pub type WARNSEL_R = crate::FieldReader<u8, u8>;
149#[doc = "Field `WARNSEL` writer - Watchdog Timeout Period Select"]
150pub type WARNSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 2, O>;
151#[doc = "Field `WINSEL` reader - Watchdog Illegal Window Select"]
152pub type WINSEL_R = crate::FieldReader<u8, u8>;
153#[doc = "Field `WINSEL` writer - Watchdog Illegal Window Select"]
154pub type WINSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 3, O>;
155#[doc = "Field `CLRSRC` reader - Watchdog Clear Source"]
156pub type CLRSRC_R = crate::BitReader<bool>;
157#[doc = "Field `CLRSRC` writer - Watchdog Clear Source"]
158pub type CLRSRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
159#[doc = "Field `WDOGRSTDIS` reader - Watchdog Reset Disable"]
160pub type WDOGRSTDIS_R = crate::BitReader<bool>;
161#[doc = "Field `WDOGRSTDIS` writer - Watchdog Reset Disable"]
162pub type WDOGRSTDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
163impl R {
164    #[doc = "Bit 0 - Watchdog Timer Enable"]
165    #[inline(always)]
166    pub fn en(&self) -> EN_R {
167        EN_R::new((self.bits & 1) != 0)
168    }
169    #[doc = "Bit 1 - Debug Mode Run Enable"]
170    #[inline(always)]
171    pub fn debugrun(&self) -> DEBUGRUN_R {
172        DEBUGRUN_R::new(((self.bits >> 1) & 1) != 0)
173    }
174    #[doc = "Bit 2 - Energy Mode 2 Run Enable"]
175    #[inline(always)]
176    pub fn em2run(&self) -> EM2RUN_R {
177        EM2RUN_R::new(((self.bits >> 2) & 1) != 0)
178    }
179    #[doc = "Bit 3 - Energy Mode 3 Run Enable"]
180    #[inline(always)]
181    pub fn em3run(&self) -> EM3RUN_R {
182        EM3RUN_R::new(((self.bits >> 3) & 1) != 0)
183    }
184    #[doc = "Bit 4 - Configuration Lock"]
185    #[inline(always)]
186    pub fn lock(&self) -> LOCK_R {
187        LOCK_R::new(((self.bits >> 4) & 1) != 0)
188    }
189    #[doc = "Bit 5 - Energy Mode 4 Block"]
190    #[inline(always)]
191    pub fn em4block(&self) -> EM4BLOCK_R {
192        EM4BLOCK_R::new(((self.bits >> 5) & 1) != 0)
193    }
194    #[doc = "Bit 6 - Software Oscillator Disable Block"]
195    #[inline(always)]
196    pub fn swoscblock(&self) -> SWOSCBLOCK_R {
197        SWOSCBLOCK_R::new(((self.bits >> 6) & 1) != 0)
198    }
199    #[doc = "Bits 8:11 - Watchdog Timeout Period Select"]
200    #[inline(always)]
201    pub fn persel(&self) -> PERSEL_R {
202        PERSEL_R::new(((self.bits >> 8) & 0x0f) as u8)
203    }
204    #[doc = "Bits 12:13 - Watchdog Clock Select"]
205    #[inline(always)]
206    pub fn clksel(&self) -> CLKSEL_R {
207        CLKSEL_R::new(((self.bits >> 12) & 3) as u8)
208    }
209    #[doc = "Bits 16:17 - Watchdog Timeout Period Select"]
210    #[inline(always)]
211    pub fn warnsel(&self) -> WARNSEL_R {
212        WARNSEL_R::new(((self.bits >> 16) & 3) as u8)
213    }
214    #[doc = "Bits 24:26 - Watchdog Illegal Window Select"]
215    #[inline(always)]
216    pub fn winsel(&self) -> WINSEL_R {
217        WINSEL_R::new(((self.bits >> 24) & 7) as u8)
218    }
219    #[doc = "Bit 30 - Watchdog Clear Source"]
220    #[inline(always)]
221    pub fn clrsrc(&self) -> CLRSRC_R {
222        CLRSRC_R::new(((self.bits >> 30) & 1) != 0)
223    }
224    #[doc = "Bit 31 - Watchdog Reset Disable"]
225    #[inline(always)]
226    pub fn wdogrstdis(&self) -> WDOGRSTDIS_R {
227        WDOGRSTDIS_R::new(((self.bits >> 31) & 1) != 0)
228    }
229}
230impl W {
231    #[doc = "Bit 0 - Watchdog Timer Enable"]
232    #[inline(always)]
233    #[must_use]
234    pub fn en(&mut self) -> EN_W<0> {
235        EN_W::new(self)
236    }
237    #[doc = "Bit 1 - Debug Mode Run Enable"]
238    #[inline(always)]
239    #[must_use]
240    pub fn debugrun(&mut self) -> DEBUGRUN_W<1> {
241        DEBUGRUN_W::new(self)
242    }
243    #[doc = "Bit 2 - Energy Mode 2 Run Enable"]
244    #[inline(always)]
245    #[must_use]
246    pub fn em2run(&mut self) -> EM2RUN_W<2> {
247        EM2RUN_W::new(self)
248    }
249    #[doc = "Bit 3 - Energy Mode 3 Run Enable"]
250    #[inline(always)]
251    #[must_use]
252    pub fn em3run(&mut self) -> EM3RUN_W<3> {
253        EM3RUN_W::new(self)
254    }
255    #[doc = "Bit 4 - Configuration Lock"]
256    #[inline(always)]
257    #[must_use]
258    pub fn lock(&mut self) -> LOCK_W<4> {
259        LOCK_W::new(self)
260    }
261    #[doc = "Bit 5 - Energy Mode 4 Block"]
262    #[inline(always)]
263    #[must_use]
264    pub fn em4block(&mut self) -> EM4BLOCK_W<5> {
265        EM4BLOCK_W::new(self)
266    }
267    #[doc = "Bit 6 - Software Oscillator Disable Block"]
268    #[inline(always)]
269    #[must_use]
270    pub fn swoscblock(&mut self) -> SWOSCBLOCK_W<6> {
271        SWOSCBLOCK_W::new(self)
272    }
273    #[doc = "Bits 8:11 - Watchdog Timeout Period Select"]
274    #[inline(always)]
275    #[must_use]
276    pub fn persel(&mut self) -> PERSEL_W<8> {
277        PERSEL_W::new(self)
278    }
279    #[doc = "Bits 12:13 - Watchdog Clock Select"]
280    #[inline(always)]
281    #[must_use]
282    pub fn clksel(&mut self) -> CLKSEL_W<12> {
283        CLKSEL_W::new(self)
284    }
285    #[doc = "Bits 16:17 - Watchdog Timeout Period Select"]
286    #[inline(always)]
287    #[must_use]
288    pub fn warnsel(&mut self) -> WARNSEL_W<16> {
289        WARNSEL_W::new(self)
290    }
291    #[doc = "Bits 24:26 - Watchdog Illegal Window Select"]
292    #[inline(always)]
293    #[must_use]
294    pub fn winsel(&mut self) -> WINSEL_W<24> {
295        WINSEL_W::new(self)
296    }
297    #[doc = "Bit 30 - Watchdog Clear Source"]
298    #[inline(always)]
299    #[must_use]
300    pub fn clrsrc(&mut self) -> CLRSRC_W<30> {
301        CLRSRC_W::new(self)
302    }
303    #[doc = "Bit 31 - Watchdog Reset Disable"]
304    #[inline(always)]
305    #[must_use]
306    pub fn wdogrstdis(&mut self) -> WDOGRSTDIS_W<31> {
307        WDOGRSTDIS_W::new(self)
308    }
309    #[doc = "Writes raw bits to the register."]
310    #[inline(always)]
311    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
312        self.0.bits(bits);
313        self
314    }
315}
316#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
317pub struct CTRL_SPEC;
318impl crate::RegisterSpec for CTRL_SPEC {
319    type Ux = u32;
320}
321#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
322impl crate::Readable for CTRL_SPEC {
323    type Reader = R;
324}
325#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
326impl crate::Writable for CTRL_SPEC {
327    type Writer = W;
328    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
329    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
330}
331#[doc = "`reset()` method sets CTRL to value 0x0f00"]
332impl crate::Resettable for CTRL_SPEC {
333    const RESET_VALUE: Self::Ux = 0x0f00;
334}
efm32gg12b_pac/efm32gg12b830/wdog0/ctrl.rs

efm32gg12b_pac/efm32gg12b830/wdog0/
ctrl.rs
