efm32gg11b840_pac/sdio/
cfg0.rs

1#[doc = "Register `CFG0` reader"]
2pub struct R(crate::R<CFG0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CFG0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CFG0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CFG0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CFG0` writer"]
17pub struct W(crate::W<CFG0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CFG0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CFG0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CFG0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TUNINGCNT` reader - Tuning Counter Value"]
38pub type TUNINGCNT_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `TUNINGCNT` writer - Tuning Counter Value"]
40pub type TUNINGCNT_W<'a> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, u8, 6, 0>;
41#[doc = "Field `TOUTCLKFREQ` reader - Timeout Clock Frequency"]
42pub type TOUTCLKFREQ_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `TOUTCLKFREQ` writer - Timeout Clock Frequency"]
44pub type TOUTCLKFREQ_W<'a> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, u8, 6, 6>;
45#[doc = "Field `TOUTCLKUNIT` reader - Timeout Clock Unit in kHz or MHz"]
46pub type TOUTCLKUNIT_R = crate::BitReader<bool>;
47#[doc = "Field `TOUTCLKUNIT` writer - Timeout Clock Unit in kHz or MHz"]
48pub type TOUTCLKUNIT_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 12>;
49#[doc = "Field `BASECLKFREQ` reader - Base Clock Frequency for SD_CLK"]
50pub type BASECLKFREQ_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `BASECLKFREQ` writer - Base Clock Frequency for SD_CLK"]
52pub type BASECLKFREQ_W<'a> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, u8, 8, 13>;
53#[doc = "MAX Block Length of Transfer\n\nValue on reset: 0"]
54#[derive(Clone, Copy, Debug, PartialEq)]
55#[repr(u8)]
56pub enum MAXBLKLEN_A {
57    #[doc = "0: 512 Bytes are Selected"]
58    _512B = 0,
59    #[doc = "1: 1024 Bytes are Selected"]
60    _1024B = 1,
61    #[doc = "2: 2048 Bytes are Selected"]
62    _2048B = 2,
63}
64impl From<MAXBLKLEN_A> for u8 {
65    #[inline(always)]
66    fn from(variant: MAXBLKLEN_A) -> Self {
67        variant as _
68    }
69}
70#[doc = "Field `MAXBLKLEN` reader - MAX Block Length of Transfer"]
71pub type MAXBLKLEN_R = crate::FieldReader<u8, MAXBLKLEN_A>;
72impl MAXBLKLEN_R {
73    #[doc = "Get enumerated values variant"]
74    #[inline(always)]
75    pub fn variant(&self) -> Option<MAXBLKLEN_A> {
76        match self.bits {
77            0 => Some(MAXBLKLEN_A::_512B),
78            1 => Some(MAXBLKLEN_A::_1024B),
79            2 => Some(MAXBLKLEN_A::_2048B),
80            _ => None,
81        }
82    }
83    #[doc = "Checks if the value of the field is `_512B`"]
84    #[inline(always)]
85    pub fn is_512b(&self) -> bool {
86        *self == MAXBLKLEN_A::_512B
87    }
88    #[doc = "Checks if the value of the field is `_1024B`"]
89    #[inline(always)]
90    pub fn is_1024b(&self) -> bool {
91        *self == MAXBLKLEN_A::_1024B
92    }
93    #[doc = "Checks if the value of the field is `_2048B`"]
94    #[inline(always)]
95    pub fn is_2048b(&self) -> bool {
96        *self == MAXBLKLEN_A::_2048B
97    }
98}
99#[doc = "Field `MAXBLKLEN` writer - MAX Block Length of Transfer"]
100pub type MAXBLKLEN_W<'a> = crate::FieldWriter<'a, u32, CFG0_SPEC, u8, MAXBLKLEN_A, 2, 21>;
101impl<'a> MAXBLKLEN_W<'a> {
102    #[doc = "512 Bytes are Selected"]
103    #[inline(always)]
104    pub fn _512b(self) -> &'a mut W {
105        self.variant(MAXBLKLEN_A::_512B)
106    }
107    #[doc = "1024 Bytes are Selected"]
108    #[inline(always)]
109    pub fn _1024b(self) -> &'a mut W {
110        self.variant(MAXBLKLEN_A::_1024B)
111    }
112    #[doc = "2048 Bytes are Selected"]
113    #[inline(always)]
114    pub fn _2048b(self) -> &'a mut W {
115        self.variant(MAXBLKLEN_A::_2048B)
116    }
117}
118#[doc = "Field `C8BITSUP` reader - 8-bit Interface Support"]
119pub type C8BITSUP_R = crate::BitReader<bool>;
120#[doc = "Field `C8BITSUP` writer - 8-bit Interface Support"]
121pub type C8BITSUP_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 23>;
122#[doc = "Field `CADMA2SUP` reader - ADMA2 Mode Support"]
123pub type CADMA2SUP_R = crate::BitReader<bool>;
124#[doc = "Field `CADMA2SUP` writer - ADMA2 Mode Support"]
125pub type CADMA2SUP_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 24>;
126#[doc = "Field `CHSSUP` reader - High Speed Mode Support"]
127pub type CHSSUP_R = crate::BitReader<bool>;
128#[doc = "Field `CHSSUP` writer - High Speed Mode Support"]
129pub type CHSSUP_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 25>;
130#[doc = "Field `CSDMASUP` reader - SDMA Mode Support"]
131pub type CSDMASUP_R = crate::BitReader<bool>;
132#[doc = "Field `CSDMASUP` writer - SDMA Mode Support"]
133pub type CSDMASUP_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 26>;
134#[doc = "Field `CSUSPRESSUP` reader - Suspend/Resume Support"]
135pub type CSUSPRESSUP_R = crate::BitReader<bool>;
136#[doc = "Field `CSUSPRESSUP` writer - Suspend/Resume Support"]
137pub type CSUSPRESSUP_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 27>;
138#[doc = "Field `C3P3VSUP` reader - Core 3P3V Support"]
139pub type C3P3VSUP_R = crate::BitReader<bool>;
140#[doc = "Field `C3P3VSUP` writer - Core 3P3V Support"]
141pub type C3P3VSUP_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 28>;
142#[doc = "Field `C3P0VSUP` reader - 3P0V Support"]
143pub type C3P0VSUP_R = crate::BitReader<bool>;
144#[doc = "Field `C3P0VSUP` writer - 3P0V Support"]
145pub type C3P0VSUP_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 29>;
146#[doc = "Field `C1P8VSUP` reader - 1P8V Support"]
147pub type C1P8VSUP_R = crate::BitReader<bool>;
148#[doc = "Field `C1P8VSUP` writer - 1P8V Support"]
149pub type C1P8VSUP_W<'a> = crate::BitWriter<'a, u32, CFG0_SPEC, bool, 30>;
150impl R {
151    #[doc = "Bits 0:5 - Tuning Counter Value"]
152    #[inline(always)]
153    pub fn tuningcnt(&self) -> TUNINGCNT_R {
154        TUNINGCNT_R::new((self.bits & 0x3f) as u8)
155    }
156    #[doc = "Bits 6:11 - Timeout Clock Frequency"]
157    #[inline(always)]
158    pub fn toutclkfreq(&self) -> TOUTCLKFREQ_R {
159        TOUTCLKFREQ_R::new(((self.bits >> 6) & 0x3f) as u8)
160    }
161    #[doc = "Bit 12 - Timeout Clock Unit in kHz or MHz"]
162    #[inline(always)]
163    pub fn toutclkunit(&self) -> TOUTCLKUNIT_R {
164        TOUTCLKUNIT_R::new(((self.bits >> 12) & 1) != 0)
165    }
166    #[doc = "Bits 13:20 - Base Clock Frequency for SD_CLK"]
167    #[inline(always)]
168    pub fn baseclkfreq(&self) -> BASECLKFREQ_R {
169        BASECLKFREQ_R::new(((self.bits >> 13) & 0xff) as u8)
170    }
171    #[doc = "Bits 21:22 - MAX Block Length of Transfer"]
172    #[inline(always)]
173    pub fn maxblklen(&self) -> MAXBLKLEN_R {
174        MAXBLKLEN_R::new(((self.bits >> 21) & 3) as u8)
175    }
176    #[doc = "Bit 23 - 8-bit Interface Support"]
177    #[inline(always)]
178    pub fn c8bitsup(&self) -> C8BITSUP_R {
179        C8BITSUP_R::new(((self.bits >> 23) & 1) != 0)
180    }
181    #[doc = "Bit 24 - ADMA2 Mode Support"]
182    #[inline(always)]
183    pub fn cadma2sup(&self) -> CADMA2SUP_R {
184        CADMA2SUP_R::new(((self.bits >> 24) & 1) != 0)
185    }
186    #[doc = "Bit 25 - High Speed Mode Support"]
187    #[inline(always)]
188    pub fn chssup(&self) -> CHSSUP_R {
189        CHSSUP_R::new(((self.bits >> 25) & 1) != 0)
190    }
191    #[doc = "Bit 26 - SDMA Mode Support"]
192    #[inline(always)]
193    pub fn csdmasup(&self) -> CSDMASUP_R {
194        CSDMASUP_R::new(((self.bits >> 26) & 1) != 0)
195    }
196    #[doc = "Bit 27 - Suspend/Resume Support"]
197    #[inline(always)]
198    pub fn csuspressup(&self) -> CSUSPRESSUP_R {
199        CSUSPRESSUP_R::new(((self.bits >> 27) & 1) != 0)
200    }
201    #[doc = "Bit 28 - Core 3P3V Support"]
202    #[inline(always)]
203    pub fn c3p3vsup(&self) -> C3P3VSUP_R {
204        C3P3VSUP_R::new(((self.bits >> 28) & 1) != 0)
205    }
206    #[doc = "Bit 29 - 3P0V Support"]
207    #[inline(always)]
208    pub fn c3p0vsup(&self) -> C3P0VSUP_R {
209        C3P0VSUP_R::new(((self.bits >> 29) & 1) != 0)
210    }
211    #[doc = "Bit 30 - 1P8V Support"]
212    #[inline(always)]
213    pub fn c1p8vsup(&self) -> C1P8VSUP_R {
214        C1P8VSUP_R::new(((self.bits >> 30) & 1) != 0)
215    }
216}
217impl W {
218    #[doc = "Bits 0:5 - Tuning Counter Value"]
219    #[inline(always)]
220    pub fn tuningcnt(&mut self) -> TUNINGCNT_W {
221        TUNINGCNT_W::new(self)
222    }
223    #[doc = "Bits 6:11 - Timeout Clock Frequency"]
224    #[inline(always)]
225    pub fn toutclkfreq(&mut self) -> TOUTCLKFREQ_W {
226        TOUTCLKFREQ_W::new(self)
227    }
228    #[doc = "Bit 12 - Timeout Clock Unit in kHz or MHz"]
229    #[inline(always)]
230    pub fn toutclkunit(&mut self) -> TOUTCLKUNIT_W {
231        TOUTCLKUNIT_W::new(self)
232    }
233    #[doc = "Bits 13:20 - Base Clock Frequency for SD_CLK"]
234    #[inline(always)]
235    pub fn baseclkfreq(&mut self) -> BASECLKFREQ_W {
236        BASECLKFREQ_W::new(self)
237    }
238    #[doc = "Bits 21:22 - MAX Block Length of Transfer"]
239    #[inline(always)]
240    pub fn maxblklen(&mut self) -> MAXBLKLEN_W {
241        MAXBLKLEN_W::new(self)
242    }
243    #[doc = "Bit 23 - 8-bit Interface Support"]
244    #[inline(always)]
245    pub fn c8bitsup(&mut self) -> C8BITSUP_W {
246        C8BITSUP_W::new(self)
247    }
248    #[doc = "Bit 24 - ADMA2 Mode Support"]
249    #[inline(always)]
250    pub fn cadma2sup(&mut self) -> CADMA2SUP_W {
251        CADMA2SUP_W::new(self)
252    }
253    #[doc = "Bit 25 - High Speed Mode Support"]
254    #[inline(always)]
255    pub fn chssup(&mut self) -> CHSSUP_W {
256        CHSSUP_W::new(self)
257    }
258    #[doc = "Bit 26 - SDMA Mode Support"]
259    #[inline(always)]
260    pub fn csdmasup(&mut self) -> CSDMASUP_W {
261        CSDMASUP_W::new(self)
262    }
263    #[doc = "Bit 27 - Suspend/Resume Support"]
264    #[inline(always)]
265    pub fn csuspressup(&mut self) -> CSUSPRESSUP_W {
266        CSUSPRESSUP_W::new(self)
267    }
268    #[doc = "Bit 28 - Core 3P3V Support"]
269    #[inline(always)]
270    pub fn c3p3vsup(&mut self) -> C3P3VSUP_W {
271        C3P3VSUP_W::new(self)
272    }
273    #[doc = "Bit 29 - 3P0V Support"]
274    #[inline(always)]
275    pub fn c3p0vsup(&mut self) -> C3P0VSUP_W {
276        C3P0VSUP_W::new(self)
277    }
278    #[doc = "Bit 30 - 1P8V Support"]
279    #[inline(always)]
280    pub fn c1p8vsup(&mut self) -> C1P8VSUP_W {
281        C1P8VSUP_W::new(self)
282    }
283    #[doc = "Writes raw bits to the register."]
284    #[inline(always)]
285    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
286        self.0.bits(bits);
287        self
288    }
289}
290#[doc = "Core Configuration 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"]
291pub struct CFG0_SPEC;
292impl crate::RegisterSpec for CFG0_SPEC {
293    type Ux = u32;
294}
295#[doc = "`read()` method returns [cfg0::R](R) reader structure"]
296impl crate::Readable for CFG0_SPEC {
297    type Reader = R;
298}
299#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"]
300impl crate::Writable for CFG0_SPEC {
301    type Writer = W;
302}
303#[doc = "`reset()` method sets CFG0 to value 0"]
304impl crate::Resettable for CFG0_SPEC {
305    #[inline(always)]
306    fn reset_value() -> Self::Ux {
307        0
308    }
309}
efm32gg11b840_pac/sdio/cfg0.rs

efm32gg11b840_pac/sdio/
cfg0.rs
