efm32gg11b840_pac/emu/
dcdcmiscctrl.rs

1#[doc = "Register `DCDCMISCCTRL` reader"]
2pub struct R(crate::R<DCDCMISCCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DCDCMISCCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DCDCMISCCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DCDCMISCCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DCDCMISCCTRL` writer"]
17pub struct W(crate::W<DCDCMISCCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DCDCMISCCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DCDCMISCCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DCDCMISCCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `LNFORCECCM` reader - Force DCDC Into CCM Mode in Low Noise Operation"]
38pub type LNFORCECCM_R = crate::BitReader<bool>;
39#[doc = "Field `LNFORCECCM` writer - Force DCDC Into CCM Mode in Low Noise Operation"]
40pub type LNFORCECCM_W<'a> = crate::BitWriter<'a, u32, DCDCMISCCTRL_SPEC, bool, 0>;
41#[doc = "Field `LPCMPHYSDIS` reader - Disable LP Mode Hysteresis in the State Machine Control"]
42pub type LPCMPHYSDIS_R = crate::BitReader<bool>;
43#[doc = "Field `LPCMPHYSDIS` writer - Disable LP Mode Hysteresis in the State Machine Control"]
44pub type LPCMPHYSDIS_W<'a> = crate::BitWriter<'a, u32, DCDCMISCCTRL_SPEC, bool, 1>;
45#[doc = "Field `LPCMPHYSHI` reader - Comparator Threshold on the High Side"]
46pub type LPCMPHYSHI_R = crate::BitReader<bool>;
47#[doc = "Field `LPCMPHYSHI` writer - Comparator Threshold on the High Side"]
48pub type LPCMPHYSHI_W<'a> = crate::BitWriter<'a, u32, DCDCMISCCTRL_SPEC, bool, 2>;
49#[doc = "Field `LNFORCECCMIMM` reader - Force DCDC Into CCM Mode Immediately, Based on LNFORCECCM"]
50pub type LNFORCECCMIMM_R = crate::BitReader<bool>;
51#[doc = "Field `LNFORCECCMIMM` writer - Force DCDC Into CCM Mode Immediately, Based on LNFORCECCM"]
52pub type LNFORCECCMIMM_W<'a> = crate::BitWriter<'a, u32, DCDCMISCCTRL_SPEC, bool, 5>;
53#[doc = "Field `PFETCNT` reader - PFET Switch Number Selection"]
54pub type PFETCNT_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `PFETCNT` writer - PFET Switch Number Selection"]
56pub type PFETCNT_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 4, 8>;
57#[doc = "Field `NFETCNT` reader - NFET Switch Number Selection"]
58pub type NFETCNT_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `NFETCNT` writer - NFET Switch Number Selection"]
60pub type NFETCNT_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 4, 12>;
61#[doc = "Field `BYPLIMSEL` reader - Current Limit in Bypass Mode"]
62pub type BYPLIMSEL_R = crate::FieldReader<u8, u8>;
63#[doc = "Field `BYPLIMSEL` writer - Current Limit in Bypass Mode"]
64pub type BYPLIMSEL_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 4, 16>;
65#[doc = "Field `LPCLIMILIMSEL` reader - Current Limit Level Selection for Current Limiter in LP Mode"]
66pub type LPCLIMILIMSEL_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `LPCLIMILIMSEL` writer - Current Limit Level Selection for Current Limiter in LP Mode"]
68pub type LPCLIMILIMSEL_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 3, 20>;
69#[doc = "Field `LNCLIMILIMSEL` reader - Current Limit Level Selection for Current Limiter in LN Mode"]
70pub type LNCLIMILIMSEL_R = crate::FieldReader<u8, u8>;
71#[doc = "Field `LNCLIMILIMSEL` writer - Current Limit Level Selection for Current Limiter in LN Mode"]
72pub type LNCLIMILIMSEL_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 3, 24>;
73#[doc = "LP Mode Comparator Bias Selection for EM23 or EM4H\n\nValue on reset: 0"]
74#[derive(Clone, Copy, Debug, PartialEq)]
75#[repr(u8)]
76pub enum LPCMPBIASEM234H_A {
77    #[doc = "0: Maximum load current less than 75uA."]
78    BIAS0 = 0,
79    #[doc = "1: Maximum load current less than 500uA."]
80    BIAS1 = 1,
81    #[doc = "2: Maximum load current less than 2.5mA."]
82    BIAS2 = 2,
83    #[doc = "3: Maximum load current less than 10mA."]
84    BIAS3 = 3,
85}
86impl From<LPCMPBIASEM234H_A> for u8 {
87    #[inline(always)]
88    fn from(variant: LPCMPBIASEM234H_A) -> Self {
89        variant as _
90    }
91}
92#[doc = "Field `LPCMPBIASEM234H` reader - LP Mode Comparator Bias Selection for EM23 or EM4H"]
93pub type LPCMPBIASEM234H_R = crate::FieldReader<u8, LPCMPBIASEM234H_A>;
94impl LPCMPBIASEM234H_R {
95    #[doc = "Get enumerated values variant"]
96    #[inline(always)]
97    pub fn variant(&self) -> LPCMPBIASEM234H_A {
98        match self.bits {
99            0 => LPCMPBIASEM234H_A::BIAS0,
100            1 => LPCMPBIASEM234H_A::BIAS1,
101            2 => LPCMPBIASEM234H_A::BIAS2,
102            3 => LPCMPBIASEM234H_A::BIAS3,
103            _ => unreachable!(),
104        }
105    }
106    #[doc = "Checks if the value of the field is `BIAS0`"]
107    #[inline(always)]
108    pub fn is_bias0(&self) -> bool {
109        *self == LPCMPBIASEM234H_A::BIAS0
110    }
111    #[doc = "Checks if the value of the field is `BIAS1`"]
112    #[inline(always)]
113    pub fn is_bias1(&self) -> bool {
114        *self == LPCMPBIASEM234H_A::BIAS1
115    }
116    #[doc = "Checks if the value of the field is `BIAS2`"]
117    #[inline(always)]
118    pub fn is_bias2(&self) -> bool {
119        *self == LPCMPBIASEM234H_A::BIAS2
120    }
121    #[doc = "Checks if the value of the field is `BIAS3`"]
122    #[inline(always)]
123    pub fn is_bias3(&self) -> bool {
124        *self == LPCMPBIASEM234H_A::BIAS3
125    }
126}
127#[doc = "Field `LPCMPBIASEM234H` writer - LP Mode Comparator Bias Selection for EM23 or EM4H"]
128pub type LPCMPBIASEM234H_W<'a> =
129    crate::FieldWriterSafe<'a, u32, DCDCMISCCTRL_SPEC, u8, LPCMPBIASEM234H_A, 2, 28>;
130impl<'a> LPCMPBIASEM234H_W<'a> {
131    #[doc = "Maximum load current less than 75uA."]
132    #[inline(always)]
133    pub fn bias0(self) -> &'a mut W {
134        self.variant(LPCMPBIASEM234H_A::BIAS0)
135    }
136    #[doc = "Maximum load current less than 500uA."]
137    #[inline(always)]
138    pub fn bias1(self) -> &'a mut W {
139        self.variant(LPCMPBIASEM234H_A::BIAS1)
140    }
141    #[doc = "Maximum load current less than 2.5mA."]
142    #[inline(always)]
143    pub fn bias2(self) -> &'a mut W {
144        self.variant(LPCMPBIASEM234H_A::BIAS2)
145    }
146    #[doc = "Maximum load current less than 10mA."]
147    #[inline(always)]
148    pub fn bias3(self) -> &'a mut W {
149        self.variant(LPCMPBIASEM234H_A::BIAS3)
150    }
151}
152impl R {
153    #[doc = "Bit 0 - Force DCDC Into CCM Mode in Low Noise Operation"]
154    #[inline(always)]
155    pub fn lnforceccm(&self) -> LNFORCECCM_R {
156        LNFORCECCM_R::new((self.bits & 1) != 0)
157    }
158    #[doc = "Bit 1 - Disable LP Mode Hysteresis in the State Machine Control"]
159    #[inline(always)]
160    pub fn lpcmphysdis(&self) -> LPCMPHYSDIS_R {
161        LPCMPHYSDIS_R::new(((self.bits >> 1) & 1) != 0)
162    }
163    #[doc = "Bit 2 - Comparator Threshold on the High Side"]
164    #[inline(always)]
165    pub fn lpcmphyshi(&self) -> LPCMPHYSHI_R {
166        LPCMPHYSHI_R::new(((self.bits >> 2) & 1) != 0)
167    }
168    #[doc = "Bit 5 - Force DCDC Into CCM Mode Immediately, Based on LNFORCECCM"]
169    #[inline(always)]
170    pub fn lnforceccmimm(&self) -> LNFORCECCMIMM_R {
171        LNFORCECCMIMM_R::new(((self.bits >> 5) & 1) != 0)
172    }
173    #[doc = "Bits 8:11 - PFET Switch Number Selection"]
174    #[inline(always)]
175    pub fn pfetcnt(&self) -> PFETCNT_R {
176        PFETCNT_R::new(((self.bits >> 8) & 0x0f) as u8)
177    }
178    #[doc = "Bits 12:15 - NFET Switch Number Selection"]
179    #[inline(always)]
180    pub fn nfetcnt(&self) -> NFETCNT_R {
181        NFETCNT_R::new(((self.bits >> 12) & 0x0f) as u8)
182    }
183    #[doc = "Bits 16:19 - Current Limit in Bypass Mode"]
184    #[inline(always)]
185    pub fn byplimsel(&self) -> BYPLIMSEL_R {
186        BYPLIMSEL_R::new(((self.bits >> 16) & 0x0f) as u8)
187    }
188    #[doc = "Bits 20:22 - Current Limit Level Selection for Current Limiter in LP Mode"]
189    #[inline(always)]
190    pub fn lpclimilimsel(&self) -> LPCLIMILIMSEL_R {
191        LPCLIMILIMSEL_R::new(((self.bits >> 20) & 7) as u8)
192    }
193    #[doc = "Bits 24:26 - Current Limit Level Selection for Current Limiter in LN Mode"]
194    #[inline(always)]
195    pub fn lnclimilimsel(&self) -> LNCLIMILIMSEL_R {
196        LNCLIMILIMSEL_R::new(((self.bits >> 24) & 7) as u8)
197    }
198    #[doc = "Bits 28:29 - LP Mode Comparator Bias Selection for EM23 or EM4H"]
199    #[inline(always)]
200    pub fn lpcmpbiasem234h(&self) -> LPCMPBIASEM234H_R {
201        LPCMPBIASEM234H_R::new(((self.bits >> 28) & 3) as u8)
202    }
203}
204impl W {
205    #[doc = "Bit 0 - Force DCDC Into CCM Mode in Low Noise Operation"]
206    #[inline(always)]
207    pub fn lnforceccm(&mut self) -> LNFORCECCM_W {
208        LNFORCECCM_W::new(self)
209    }
210    #[doc = "Bit 1 - Disable LP Mode Hysteresis in the State Machine Control"]
211    #[inline(always)]
212    pub fn lpcmphysdis(&mut self) -> LPCMPHYSDIS_W {
213        LPCMPHYSDIS_W::new(self)
214    }
215    #[doc = "Bit 2 - Comparator Threshold on the High Side"]
216    #[inline(always)]
217    pub fn lpcmphyshi(&mut self) -> LPCMPHYSHI_W {
218        LPCMPHYSHI_W::new(self)
219    }
220    #[doc = "Bit 5 - Force DCDC Into CCM Mode Immediately, Based on LNFORCECCM"]
221    #[inline(always)]
222    pub fn lnforceccmimm(&mut self) -> LNFORCECCMIMM_W {
223        LNFORCECCMIMM_W::new(self)
224    }
225    #[doc = "Bits 8:11 - PFET Switch Number Selection"]
226    #[inline(always)]
227    pub fn pfetcnt(&mut self) -> PFETCNT_W {
228        PFETCNT_W::new(self)
229    }
230    #[doc = "Bits 12:15 - NFET Switch Number Selection"]
231    #[inline(always)]
232    pub fn nfetcnt(&mut self) -> NFETCNT_W {
233        NFETCNT_W::new(self)
234    }
235    #[doc = "Bits 16:19 - Current Limit in Bypass Mode"]
236    #[inline(always)]
237    pub fn byplimsel(&mut self) -> BYPLIMSEL_W {
238        BYPLIMSEL_W::new(self)
239    }
240    #[doc = "Bits 20:22 - Current Limit Level Selection for Current Limiter in LP Mode"]
241    #[inline(always)]
242    pub fn lpclimilimsel(&mut self) -> LPCLIMILIMSEL_W {
243        LPCLIMILIMSEL_W::new(self)
244    }
245    #[doc = "Bits 24:26 - Current Limit Level Selection for Current Limiter in LN Mode"]
246    #[inline(always)]
247    pub fn lnclimilimsel(&mut self) -> LNCLIMILIMSEL_W {
248        LNCLIMILIMSEL_W::new(self)
249    }
250    #[doc = "Bits 28:29 - LP Mode Comparator Bias Selection for EM23 or EM4H"]
251    #[inline(always)]
252    pub fn lpcmpbiasem234h(&mut self) -> LPCMPBIASEM234H_W {
253        LPCMPBIASEM234H_W::new(self)
254    }
255    #[doc = "Writes raw bits to the register."]
256    #[inline(always)]
257    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
258        self.0.bits(bits);
259        self
260    }
261}
262#[doc = "DCDC Miscellaneous Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcdcmiscctrl](index.html) module"]
263pub struct DCDCMISCCTRL_SPEC;
264impl crate::RegisterSpec for DCDCMISCCTRL_SPEC {
265    type Ux = u32;
266}
267#[doc = "`read()` method returns [dcdcmiscctrl::R](R) reader structure"]
268impl crate::Readable for DCDCMISCCTRL_SPEC {
269    type Reader = R;
270}
271#[doc = "`write(|w| ..)` method takes [dcdcmiscctrl::W](W) writer structure"]
272impl crate::Writable for DCDCMISCCTRL_SPEC {
273    type Writer = W;
274}
275#[doc = "`reset()` method sets DCDCMISCCTRL to value 0x0310_7706"]
276impl crate::Resettable for DCDCMISCCTRL_SPEC {
277    #[inline(always)]
278    fn reset_value() -> Self::Ux {
279        0x0310_7706
280    }
281}
efm32gg11b840_pac/emu/dcdcmiscctrl.rs

efm32gg11b840_pac/emu/
dcdcmiscctrl.rs
