1#[doc = "Register `SINGLECTRLX` reader"]
2pub struct R(crate::R<SINGLECTRLX_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SINGLECTRLX_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SINGLECTRLX_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SINGLECTRLX_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SINGLECTRLX` writer"]
17pub struct W(crate::W<SINGLECTRLX_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SINGLECTRLX_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SINGLECTRLX_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SINGLECTRLX_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Single Channel Reference Selection\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum VREFSEL_A {
41 #[doc = "0: Internal 0.83V Bandgap reference"]
42 VBGR = 0,
43 #[doc = "1: Scaled AVDD: AVDD*(the VREF attenuation factor)"]
44 VDDXWATT = 1,
45 #[doc = "2: Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
46 VREFPWATT = 2,
47 #[doc = "3: Raw single ended external Vref: ADCn_EXTP"]
48 VREFP = 3,
49 #[doc = "4: Special mode used to generate ENTROPY."]
50 VENTROPY = 4,
51 #[doc = "5: Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
52 VREFPNWATT = 5,
53 #[doc = "6: Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
54 VREFPN = 6,
55 #[doc = "7: Internal Bandgap reference at low setting 0.78V"]
56 VBGRLOW = 7,
57}
58impl From<VREFSEL_A> for u8 {
59 #[inline(always)]
60 fn from(variant: VREFSEL_A) -> Self {
61 variant as _
62 }
63}
64#[doc = "Field `VREFSEL` reader - Single Channel Reference Selection"]
65pub type VREFSEL_R = crate::FieldReader<u8, VREFSEL_A>;
66impl VREFSEL_R {
67 #[doc = "Get enumerated values variant"]
68 #[inline(always)]
69 pub fn variant(&self) -> VREFSEL_A {
70 match self.bits {
71 0 => VREFSEL_A::VBGR,
72 1 => VREFSEL_A::VDDXWATT,
73 2 => VREFSEL_A::VREFPWATT,
74 3 => VREFSEL_A::VREFP,
75 4 => VREFSEL_A::VENTROPY,
76 5 => VREFSEL_A::VREFPNWATT,
77 6 => VREFSEL_A::VREFPN,
78 7 => VREFSEL_A::VBGRLOW,
79 _ => unreachable!(),
80 }
81 }
82 #[doc = "Checks if the value of the field is `VBGR`"]
83 #[inline(always)]
84 pub fn is_vbgr(&self) -> bool {
85 *self == VREFSEL_A::VBGR
86 }
87 #[doc = "Checks if the value of the field is `VDDXWATT`"]
88 #[inline(always)]
89 pub fn is_vddxwatt(&self) -> bool {
90 *self == VREFSEL_A::VDDXWATT
91 }
92 #[doc = "Checks if the value of the field is `VREFPWATT`"]
93 #[inline(always)]
94 pub fn is_vrefpwatt(&self) -> bool {
95 *self == VREFSEL_A::VREFPWATT
96 }
97 #[doc = "Checks if the value of the field is `VREFP`"]
98 #[inline(always)]
99 pub fn is_vrefp(&self) -> bool {
100 *self == VREFSEL_A::VREFP
101 }
102 #[doc = "Checks if the value of the field is `VENTROPY`"]
103 #[inline(always)]
104 pub fn is_ventropy(&self) -> bool {
105 *self == VREFSEL_A::VENTROPY
106 }
107 #[doc = "Checks if the value of the field is `VREFPNWATT`"]
108 #[inline(always)]
109 pub fn is_vrefpnwatt(&self) -> bool {
110 *self == VREFSEL_A::VREFPNWATT
111 }
112 #[doc = "Checks if the value of the field is `VREFPN`"]
113 #[inline(always)]
114 pub fn is_vrefpn(&self) -> bool {
115 *self == VREFSEL_A::VREFPN
116 }
117 #[doc = "Checks if the value of the field is `VBGRLOW`"]
118 #[inline(always)]
119 pub fn is_vbgrlow(&self) -> bool {
120 *self == VREFSEL_A::VBGRLOW
121 }
122}
123#[doc = "Field `VREFSEL` writer - Single Channel Reference Selection"]
124pub type VREFSEL_W<'a> = crate::FieldWriterSafe<'a, u32, SINGLECTRLX_SPEC, u8, VREFSEL_A, 3, 0>;
125impl<'a> VREFSEL_W<'a> {
126 #[doc = "Internal 0.83V Bandgap reference"]
127 #[inline(always)]
128 pub fn vbgr(self) -> &'a mut W {
129 self.variant(VREFSEL_A::VBGR)
130 }
131 #[doc = "Scaled AVDD: AVDD*(the VREF attenuation factor)"]
132 #[inline(always)]
133 pub fn vddxwatt(self) -> &'a mut W {
134 self.variant(VREFSEL_A::VDDXWATT)
135 }
136 #[doc = "Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
137 #[inline(always)]
138 pub fn vrefpwatt(self) -> &'a mut W {
139 self.variant(VREFSEL_A::VREFPWATT)
140 }
141 #[doc = "Raw single ended external Vref: ADCn_EXTP"]
142 #[inline(always)]
143 pub fn vrefp(self) -> &'a mut W {
144 self.variant(VREFSEL_A::VREFP)
145 }
146 #[doc = "Special mode used to generate ENTROPY."]
147 #[inline(always)]
148 pub fn ventropy(self) -> &'a mut W {
149 self.variant(VREFSEL_A::VENTROPY)
150 }
151 #[doc = "Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
152 #[inline(always)]
153 pub fn vrefpnwatt(self) -> &'a mut W {
154 self.variant(VREFSEL_A::VREFPNWATT)
155 }
156 #[doc = "Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
157 #[inline(always)]
158 pub fn vrefpn(self) -> &'a mut W {
159 self.variant(VREFSEL_A::VREFPN)
160 }
161 #[doc = "Internal Bandgap reference at low setting 0.78V"]
162 #[inline(always)]
163 pub fn vbgrlow(self) -> &'a mut W {
164 self.variant(VREFSEL_A::VBGRLOW)
165 }
166}
167#[doc = "Field `VREFATTFIX` reader - Enable Fixed Scaling on VREF"]
168pub type VREFATTFIX_R = crate::BitReader<bool>;
169#[doc = "Field `VREFATTFIX` writer - Enable Fixed Scaling on VREF"]
170pub type VREFATTFIX_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 3>;
171#[doc = "Field `VREFATT` reader - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
172pub type VREFATT_R = crate::FieldReader<u8, u8>;
173#[doc = "Field `VREFATT` writer - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
174pub type VREFATT_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 4, 4>;
175#[doc = "Field `VINATT` reader - Code for VIN Attenuation Factor"]
176pub type VINATT_R = crate::FieldReader<u8, u8>;
177#[doc = "Field `VINATT` writer - Code for VIN Attenuation Factor"]
178pub type VINATT_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 4, 8>;
179#[doc = "Field `DVL` reader - Single Channel DV Level Select"]
180pub type DVL_R = crate::FieldReader<u8, u8>;
181#[doc = "Field `DVL` writer - Single Channel DV Level Select"]
182pub type DVL_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 2, 12>;
183#[doc = "Field `FIFOOFACT` reader - Single Channel FIFO Overflow Action"]
184pub type FIFOOFACT_R = crate::BitReader<bool>;
185#[doc = "Field `FIFOOFACT` writer - Single Channel FIFO Overflow Action"]
186pub type FIFOOFACT_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 14>;
187#[doc = "Field `PRSMODE` reader - Single Channel PRS Trigger Mode"]
188pub type PRSMODE_R = crate::BitReader<bool>;
189#[doc = "Field `PRSMODE` writer - Single Channel PRS Trigger Mode"]
190pub type PRSMODE_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 16>;
191#[doc = "Single Channel PRS Trigger Select\n\nValue on reset: 0"]
192#[derive(Clone, Copy, Debug, PartialEq)]
193#[repr(u8)]
194pub enum PRSSEL_A {
195 #[doc = "0: PRS ch 0 triggers single channel"]
196 PRSCH0 = 0,
197 #[doc = "1: PRS ch 1 triggers single channel"]
198 PRSCH1 = 1,
199 #[doc = "2: PRS ch 2 triggers single channel"]
200 PRSCH2 = 2,
201 #[doc = "3: PRS ch 3 triggers single channel"]
202 PRSCH3 = 3,
203 #[doc = "4: PRS ch 4 triggers single channel"]
204 PRSCH4 = 4,
205 #[doc = "5: PRS ch 5 triggers single channel"]
206 PRSCH5 = 5,
207 #[doc = "6: PRS ch 6 triggers single channel"]
208 PRSCH6 = 6,
209 #[doc = "7: PRS ch 7 triggers single channel"]
210 PRSCH7 = 7,
211 #[doc = "8: PRS ch 8 triggers single channel"]
212 PRSCH8 = 8,
213 #[doc = "9: PRS ch 9 triggers single channel"]
214 PRSCH9 = 9,
215 #[doc = "10: PRS ch 10 triggers single channel"]
216 PRSCH10 = 10,
217 #[doc = "11: PRS ch 11 triggers single channel"]
218 PRSCH11 = 11,
219 #[doc = "12: PRS ch 12 triggers single channel"]
220 PRSCH12 = 12,
221 #[doc = "13: PRS ch 13 triggers single channel"]
222 PRSCH13 = 13,
223 #[doc = "14: PRS ch 14 triggers single channel"]
224 PRSCH14 = 14,
225 #[doc = "15: PRS ch 15 triggers single channel"]
226 PRSCH15 = 15,
227 #[doc = "16: PRS ch 16 triggers single channel"]
228 PRSCH16 = 16,
229 #[doc = "17: PRS ch 17 triggers single channel"]
230 PRSCH17 = 17,
231 #[doc = "18: PRS ch 18 triggers single channel"]
232 PRSCH18 = 18,
233 #[doc = "19: PRS ch 19 triggers single channel"]
234 PRSCH19 = 19,
235 #[doc = "20: PRS ch 20 triggers single channel"]
236 PRSCH20 = 20,
237 #[doc = "21: PRS ch 21 triggers single channel"]
238 PRSCH21 = 21,
239 #[doc = "22: PRS ch 22 triggers single channel"]
240 PRSCH22 = 22,
241 #[doc = "23: PRS ch 23 triggers single channel"]
242 PRSCH23 = 23,
243}
244impl From<PRSSEL_A> for u8 {
245 #[inline(always)]
246 fn from(variant: PRSSEL_A) -> Self {
247 variant as _
248 }
249}
250#[doc = "Field `PRSSEL` reader - Single Channel PRS Trigger Select"]
251pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
252impl PRSSEL_R {
253 #[doc = "Get enumerated values variant"]
254 #[inline(always)]
255 pub fn variant(&self) -> Option<PRSSEL_A> {
256 match self.bits {
257 0 => Some(PRSSEL_A::PRSCH0),
258 1 => Some(PRSSEL_A::PRSCH1),
259 2 => Some(PRSSEL_A::PRSCH2),
260 3 => Some(PRSSEL_A::PRSCH3),
261 4 => Some(PRSSEL_A::PRSCH4),
262 5 => Some(PRSSEL_A::PRSCH5),
263 6 => Some(PRSSEL_A::PRSCH6),
264 7 => Some(PRSSEL_A::PRSCH7),
265 8 => Some(PRSSEL_A::PRSCH8),
266 9 => Some(PRSSEL_A::PRSCH9),
267 10 => Some(PRSSEL_A::PRSCH10),
268 11 => Some(PRSSEL_A::PRSCH11),
269 12 => Some(PRSSEL_A::PRSCH12),
270 13 => Some(PRSSEL_A::PRSCH13),
271 14 => Some(PRSSEL_A::PRSCH14),
272 15 => Some(PRSSEL_A::PRSCH15),
273 16 => Some(PRSSEL_A::PRSCH16),
274 17 => Some(PRSSEL_A::PRSCH17),
275 18 => Some(PRSSEL_A::PRSCH18),
276 19 => Some(PRSSEL_A::PRSCH19),
277 20 => Some(PRSSEL_A::PRSCH20),
278 21 => Some(PRSSEL_A::PRSCH21),
279 22 => Some(PRSSEL_A::PRSCH22),
280 23 => Some(PRSSEL_A::PRSCH23),
281 _ => None,
282 }
283 }
284 #[doc = "Checks if the value of the field is `PRSCH0`"]
285 #[inline(always)]
286 pub fn is_prsch0(&self) -> bool {
287 *self == PRSSEL_A::PRSCH0
288 }
289 #[doc = "Checks if the value of the field is `PRSCH1`"]
290 #[inline(always)]
291 pub fn is_prsch1(&self) -> bool {
292 *self == PRSSEL_A::PRSCH1
293 }
294 #[doc = "Checks if the value of the field is `PRSCH2`"]
295 #[inline(always)]
296 pub fn is_prsch2(&self) -> bool {
297 *self == PRSSEL_A::PRSCH2
298 }
299 #[doc = "Checks if the value of the field is `PRSCH3`"]
300 #[inline(always)]
301 pub fn is_prsch3(&self) -> bool {
302 *self == PRSSEL_A::PRSCH3
303 }
304 #[doc = "Checks if the value of the field is `PRSCH4`"]
305 #[inline(always)]
306 pub fn is_prsch4(&self) -> bool {
307 *self == PRSSEL_A::PRSCH4
308 }
309 #[doc = "Checks if the value of the field is `PRSCH5`"]
310 #[inline(always)]
311 pub fn is_prsch5(&self) -> bool {
312 *self == PRSSEL_A::PRSCH5
313 }
314 #[doc = "Checks if the value of the field is `PRSCH6`"]
315 #[inline(always)]
316 pub fn is_prsch6(&self) -> bool {
317 *self == PRSSEL_A::PRSCH6
318 }
319 #[doc = "Checks if the value of the field is `PRSCH7`"]
320 #[inline(always)]
321 pub fn is_prsch7(&self) -> bool {
322 *self == PRSSEL_A::PRSCH7
323 }
324 #[doc = "Checks if the value of the field is `PRSCH8`"]
325 #[inline(always)]
326 pub fn is_prsch8(&self) -> bool {
327 *self == PRSSEL_A::PRSCH8
328 }
329 #[doc = "Checks if the value of the field is `PRSCH9`"]
330 #[inline(always)]
331 pub fn is_prsch9(&self) -> bool {
332 *self == PRSSEL_A::PRSCH9
333 }
334 #[doc = "Checks if the value of the field is `PRSCH10`"]
335 #[inline(always)]
336 pub fn is_prsch10(&self) -> bool {
337 *self == PRSSEL_A::PRSCH10
338 }
339 #[doc = "Checks if the value of the field is `PRSCH11`"]
340 #[inline(always)]
341 pub fn is_prsch11(&self) -> bool {
342 *self == PRSSEL_A::PRSCH11
343 }
344 #[doc = "Checks if the value of the field is `PRSCH12`"]
345 #[inline(always)]
346 pub fn is_prsch12(&self) -> bool {
347 *self == PRSSEL_A::PRSCH12
348 }
349 #[doc = "Checks if the value of the field is `PRSCH13`"]
350 #[inline(always)]
351 pub fn is_prsch13(&self) -> bool {
352 *self == PRSSEL_A::PRSCH13
353 }
354 #[doc = "Checks if the value of the field is `PRSCH14`"]
355 #[inline(always)]
356 pub fn is_prsch14(&self) -> bool {
357 *self == PRSSEL_A::PRSCH14
358 }
359 #[doc = "Checks if the value of the field is `PRSCH15`"]
360 #[inline(always)]
361 pub fn is_prsch15(&self) -> bool {
362 *self == PRSSEL_A::PRSCH15
363 }
364 #[doc = "Checks if the value of the field is `PRSCH16`"]
365 #[inline(always)]
366 pub fn is_prsch16(&self) -> bool {
367 *self == PRSSEL_A::PRSCH16
368 }
369 #[doc = "Checks if the value of the field is `PRSCH17`"]
370 #[inline(always)]
371 pub fn is_prsch17(&self) -> bool {
372 *self == PRSSEL_A::PRSCH17
373 }
374 #[doc = "Checks if the value of the field is `PRSCH18`"]
375 #[inline(always)]
376 pub fn is_prsch18(&self) -> bool {
377 *self == PRSSEL_A::PRSCH18
378 }
379 #[doc = "Checks if the value of the field is `PRSCH19`"]
380 #[inline(always)]
381 pub fn is_prsch19(&self) -> bool {
382 *self == PRSSEL_A::PRSCH19
383 }
384 #[doc = "Checks if the value of the field is `PRSCH20`"]
385 #[inline(always)]
386 pub fn is_prsch20(&self) -> bool {
387 *self == PRSSEL_A::PRSCH20
388 }
389 #[doc = "Checks if the value of the field is `PRSCH21`"]
390 #[inline(always)]
391 pub fn is_prsch21(&self) -> bool {
392 *self == PRSSEL_A::PRSCH21
393 }
394 #[doc = "Checks if the value of the field is `PRSCH22`"]
395 #[inline(always)]
396 pub fn is_prsch22(&self) -> bool {
397 *self == PRSSEL_A::PRSCH22
398 }
399 #[doc = "Checks if the value of the field is `PRSCH23`"]
400 #[inline(always)]
401 pub fn is_prsch23(&self) -> bool {
402 *self == PRSSEL_A::PRSCH23
403 }
404}
405#[doc = "Field `PRSSEL` writer - Single Channel PRS Trigger Select"]
406pub type PRSSEL_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, PRSSEL_A, 5, 17>;
407impl<'a> PRSSEL_W<'a> {
408 #[doc = "PRS ch 0 triggers single channel"]
409 #[inline(always)]
410 pub fn prsch0(self) -> &'a mut W {
411 self.variant(PRSSEL_A::PRSCH0)
412 }
413 #[doc = "PRS ch 1 triggers single channel"]
414 #[inline(always)]
415 pub fn prsch1(self) -> &'a mut W {
416 self.variant(PRSSEL_A::PRSCH1)
417 }
418 #[doc = "PRS ch 2 triggers single channel"]
419 #[inline(always)]
420 pub fn prsch2(self) -> &'a mut W {
421 self.variant(PRSSEL_A::PRSCH2)
422 }
423 #[doc = "PRS ch 3 triggers single channel"]
424 #[inline(always)]
425 pub fn prsch3(self) -> &'a mut W {
426 self.variant(PRSSEL_A::PRSCH3)
427 }
428 #[doc = "PRS ch 4 triggers single channel"]
429 #[inline(always)]
430 pub fn prsch4(self) -> &'a mut W {
431 self.variant(PRSSEL_A::PRSCH4)
432 }
433 #[doc = "PRS ch 5 triggers single channel"]
434 #[inline(always)]
435 pub fn prsch5(self) -> &'a mut W {
436 self.variant(PRSSEL_A::PRSCH5)
437 }
438 #[doc = "PRS ch 6 triggers single channel"]
439 #[inline(always)]
440 pub fn prsch6(self) -> &'a mut W {
441 self.variant(PRSSEL_A::PRSCH6)
442 }
443 #[doc = "PRS ch 7 triggers single channel"]
444 #[inline(always)]
445 pub fn prsch7(self) -> &'a mut W {
446 self.variant(PRSSEL_A::PRSCH7)
447 }
448 #[doc = "PRS ch 8 triggers single channel"]
449 #[inline(always)]
450 pub fn prsch8(self) -> &'a mut W {
451 self.variant(PRSSEL_A::PRSCH8)
452 }
453 #[doc = "PRS ch 9 triggers single channel"]
454 #[inline(always)]
455 pub fn prsch9(self) -> &'a mut W {
456 self.variant(PRSSEL_A::PRSCH9)
457 }
458 #[doc = "PRS ch 10 triggers single channel"]
459 #[inline(always)]
460 pub fn prsch10(self) -> &'a mut W {
461 self.variant(PRSSEL_A::PRSCH10)
462 }
463 #[doc = "PRS ch 11 triggers single channel"]
464 #[inline(always)]
465 pub fn prsch11(self) -> &'a mut W {
466 self.variant(PRSSEL_A::PRSCH11)
467 }
468 #[doc = "PRS ch 12 triggers single channel"]
469 #[inline(always)]
470 pub fn prsch12(self) -> &'a mut W {
471 self.variant(PRSSEL_A::PRSCH12)
472 }
473 #[doc = "PRS ch 13 triggers single channel"]
474 #[inline(always)]
475 pub fn prsch13(self) -> &'a mut W {
476 self.variant(PRSSEL_A::PRSCH13)
477 }
478 #[doc = "PRS ch 14 triggers single channel"]
479 #[inline(always)]
480 pub fn prsch14(self) -> &'a mut W {
481 self.variant(PRSSEL_A::PRSCH14)
482 }
483 #[doc = "PRS ch 15 triggers single channel"]
484 #[inline(always)]
485 pub fn prsch15(self) -> &'a mut W {
486 self.variant(PRSSEL_A::PRSCH15)
487 }
488 #[doc = "PRS ch 16 triggers single channel"]
489 #[inline(always)]
490 pub fn prsch16(self) -> &'a mut W {
491 self.variant(PRSSEL_A::PRSCH16)
492 }
493 #[doc = "PRS ch 17 triggers single channel"]
494 #[inline(always)]
495 pub fn prsch17(self) -> &'a mut W {
496 self.variant(PRSSEL_A::PRSCH17)
497 }
498 #[doc = "PRS ch 18 triggers single channel"]
499 #[inline(always)]
500 pub fn prsch18(self) -> &'a mut W {
501 self.variant(PRSSEL_A::PRSCH18)
502 }
503 #[doc = "PRS ch 19 triggers single channel"]
504 #[inline(always)]
505 pub fn prsch19(self) -> &'a mut W {
506 self.variant(PRSSEL_A::PRSCH19)
507 }
508 #[doc = "PRS ch 20 triggers single channel"]
509 #[inline(always)]
510 pub fn prsch20(self) -> &'a mut W {
511 self.variant(PRSSEL_A::PRSCH20)
512 }
513 #[doc = "PRS ch 21 triggers single channel"]
514 #[inline(always)]
515 pub fn prsch21(self) -> &'a mut W {
516 self.variant(PRSSEL_A::PRSCH21)
517 }
518 #[doc = "PRS ch 22 triggers single channel"]
519 #[inline(always)]
520 pub fn prsch22(self) -> &'a mut W {
521 self.variant(PRSSEL_A::PRSCH22)
522 }
523 #[doc = "PRS ch 23 triggers single channel"]
524 #[inline(always)]
525 pub fn prsch23(self) -> &'a mut W {
526 self.variant(PRSSEL_A::PRSCH23)
527 }
528}
529#[doc = "Field `CONVSTARTDELAY` reader - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
530pub type CONVSTARTDELAY_R = crate::FieldReader<u8, u8>;
531#[doc = "Field `CONVSTARTDELAY` writer - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
532pub type CONVSTARTDELAY_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 5, 22>;
533#[doc = "Field `CONVSTARTDELAYEN` reader - Enable Delaying Next Conversion Start"]
534pub type CONVSTARTDELAYEN_R = crate::BitReader<bool>;
535#[doc = "Field `CONVSTARTDELAYEN` writer - Enable Delaying Next Conversion Start"]
536pub type CONVSTARTDELAYEN_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 27>;
537#[doc = "REPDELAY Select for SINGLE REP Mode\n\nValue on reset: 0"]
538#[derive(Clone, Copy, Debug, PartialEq)]
539#[repr(u8)]
540pub enum REPDELAY_A {
541 #[doc = "0: No delay"]
542 NODELAY = 0,
543 #[doc = "1: 4 conversion clock cycles"]
544 _4CYCLES = 1,
545 #[doc = "2: 8 conversion clock cycles"]
546 _8CYCLES = 2,
547 #[doc = "3: 16 conversion clock cycles"]
548 _16CYCLES = 3,
549 #[doc = "4: 32 conversion clock cycles"]
550 _32CYCLES = 4,
551 #[doc = "5: 64 conversion clock cycles"]
552 _64CYCLES = 5,
553 #[doc = "6: 128 conversion clock cycles"]
554 _128CYCLES = 6,
555 #[doc = "7: 256 conversion clock cycles"]
556 _256CYCLES = 7,
557}
558impl From<REPDELAY_A> for u8 {
559 #[inline(always)]
560 fn from(variant: REPDELAY_A) -> Self {
561 variant as _
562 }
563}
564#[doc = "Field `REPDELAY` reader - REPDELAY Select for SINGLE REP Mode"]
565pub type REPDELAY_R = crate::FieldReader<u8, REPDELAY_A>;
566impl REPDELAY_R {
567 #[doc = "Get enumerated values variant"]
568 #[inline(always)]
569 pub fn variant(&self) -> REPDELAY_A {
570 match self.bits {
571 0 => REPDELAY_A::NODELAY,
572 1 => REPDELAY_A::_4CYCLES,
573 2 => REPDELAY_A::_8CYCLES,
574 3 => REPDELAY_A::_16CYCLES,
575 4 => REPDELAY_A::_32CYCLES,
576 5 => REPDELAY_A::_64CYCLES,
577 6 => REPDELAY_A::_128CYCLES,
578 7 => REPDELAY_A::_256CYCLES,
579 _ => unreachable!(),
580 }
581 }
582 #[doc = "Checks if the value of the field is `NODELAY`"]
583 #[inline(always)]
584 pub fn is_nodelay(&self) -> bool {
585 *self == REPDELAY_A::NODELAY
586 }
587 #[doc = "Checks if the value of the field is `_4CYCLES`"]
588 #[inline(always)]
589 pub fn is_4cycles(&self) -> bool {
590 *self == REPDELAY_A::_4CYCLES
591 }
592 #[doc = "Checks if the value of the field is `_8CYCLES`"]
593 #[inline(always)]
594 pub fn is_8cycles(&self) -> bool {
595 *self == REPDELAY_A::_8CYCLES
596 }
597 #[doc = "Checks if the value of the field is `_16CYCLES`"]
598 #[inline(always)]
599 pub fn is_16cycles(&self) -> bool {
600 *self == REPDELAY_A::_16CYCLES
601 }
602 #[doc = "Checks if the value of the field is `_32CYCLES`"]
603 #[inline(always)]
604 pub fn is_32cycles(&self) -> bool {
605 *self == REPDELAY_A::_32CYCLES
606 }
607 #[doc = "Checks if the value of the field is `_64CYCLES`"]
608 #[inline(always)]
609 pub fn is_64cycles(&self) -> bool {
610 *self == REPDELAY_A::_64CYCLES
611 }
612 #[doc = "Checks if the value of the field is `_128CYCLES`"]
613 #[inline(always)]
614 pub fn is_128cycles(&self) -> bool {
615 *self == REPDELAY_A::_128CYCLES
616 }
617 #[doc = "Checks if the value of the field is `_256CYCLES`"]
618 #[inline(always)]
619 pub fn is_256cycles(&self) -> bool {
620 *self == REPDELAY_A::_256CYCLES
621 }
622}
623#[doc = "Field `REPDELAY` writer - REPDELAY Select for SINGLE REP Mode"]
624pub type REPDELAY_W<'a> = crate::FieldWriterSafe<'a, u32, SINGLECTRLX_SPEC, u8, REPDELAY_A, 3, 29>;
625impl<'a> REPDELAY_W<'a> {
626 #[doc = "No delay"]
627 #[inline(always)]
628 pub fn nodelay(self) -> &'a mut W {
629 self.variant(REPDELAY_A::NODELAY)
630 }
631 #[doc = "4 conversion clock cycles"]
632 #[inline(always)]
633 pub fn _4cycles(self) -> &'a mut W {
634 self.variant(REPDELAY_A::_4CYCLES)
635 }
636 #[doc = "8 conversion clock cycles"]
637 #[inline(always)]
638 pub fn _8cycles(self) -> &'a mut W {
639 self.variant(REPDELAY_A::_8CYCLES)
640 }
641 #[doc = "16 conversion clock cycles"]
642 #[inline(always)]
643 pub fn _16cycles(self) -> &'a mut W {
644 self.variant(REPDELAY_A::_16CYCLES)
645 }
646 #[doc = "32 conversion clock cycles"]
647 #[inline(always)]
648 pub fn _32cycles(self) -> &'a mut W {
649 self.variant(REPDELAY_A::_32CYCLES)
650 }
651 #[doc = "64 conversion clock cycles"]
652 #[inline(always)]
653 pub fn _64cycles(self) -> &'a mut W {
654 self.variant(REPDELAY_A::_64CYCLES)
655 }
656 #[doc = "128 conversion clock cycles"]
657 #[inline(always)]
658 pub fn _128cycles(self) -> &'a mut W {
659 self.variant(REPDELAY_A::_128CYCLES)
660 }
661 #[doc = "256 conversion clock cycles"]
662 #[inline(always)]
663 pub fn _256cycles(self) -> &'a mut W {
664 self.variant(REPDELAY_A::_256CYCLES)
665 }
666}
667impl R {
668 #[doc = "Bits 0:2 - Single Channel Reference Selection"]
669 #[inline(always)]
670 pub fn vrefsel(&self) -> VREFSEL_R {
671 VREFSEL_R::new((self.bits & 7) as u8)
672 }
673 #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
674 #[inline(always)]
675 pub fn vrefattfix(&self) -> VREFATTFIX_R {
676 VREFATTFIX_R::new(((self.bits >> 3) & 1) != 0)
677 }
678 #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
679 #[inline(always)]
680 pub fn vrefatt(&self) -> VREFATT_R {
681 VREFATT_R::new(((self.bits >> 4) & 0x0f) as u8)
682 }
683 #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
684 #[inline(always)]
685 pub fn vinatt(&self) -> VINATT_R {
686 VINATT_R::new(((self.bits >> 8) & 0x0f) as u8)
687 }
688 #[doc = "Bits 12:13 - Single Channel DV Level Select"]
689 #[inline(always)]
690 pub fn dvl(&self) -> DVL_R {
691 DVL_R::new(((self.bits >> 12) & 3) as u8)
692 }
693 #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
694 #[inline(always)]
695 pub fn fifoofact(&self) -> FIFOOFACT_R {
696 FIFOOFACT_R::new(((self.bits >> 14) & 1) != 0)
697 }
698 #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
699 #[inline(always)]
700 pub fn prsmode(&self) -> PRSMODE_R {
701 PRSMODE_R::new(((self.bits >> 16) & 1) != 0)
702 }
703 #[doc = "Bits 17:21 - Single Channel PRS Trigger Select"]
704 #[inline(always)]
705 pub fn prssel(&self) -> PRSSEL_R {
706 PRSSEL_R::new(((self.bits >> 17) & 0x1f) as u8)
707 }
708 #[doc = "Bits 22:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
709 #[inline(always)]
710 pub fn convstartdelay(&self) -> CONVSTARTDELAY_R {
711 CONVSTARTDELAY_R::new(((self.bits >> 22) & 0x1f) as u8)
712 }
713 #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
714 #[inline(always)]
715 pub fn convstartdelayen(&self) -> CONVSTARTDELAYEN_R {
716 CONVSTARTDELAYEN_R::new(((self.bits >> 27) & 1) != 0)
717 }
718 #[doc = "Bits 29:31 - REPDELAY Select for SINGLE REP Mode"]
719 #[inline(always)]
720 pub fn repdelay(&self) -> REPDELAY_R {
721 REPDELAY_R::new(((self.bits >> 29) & 7) as u8)
722 }
723}
724impl W {
725 #[doc = "Bits 0:2 - Single Channel Reference Selection"]
726 #[inline(always)]
727 pub fn vrefsel(&mut self) -> VREFSEL_W {
728 VREFSEL_W::new(self)
729 }
730 #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
731 #[inline(always)]
732 pub fn vrefattfix(&mut self) -> VREFATTFIX_W {
733 VREFATTFIX_W::new(self)
734 }
735 #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
736 #[inline(always)]
737 pub fn vrefatt(&mut self) -> VREFATT_W {
738 VREFATT_W::new(self)
739 }
740 #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
741 #[inline(always)]
742 pub fn vinatt(&mut self) -> VINATT_W {
743 VINATT_W::new(self)
744 }
745 #[doc = "Bits 12:13 - Single Channel DV Level Select"]
746 #[inline(always)]
747 pub fn dvl(&mut self) -> DVL_W {
748 DVL_W::new(self)
749 }
750 #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
751 #[inline(always)]
752 pub fn fifoofact(&mut self) -> FIFOOFACT_W {
753 FIFOOFACT_W::new(self)
754 }
755 #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
756 #[inline(always)]
757 pub fn prsmode(&mut self) -> PRSMODE_W {
758 PRSMODE_W::new(self)
759 }
760 #[doc = "Bits 17:21 - Single Channel PRS Trigger Select"]
761 #[inline(always)]
762 pub fn prssel(&mut self) -> PRSSEL_W {
763 PRSSEL_W::new(self)
764 }
765 #[doc = "Bits 22:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
766 #[inline(always)]
767 pub fn convstartdelay(&mut self) -> CONVSTARTDELAY_W {
768 CONVSTARTDELAY_W::new(self)
769 }
770 #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
771 #[inline(always)]
772 pub fn convstartdelayen(&mut self) -> CONVSTARTDELAYEN_W {
773 CONVSTARTDELAYEN_W::new(self)
774 }
775 #[doc = "Bits 29:31 - REPDELAY Select for SINGLE REP Mode"]
776 #[inline(always)]
777 pub fn repdelay(&mut self) -> REPDELAY_W {
778 REPDELAY_W::new(self)
779 }
780 #[doc = "Writes raw bits to the register."]
781 #[inline(always)]
782 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
783 self.0.bits(bits);
784 self
785 }
786}
787#[doc = "Single Channel Control Register Continued\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlectrlx](index.html) module"]
788pub struct SINGLECTRLX_SPEC;
789impl crate::RegisterSpec for SINGLECTRLX_SPEC {
790 type Ux = u32;
791}
792#[doc = "`read()` method returns [singlectrlx::R](R) reader structure"]
793impl crate::Readable for SINGLECTRLX_SPEC {
794 type Reader = R;
795}
796#[doc = "`write(|w| ..)` method takes [singlectrlx::W](W) writer structure"]
797impl crate::Writable for SINGLECTRLX_SPEC {
798 type Writer = W;
799}
800#[doc = "`reset()` method sets SINGLECTRLX to value 0"]
801impl crate::Resettable for SINGLECTRLX_SPEC {
802 #[inline(always)]
803 fn reset_value() -> Self::Ux {
804 0
805 }
806}