1#[doc = "Reader of register CTRL"]
2pub type R = crate::R<u32, super::CTRL>;
3#[doc = "Writer for register CTRL"]
4pub type W = crate::W<u32, super::CTRL>;
5#[doc = "Register CTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `SYNC`"]
14pub type SYNC_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `SYNC`"]
16pub struct SYNC_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> SYNC_W<'a> {
20 #[doc = r"Sets the field bit"]
21 #[inline(always)]
22 pub fn set_bit(self) -> &'a mut W {
23 self.bit(true)
24 }
25 #[doc = r"Clears the field bit"]
26 #[inline(always)]
27 pub fn clear_bit(self) -> &'a mut W {
28 self.bit(false)
29 }
30 #[doc = r"Writes raw bits to the field"]
31 #[inline(always)]
32 pub fn bit(self, value: bool) -> &'a mut W {
33 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
34 self.w
35 }
36}
37#[doc = "Reader of field `LOOPBK`"]
38pub type LOOPBK_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `LOOPBK`"]
40pub struct LOOPBK_W<'a> {
41 w: &'a mut W,
42}
43impl<'a> LOOPBK_W<'a> {
44 #[doc = r"Sets the field bit"]
45 #[inline(always)]
46 pub fn set_bit(self) -> &'a mut W {
47 self.bit(true)
48 }
49 #[doc = r"Clears the field bit"]
50 #[inline(always)]
51 pub fn clear_bit(self) -> &'a mut W {
52 self.bit(false)
53 }
54 #[doc = r"Writes raw bits to the field"]
55 #[inline(always)]
56 pub fn bit(self, value: bool) -> &'a mut W {
57 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
58 self.w
59 }
60}
61#[doc = "Reader of field `CCEN`"]
62pub type CCEN_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `CCEN`"]
64pub struct CCEN_W<'a> {
65 w: &'a mut W,
66}
67impl<'a> CCEN_W<'a> {
68 #[doc = r"Sets the field bit"]
69 #[inline(always)]
70 pub fn set_bit(self) -> &'a mut W {
71 self.bit(true)
72 }
73 #[doc = r"Clears the field bit"]
74 #[inline(always)]
75 pub fn clear_bit(self) -> &'a mut W {
76 self.bit(false)
77 }
78 #[doc = r"Writes raw bits to the field"]
79 #[inline(always)]
80 pub fn bit(self, value: bool) -> &'a mut W {
81 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82 self.w
83 }
84}
85#[doc = "Reader of field `MPM`"]
86pub type MPM_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `MPM`"]
88pub struct MPM_W<'a> {
89 w: &'a mut W,
90}
91impl<'a> MPM_W<'a> {
92 #[doc = r"Sets the field bit"]
93 #[inline(always)]
94 pub fn set_bit(self) -> &'a mut W {
95 self.bit(true)
96 }
97 #[doc = r"Clears the field bit"]
98 #[inline(always)]
99 pub fn clear_bit(self) -> &'a mut W {
100 self.bit(false)
101 }
102 #[doc = r"Writes raw bits to the field"]
103 #[inline(always)]
104 pub fn bit(self, value: bool) -> &'a mut W {
105 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
106 self.w
107 }
108}
109#[doc = "Reader of field `MPAB`"]
110pub type MPAB_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `MPAB`"]
112pub struct MPAB_W<'a> {
113 w: &'a mut W,
114}
115impl<'a> MPAB_W<'a> {
116 #[doc = r"Sets the field bit"]
117 #[inline(always)]
118 pub fn set_bit(self) -> &'a mut W {
119 self.bit(true)
120 }
121 #[doc = r"Clears the field bit"]
122 #[inline(always)]
123 pub fn clear_bit(self) -> &'a mut W {
124 self.bit(false)
125 }
126 #[doc = r"Writes raw bits to the field"]
127 #[inline(always)]
128 pub fn bit(self, value: bool) -> &'a mut W {
129 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
130 self.w
131 }
132}
133#[doc = "Oversampling\n\nValue on reset: 0"]
134#[derive(Clone, Copy, Debug, PartialEq)]
135#[repr(u8)]
136pub enum OVS_A {
137 #[doc = "0: Regular UART mode with 16X oversampling in asynchronous mode"]
138 X16 = 0,
139 #[doc = "1: Double speed with 8X oversampling in asynchronous mode"]
140 X8 = 1,
141 #[doc = "2: 6X oversampling in asynchronous mode"]
142 X6 = 2,
143 #[doc = "3: Quadruple speed with 4X oversampling in asynchronous mode"]
144 X4 = 3,
145}
146impl From<OVS_A> for u8 {
147 #[inline(always)]
148 fn from(variant: OVS_A) -> Self {
149 variant as _
150 }
151}
152#[doc = "Reader of field `OVS`"]
153pub type OVS_R = crate::R<u8, OVS_A>;
154impl OVS_R {
155 #[doc = r"Get enumerated values variant"]
156 #[inline(always)]
157 pub fn variant(&self) -> OVS_A {
158 match self.bits {
159 0 => OVS_A::X16,
160 1 => OVS_A::X8,
161 2 => OVS_A::X6,
162 3 => OVS_A::X4,
163 _ => unreachable!(),
164 }
165 }
166 #[doc = "Checks if the value of the field is `X16`"]
167 #[inline(always)]
168 pub fn is_x16(&self) -> bool {
169 *self == OVS_A::X16
170 }
171 #[doc = "Checks if the value of the field is `X8`"]
172 #[inline(always)]
173 pub fn is_x8(&self) -> bool {
174 *self == OVS_A::X8
175 }
176 #[doc = "Checks if the value of the field is `X6`"]
177 #[inline(always)]
178 pub fn is_x6(&self) -> bool {
179 *self == OVS_A::X6
180 }
181 #[doc = "Checks if the value of the field is `X4`"]
182 #[inline(always)]
183 pub fn is_x4(&self) -> bool {
184 *self == OVS_A::X4
185 }
186}
187#[doc = "Write proxy for field `OVS`"]
188pub struct OVS_W<'a> {
189 w: &'a mut W,
190}
191impl<'a> OVS_W<'a> {
192 #[doc = r"Writes `variant` to the field"]
193 #[inline(always)]
194 pub fn variant(self, variant: OVS_A) -> &'a mut W {
195 {
196 self.bits(variant.into())
197 }
198 }
199 #[doc = "Regular UART mode with 16X oversampling in asynchronous mode"]
200 #[inline(always)]
201 pub fn x16(self) -> &'a mut W {
202 self.variant(OVS_A::X16)
203 }
204 #[doc = "Double speed with 8X oversampling in asynchronous mode"]
205 #[inline(always)]
206 pub fn x8(self) -> &'a mut W {
207 self.variant(OVS_A::X8)
208 }
209 #[doc = "6X oversampling in asynchronous mode"]
210 #[inline(always)]
211 pub fn x6(self) -> &'a mut W {
212 self.variant(OVS_A::X6)
213 }
214 #[doc = "Quadruple speed with 4X oversampling in asynchronous mode"]
215 #[inline(always)]
216 pub fn x4(self) -> &'a mut W {
217 self.variant(OVS_A::X4)
218 }
219 #[doc = r"Writes raw bits to the field"]
220 #[inline(always)]
221 pub fn bits(self, value: u8) -> &'a mut W {
222 self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u32) & 0x03) << 5);
223 self.w
224 }
225}
226#[doc = "Reader of field `CLKPOL`"]
227pub type CLKPOL_R = crate::R<bool, bool>;
228#[doc = "Write proxy for field `CLKPOL`"]
229pub struct CLKPOL_W<'a> {
230 w: &'a mut W,
231}
232impl<'a> CLKPOL_W<'a> {
233 #[doc = r"Sets the field bit"]
234 #[inline(always)]
235 pub fn set_bit(self) -> &'a mut W {
236 self.bit(true)
237 }
238 #[doc = r"Clears the field bit"]
239 #[inline(always)]
240 pub fn clear_bit(self) -> &'a mut W {
241 self.bit(false)
242 }
243 #[doc = r"Writes raw bits to the field"]
244 #[inline(always)]
245 pub fn bit(self, value: bool) -> &'a mut W {
246 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
247 self.w
248 }
249}
250#[doc = "Reader of field `CLKPHA`"]
251pub type CLKPHA_R = crate::R<bool, bool>;
252#[doc = "Write proxy for field `CLKPHA`"]
253pub struct CLKPHA_W<'a> {
254 w: &'a mut W,
255}
256impl<'a> CLKPHA_W<'a> {
257 #[doc = r"Sets the field bit"]
258 #[inline(always)]
259 pub fn set_bit(self) -> &'a mut W {
260 self.bit(true)
261 }
262 #[doc = r"Clears the field bit"]
263 #[inline(always)]
264 pub fn clear_bit(self) -> &'a mut W {
265 self.bit(false)
266 }
267 #[doc = r"Writes raw bits to the field"]
268 #[inline(always)]
269 pub fn bit(self, value: bool) -> &'a mut W {
270 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
271 self.w
272 }
273}
274#[doc = "Reader of field `MSBF`"]
275pub type MSBF_R = crate::R<bool, bool>;
276#[doc = "Write proxy for field `MSBF`"]
277pub struct MSBF_W<'a> {
278 w: &'a mut W,
279}
280impl<'a> MSBF_W<'a> {
281 #[doc = r"Sets the field bit"]
282 #[inline(always)]
283 pub fn set_bit(self) -> &'a mut W {
284 self.bit(true)
285 }
286 #[doc = r"Clears the field bit"]
287 #[inline(always)]
288 pub fn clear_bit(self) -> &'a mut W {
289 self.bit(false)
290 }
291 #[doc = r"Writes raw bits to the field"]
292 #[inline(always)]
293 pub fn bit(self, value: bool) -> &'a mut W {
294 self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
295 self.w
296 }
297}
298#[doc = "Reader of field `CSMA`"]
299pub type CSMA_R = crate::R<bool, bool>;
300#[doc = "Write proxy for field `CSMA`"]
301pub struct CSMA_W<'a> {
302 w: &'a mut W,
303}
304impl<'a> CSMA_W<'a> {
305 #[doc = r"Sets the field bit"]
306 #[inline(always)]
307 pub fn set_bit(self) -> &'a mut W {
308 self.bit(true)
309 }
310 #[doc = r"Clears the field bit"]
311 #[inline(always)]
312 pub fn clear_bit(self) -> &'a mut W {
313 self.bit(false)
314 }
315 #[doc = r"Writes raw bits to the field"]
316 #[inline(always)]
317 pub fn bit(self, value: bool) -> &'a mut W {
318 self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
319 self.w
320 }
321}
322#[doc = "Reader of field `TXBIL`"]
323pub type TXBIL_R = crate::R<bool, bool>;
324#[doc = "Write proxy for field `TXBIL`"]
325pub struct TXBIL_W<'a> {
326 w: &'a mut W,
327}
328impl<'a> TXBIL_W<'a> {
329 #[doc = r"Sets the field bit"]
330 #[inline(always)]
331 pub fn set_bit(self) -> &'a mut W {
332 self.bit(true)
333 }
334 #[doc = r"Clears the field bit"]
335 #[inline(always)]
336 pub fn clear_bit(self) -> &'a mut W {
337 self.bit(false)
338 }
339 #[doc = r"Writes raw bits to the field"]
340 #[inline(always)]
341 pub fn bit(self, value: bool) -> &'a mut W {
342 self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
343 self.w
344 }
345}
346#[doc = "Reader of field `RXINV`"]
347pub type RXINV_R = crate::R<bool, bool>;
348#[doc = "Write proxy for field `RXINV`"]
349pub struct RXINV_W<'a> {
350 w: &'a mut W,
351}
352impl<'a> RXINV_W<'a> {
353 #[doc = r"Sets the field bit"]
354 #[inline(always)]
355 pub fn set_bit(self) -> &'a mut W {
356 self.bit(true)
357 }
358 #[doc = r"Clears the field bit"]
359 #[inline(always)]
360 pub fn clear_bit(self) -> &'a mut W {
361 self.bit(false)
362 }
363 #[doc = r"Writes raw bits to the field"]
364 #[inline(always)]
365 pub fn bit(self, value: bool) -> &'a mut W {
366 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
367 self.w
368 }
369}
370#[doc = "Reader of field `TXINV`"]
371pub type TXINV_R = crate::R<bool, bool>;
372#[doc = "Write proxy for field `TXINV`"]
373pub struct TXINV_W<'a> {
374 w: &'a mut W,
375}
376impl<'a> TXINV_W<'a> {
377 #[doc = r"Sets the field bit"]
378 #[inline(always)]
379 pub fn set_bit(self) -> &'a mut W {
380 self.bit(true)
381 }
382 #[doc = r"Clears the field bit"]
383 #[inline(always)]
384 pub fn clear_bit(self) -> &'a mut W {
385 self.bit(false)
386 }
387 #[doc = r"Writes raw bits to the field"]
388 #[inline(always)]
389 pub fn bit(self, value: bool) -> &'a mut W {
390 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
391 self.w
392 }
393}
394#[doc = "Reader of field `CSINV`"]
395pub type CSINV_R = crate::R<bool, bool>;
396#[doc = "Write proxy for field `CSINV`"]
397pub struct CSINV_W<'a> {
398 w: &'a mut W,
399}
400impl<'a> CSINV_W<'a> {
401 #[doc = r"Sets the field bit"]
402 #[inline(always)]
403 pub fn set_bit(self) -> &'a mut W {
404 self.bit(true)
405 }
406 #[doc = r"Clears the field bit"]
407 #[inline(always)]
408 pub fn clear_bit(self) -> &'a mut W {
409 self.bit(false)
410 }
411 #[doc = r"Writes raw bits to the field"]
412 #[inline(always)]
413 pub fn bit(self, value: bool) -> &'a mut W {
414 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
415 self.w
416 }
417}
418#[doc = "Reader of field `AUTOCS`"]
419pub type AUTOCS_R = crate::R<bool, bool>;
420#[doc = "Write proxy for field `AUTOCS`"]
421pub struct AUTOCS_W<'a> {
422 w: &'a mut W,
423}
424impl<'a> AUTOCS_W<'a> {
425 #[doc = r"Sets the field bit"]
426 #[inline(always)]
427 pub fn set_bit(self) -> &'a mut W {
428 self.bit(true)
429 }
430 #[doc = r"Clears the field bit"]
431 #[inline(always)]
432 pub fn clear_bit(self) -> &'a mut W {
433 self.bit(false)
434 }
435 #[doc = r"Writes raw bits to the field"]
436 #[inline(always)]
437 pub fn bit(self, value: bool) -> &'a mut W {
438 self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
439 self.w
440 }
441}
442#[doc = "Reader of field `AUTOTRI`"]
443pub type AUTOTRI_R = crate::R<bool, bool>;
444#[doc = "Write proxy for field `AUTOTRI`"]
445pub struct AUTOTRI_W<'a> {
446 w: &'a mut W,
447}
448impl<'a> AUTOTRI_W<'a> {
449 #[doc = r"Sets the field bit"]
450 #[inline(always)]
451 pub fn set_bit(self) -> &'a mut W {
452 self.bit(true)
453 }
454 #[doc = r"Clears the field bit"]
455 #[inline(always)]
456 pub fn clear_bit(self) -> &'a mut W {
457 self.bit(false)
458 }
459 #[doc = r"Writes raw bits to the field"]
460 #[inline(always)]
461 pub fn bit(self, value: bool) -> &'a mut W {
462 self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
463 self.w
464 }
465}
466#[doc = "Reader of field `SCMODE`"]
467pub type SCMODE_R = crate::R<bool, bool>;
468#[doc = "Write proxy for field `SCMODE`"]
469pub struct SCMODE_W<'a> {
470 w: &'a mut W,
471}
472impl<'a> SCMODE_W<'a> {
473 #[doc = r"Sets the field bit"]
474 #[inline(always)]
475 pub fn set_bit(self) -> &'a mut W {
476 self.bit(true)
477 }
478 #[doc = r"Clears the field bit"]
479 #[inline(always)]
480 pub fn clear_bit(self) -> &'a mut W {
481 self.bit(false)
482 }
483 #[doc = r"Writes raw bits to the field"]
484 #[inline(always)]
485 pub fn bit(self, value: bool) -> &'a mut W {
486 self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
487 self.w
488 }
489}
490#[doc = "Reader of field `SCRETRANS`"]
491pub type SCRETRANS_R = crate::R<bool, bool>;
492#[doc = "Write proxy for field `SCRETRANS`"]
493pub struct SCRETRANS_W<'a> {
494 w: &'a mut W,
495}
496impl<'a> SCRETRANS_W<'a> {
497 #[doc = r"Sets the field bit"]
498 #[inline(always)]
499 pub fn set_bit(self) -> &'a mut W {
500 self.bit(true)
501 }
502 #[doc = r"Clears the field bit"]
503 #[inline(always)]
504 pub fn clear_bit(self) -> &'a mut W {
505 self.bit(false)
506 }
507 #[doc = r"Writes raw bits to the field"]
508 #[inline(always)]
509 pub fn bit(self, value: bool) -> &'a mut W {
510 self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
511 self.w
512 }
513}
514#[doc = "Reader of field `SKIPPERRF`"]
515pub type SKIPPERRF_R = crate::R<bool, bool>;
516#[doc = "Write proxy for field `SKIPPERRF`"]
517pub struct SKIPPERRF_W<'a> {
518 w: &'a mut W,
519}
520impl<'a> SKIPPERRF_W<'a> {
521 #[doc = r"Sets the field bit"]
522 #[inline(always)]
523 pub fn set_bit(self) -> &'a mut W {
524 self.bit(true)
525 }
526 #[doc = r"Clears the field bit"]
527 #[inline(always)]
528 pub fn clear_bit(self) -> &'a mut W {
529 self.bit(false)
530 }
531 #[doc = r"Writes raw bits to the field"]
532 #[inline(always)]
533 pub fn bit(self, value: bool) -> &'a mut W {
534 self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
535 self.w
536 }
537}
538#[doc = "Reader of field `BIT8DV`"]
539pub type BIT8DV_R = crate::R<bool, bool>;
540#[doc = "Write proxy for field `BIT8DV`"]
541pub struct BIT8DV_W<'a> {
542 w: &'a mut W,
543}
544impl<'a> BIT8DV_W<'a> {
545 #[doc = r"Sets the field bit"]
546 #[inline(always)]
547 pub fn set_bit(self) -> &'a mut W {
548 self.bit(true)
549 }
550 #[doc = r"Clears the field bit"]
551 #[inline(always)]
552 pub fn clear_bit(self) -> &'a mut W {
553 self.bit(false)
554 }
555 #[doc = r"Writes raw bits to the field"]
556 #[inline(always)]
557 pub fn bit(self, value: bool) -> &'a mut W {
558 self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
559 self.w
560 }
561}
562#[doc = "Reader of field `ERRSDMA`"]
563pub type ERRSDMA_R = crate::R<bool, bool>;
564#[doc = "Write proxy for field `ERRSDMA`"]
565pub struct ERRSDMA_W<'a> {
566 w: &'a mut W,
567}
568impl<'a> ERRSDMA_W<'a> {
569 #[doc = r"Sets the field bit"]
570 #[inline(always)]
571 pub fn set_bit(self) -> &'a mut W {
572 self.bit(true)
573 }
574 #[doc = r"Clears the field bit"]
575 #[inline(always)]
576 pub fn clear_bit(self) -> &'a mut W {
577 self.bit(false)
578 }
579 #[doc = r"Writes raw bits to the field"]
580 #[inline(always)]
581 pub fn bit(self, value: bool) -> &'a mut W {
582 self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
583 self.w
584 }
585}
586#[doc = "Reader of field `ERRSRX`"]
587pub type ERRSRX_R = crate::R<bool, bool>;
588#[doc = "Write proxy for field `ERRSRX`"]
589pub struct ERRSRX_W<'a> {
590 w: &'a mut W,
591}
592impl<'a> ERRSRX_W<'a> {
593 #[doc = r"Sets the field bit"]
594 #[inline(always)]
595 pub fn set_bit(self) -> &'a mut W {
596 self.bit(true)
597 }
598 #[doc = r"Clears the field bit"]
599 #[inline(always)]
600 pub fn clear_bit(self) -> &'a mut W {
601 self.bit(false)
602 }
603 #[doc = r"Writes raw bits to the field"]
604 #[inline(always)]
605 pub fn bit(self, value: bool) -> &'a mut W {
606 self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
607 self.w
608 }
609}
610#[doc = "Reader of field `ERRSTX`"]
611pub type ERRSTX_R = crate::R<bool, bool>;
612#[doc = "Write proxy for field `ERRSTX`"]
613pub struct ERRSTX_W<'a> {
614 w: &'a mut W,
615}
616impl<'a> ERRSTX_W<'a> {
617 #[doc = r"Sets the field bit"]
618 #[inline(always)]
619 pub fn set_bit(self) -> &'a mut W {
620 self.bit(true)
621 }
622 #[doc = r"Clears the field bit"]
623 #[inline(always)]
624 pub fn clear_bit(self) -> &'a mut W {
625 self.bit(false)
626 }
627 #[doc = r"Writes raw bits to the field"]
628 #[inline(always)]
629 pub fn bit(self, value: bool) -> &'a mut W {
630 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
631 self.w
632 }
633}
634#[doc = "Reader of field `SSSEARLY`"]
635pub type SSSEARLY_R = crate::R<bool, bool>;
636#[doc = "Write proxy for field `SSSEARLY`"]
637pub struct SSSEARLY_W<'a> {
638 w: &'a mut W,
639}
640impl<'a> SSSEARLY_W<'a> {
641 #[doc = r"Sets the field bit"]
642 #[inline(always)]
643 pub fn set_bit(self) -> &'a mut W {
644 self.bit(true)
645 }
646 #[doc = r"Clears the field bit"]
647 #[inline(always)]
648 pub fn clear_bit(self) -> &'a mut W {
649 self.bit(false)
650 }
651 #[doc = r"Writes raw bits to the field"]
652 #[inline(always)]
653 pub fn bit(self, value: bool) -> &'a mut W {
654 self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
655 self.w
656 }
657}
658#[doc = "Reader of field `BYTESWAP`"]
659pub type BYTESWAP_R = crate::R<bool, bool>;
660#[doc = "Write proxy for field `BYTESWAP`"]
661pub struct BYTESWAP_W<'a> {
662 w: &'a mut W,
663}
664impl<'a> BYTESWAP_W<'a> {
665 #[doc = r"Sets the field bit"]
666 #[inline(always)]
667 pub fn set_bit(self) -> &'a mut W {
668 self.bit(true)
669 }
670 #[doc = r"Clears the field bit"]
671 #[inline(always)]
672 pub fn clear_bit(self) -> &'a mut W {
673 self.bit(false)
674 }
675 #[doc = r"Writes raw bits to the field"]
676 #[inline(always)]
677 pub fn bit(self, value: bool) -> &'a mut W {
678 self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
679 self.w
680 }
681}
682#[doc = "Reader of field `AUTOTX`"]
683pub type AUTOTX_R = crate::R<bool, bool>;
684#[doc = "Write proxy for field `AUTOTX`"]
685pub struct AUTOTX_W<'a> {
686 w: &'a mut W,
687}
688impl<'a> AUTOTX_W<'a> {
689 #[doc = r"Sets the field bit"]
690 #[inline(always)]
691 pub fn set_bit(self) -> &'a mut W {
692 self.bit(true)
693 }
694 #[doc = r"Clears the field bit"]
695 #[inline(always)]
696 pub fn clear_bit(self) -> &'a mut W {
697 self.bit(false)
698 }
699 #[doc = r"Writes raw bits to the field"]
700 #[inline(always)]
701 pub fn bit(self, value: bool) -> &'a mut W {
702 self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
703 self.w
704 }
705}
706#[doc = "Reader of field `MVDIS`"]
707pub type MVDIS_R = crate::R<bool, bool>;
708#[doc = "Write proxy for field `MVDIS`"]
709pub struct MVDIS_W<'a> {
710 w: &'a mut W,
711}
712impl<'a> MVDIS_W<'a> {
713 #[doc = r"Sets the field bit"]
714 #[inline(always)]
715 pub fn set_bit(self) -> &'a mut W {
716 self.bit(true)
717 }
718 #[doc = r"Clears the field bit"]
719 #[inline(always)]
720 pub fn clear_bit(self) -> &'a mut W {
721 self.bit(false)
722 }
723 #[doc = r"Writes raw bits to the field"]
724 #[inline(always)]
725 pub fn bit(self, value: bool) -> &'a mut W {
726 self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
727 self.w
728 }
729}
730#[doc = "Reader of field `SMSDELAY`"]
731pub type SMSDELAY_R = crate::R<bool, bool>;
732#[doc = "Write proxy for field `SMSDELAY`"]
733pub struct SMSDELAY_W<'a> {
734 w: &'a mut W,
735}
736impl<'a> SMSDELAY_W<'a> {
737 #[doc = r"Sets the field bit"]
738 #[inline(always)]
739 pub fn set_bit(self) -> &'a mut W {
740 self.bit(true)
741 }
742 #[doc = r"Clears the field bit"]
743 #[inline(always)]
744 pub fn clear_bit(self) -> &'a mut W {
745 self.bit(false)
746 }
747 #[doc = r"Writes raw bits to the field"]
748 #[inline(always)]
749 pub fn bit(self, value: bool) -> &'a mut W {
750 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
751 self.w
752 }
753}
754impl R {
755 #[doc = "Bit 0 - USART Synchronous Mode"]
756 #[inline(always)]
757 pub fn sync(&self) -> SYNC_R {
758 SYNC_R::new((self.bits & 0x01) != 0)
759 }
760 #[doc = "Bit 1 - Loopback Enable"]
761 #[inline(always)]
762 pub fn loopbk(&self) -> LOOPBK_R {
763 LOOPBK_R::new(((self.bits >> 1) & 0x01) != 0)
764 }
765 #[doc = "Bit 2 - Collision Check Enable"]
766 #[inline(always)]
767 pub fn ccen(&self) -> CCEN_R {
768 CCEN_R::new(((self.bits >> 2) & 0x01) != 0)
769 }
770 #[doc = "Bit 3 - Multi-Processor Mode"]
771 #[inline(always)]
772 pub fn mpm(&self) -> MPM_R {
773 MPM_R::new(((self.bits >> 3) & 0x01) != 0)
774 }
775 #[doc = "Bit 4 - Multi-Processor Address-Bit"]
776 #[inline(always)]
777 pub fn mpab(&self) -> MPAB_R {
778 MPAB_R::new(((self.bits >> 4) & 0x01) != 0)
779 }
780 #[doc = "Bits 5:6 - Oversampling"]
781 #[inline(always)]
782 pub fn ovs(&self) -> OVS_R {
783 OVS_R::new(((self.bits >> 5) & 0x03) as u8)
784 }
785 #[doc = "Bit 8 - Clock Polarity"]
786 #[inline(always)]
787 pub fn clkpol(&self) -> CLKPOL_R {
788 CLKPOL_R::new(((self.bits >> 8) & 0x01) != 0)
789 }
790 #[doc = "Bit 9 - Clock Edge for Setup/Sample"]
791 #[inline(always)]
792 pub fn clkpha(&self) -> CLKPHA_R {
793 CLKPHA_R::new(((self.bits >> 9) & 0x01) != 0)
794 }
795 #[doc = "Bit 10 - Most Significant Bit First"]
796 #[inline(always)]
797 pub fn msbf(&self) -> MSBF_R {
798 MSBF_R::new(((self.bits >> 10) & 0x01) != 0)
799 }
800 #[doc = "Bit 11 - Action on Slave-Select in Master Mode"]
801 #[inline(always)]
802 pub fn csma(&self) -> CSMA_R {
803 CSMA_R::new(((self.bits >> 11) & 0x01) != 0)
804 }
805 #[doc = "Bit 12 - TX Buffer Interrupt Level"]
806 #[inline(always)]
807 pub fn txbil(&self) -> TXBIL_R {
808 TXBIL_R::new(((self.bits >> 12) & 0x01) != 0)
809 }
810 #[doc = "Bit 13 - Receiver Input Invert"]
811 #[inline(always)]
812 pub fn rxinv(&self) -> RXINV_R {
813 RXINV_R::new(((self.bits >> 13) & 0x01) != 0)
814 }
815 #[doc = "Bit 14 - Transmitter Output Invert"]
816 #[inline(always)]
817 pub fn txinv(&self) -> TXINV_R {
818 TXINV_R::new(((self.bits >> 14) & 0x01) != 0)
819 }
820 #[doc = "Bit 15 - Chip Select Invert"]
821 #[inline(always)]
822 pub fn csinv(&self) -> CSINV_R {
823 CSINV_R::new(((self.bits >> 15) & 0x01) != 0)
824 }
825 #[doc = "Bit 16 - Automatic Chip Select"]
826 #[inline(always)]
827 pub fn autocs(&self) -> AUTOCS_R {
828 AUTOCS_R::new(((self.bits >> 16) & 0x01) != 0)
829 }
830 #[doc = "Bit 17 - Automatic TX Tristate"]
831 #[inline(always)]
832 pub fn autotri(&self) -> AUTOTRI_R {
833 AUTOTRI_R::new(((self.bits >> 17) & 0x01) != 0)
834 }
835 #[doc = "Bit 18 - SmartCard Mode"]
836 #[inline(always)]
837 pub fn scmode(&self) -> SCMODE_R {
838 SCMODE_R::new(((self.bits >> 18) & 0x01) != 0)
839 }
840 #[doc = "Bit 19 - SmartCard Retransmit"]
841 #[inline(always)]
842 pub fn scretrans(&self) -> SCRETRANS_R {
843 SCRETRANS_R::new(((self.bits >> 19) & 0x01) != 0)
844 }
845 #[doc = "Bit 20 - Skip Parity Error Frames"]
846 #[inline(always)]
847 pub fn skipperrf(&self) -> SKIPPERRF_R {
848 SKIPPERRF_R::new(((self.bits >> 20) & 0x01) != 0)
849 }
850 #[doc = "Bit 21 - Bit 8 Default Value"]
851 #[inline(always)]
852 pub fn bit8dv(&self) -> BIT8DV_R {
853 BIT8DV_R::new(((self.bits >> 21) & 0x01) != 0)
854 }
855 #[doc = "Bit 22 - Halt DMA on Error"]
856 #[inline(always)]
857 pub fn errsdma(&self) -> ERRSDMA_R {
858 ERRSDMA_R::new(((self.bits >> 22) & 0x01) != 0)
859 }
860 #[doc = "Bit 23 - Disable RX on Error"]
861 #[inline(always)]
862 pub fn errsrx(&self) -> ERRSRX_R {
863 ERRSRX_R::new(((self.bits >> 23) & 0x01) != 0)
864 }
865 #[doc = "Bit 24 - Disable TX on Error"]
866 #[inline(always)]
867 pub fn errstx(&self) -> ERRSTX_R {
868 ERRSTX_R::new(((self.bits >> 24) & 0x01) != 0)
869 }
870 #[doc = "Bit 25 - Synchronous Slave Setup Early"]
871 #[inline(always)]
872 pub fn sssearly(&self) -> SSSEARLY_R {
873 SSSEARLY_R::new(((self.bits >> 25) & 0x01) != 0)
874 }
875 #[doc = "Bit 28 - Byteswap in Double Accesses"]
876 #[inline(always)]
877 pub fn byteswap(&self) -> BYTESWAP_R {
878 BYTESWAP_R::new(((self.bits >> 28) & 0x01) != 0)
879 }
880 #[doc = "Bit 29 - Always Transmit When RX Not Full"]
881 #[inline(always)]
882 pub fn autotx(&self) -> AUTOTX_R {
883 AUTOTX_R::new(((self.bits >> 29) & 0x01) != 0)
884 }
885 #[doc = "Bit 30 - Majority Vote Disable"]
886 #[inline(always)]
887 pub fn mvdis(&self) -> MVDIS_R {
888 MVDIS_R::new(((self.bits >> 30) & 0x01) != 0)
889 }
890 #[doc = "Bit 31 - Synchronous Master Sample Delay"]
891 #[inline(always)]
892 pub fn smsdelay(&self) -> SMSDELAY_R {
893 SMSDELAY_R::new(((self.bits >> 31) & 0x01) != 0)
894 }
895}
896impl W {
897 #[doc = "Bit 0 - USART Synchronous Mode"]
898 #[inline(always)]
899 pub fn sync(&mut self) -> SYNC_W {
900 SYNC_W { w: self }
901 }
902 #[doc = "Bit 1 - Loopback Enable"]
903 #[inline(always)]
904 pub fn loopbk(&mut self) -> LOOPBK_W {
905 LOOPBK_W { w: self }
906 }
907 #[doc = "Bit 2 - Collision Check Enable"]
908 #[inline(always)]
909 pub fn ccen(&mut self) -> CCEN_W {
910 CCEN_W { w: self }
911 }
912 #[doc = "Bit 3 - Multi-Processor Mode"]
913 #[inline(always)]
914 pub fn mpm(&mut self) -> MPM_W {
915 MPM_W { w: self }
916 }
917 #[doc = "Bit 4 - Multi-Processor Address-Bit"]
918 #[inline(always)]
919 pub fn mpab(&mut self) -> MPAB_W {
920 MPAB_W { w: self }
921 }
922 #[doc = "Bits 5:6 - Oversampling"]
923 #[inline(always)]
924 pub fn ovs(&mut self) -> OVS_W {
925 OVS_W { w: self }
926 }
927 #[doc = "Bit 8 - Clock Polarity"]
928 #[inline(always)]
929 pub fn clkpol(&mut self) -> CLKPOL_W {
930 CLKPOL_W { w: self }
931 }
932 #[doc = "Bit 9 - Clock Edge for Setup/Sample"]
933 #[inline(always)]
934 pub fn clkpha(&mut self) -> CLKPHA_W {
935 CLKPHA_W { w: self }
936 }
937 #[doc = "Bit 10 - Most Significant Bit First"]
938 #[inline(always)]
939 pub fn msbf(&mut self) -> MSBF_W {
940 MSBF_W { w: self }
941 }
942 #[doc = "Bit 11 - Action on Slave-Select in Master Mode"]
943 #[inline(always)]
944 pub fn csma(&mut self) -> CSMA_W {
945 CSMA_W { w: self }
946 }
947 #[doc = "Bit 12 - TX Buffer Interrupt Level"]
948 #[inline(always)]
949 pub fn txbil(&mut self) -> TXBIL_W {
950 TXBIL_W { w: self }
951 }
952 #[doc = "Bit 13 - Receiver Input Invert"]
953 #[inline(always)]
954 pub fn rxinv(&mut self) -> RXINV_W {
955 RXINV_W { w: self }
956 }
957 #[doc = "Bit 14 - Transmitter Output Invert"]
958 #[inline(always)]
959 pub fn txinv(&mut self) -> TXINV_W {
960 TXINV_W { w: self }
961 }
962 #[doc = "Bit 15 - Chip Select Invert"]
963 #[inline(always)]
964 pub fn csinv(&mut self) -> CSINV_W {
965 CSINV_W { w: self }
966 }
967 #[doc = "Bit 16 - Automatic Chip Select"]
968 #[inline(always)]
969 pub fn autocs(&mut self) -> AUTOCS_W {
970 AUTOCS_W { w: self }
971 }
972 #[doc = "Bit 17 - Automatic TX Tristate"]
973 #[inline(always)]
974 pub fn autotri(&mut self) -> AUTOTRI_W {
975 AUTOTRI_W { w: self }
976 }
977 #[doc = "Bit 18 - SmartCard Mode"]
978 #[inline(always)]
979 pub fn scmode(&mut self) -> SCMODE_W {
980 SCMODE_W { w: self }
981 }
982 #[doc = "Bit 19 - SmartCard Retransmit"]
983 #[inline(always)]
984 pub fn scretrans(&mut self) -> SCRETRANS_W {
985 SCRETRANS_W { w: self }
986 }
987 #[doc = "Bit 20 - Skip Parity Error Frames"]
988 #[inline(always)]
989 pub fn skipperrf(&mut self) -> SKIPPERRF_W {
990 SKIPPERRF_W { w: self }
991 }
992 #[doc = "Bit 21 - Bit 8 Default Value"]
993 #[inline(always)]
994 pub fn bit8dv(&mut self) -> BIT8DV_W {
995 BIT8DV_W { w: self }
996 }
997 #[doc = "Bit 22 - Halt DMA on Error"]
998 #[inline(always)]
999 pub fn errsdma(&mut self) -> ERRSDMA_W {
1000 ERRSDMA_W { w: self }
1001 }
1002 #[doc = "Bit 23 - Disable RX on Error"]
1003 #[inline(always)]
1004 pub fn errsrx(&mut self) -> ERRSRX_W {
1005 ERRSRX_W { w: self }
1006 }
1007 #[doc = "Bit 24 - Disable TX on Error"]
1008 #[inline(always)]
1009 pub fn errstx(&mut self) -> ERRSTX_W {
1010 ERRSTX_W { w: self }
1011 }
1012 #[doc = "Bit 25 - Synchronous Slave Setup Early"]
1013 #[inline(always)]
1014 pub fn sssearly(&mut self) -> SSSEARLY_W {
1015 SSSEARLY_W { w: self }
1016 }
1017 #[doc = "Bit 28 - Byteswap in Double Accesses"]
1018 #[inline(always)]
1019 pub fn byteswap(&mut self) -> BYTESWAP_W {
1020 BYTESWAP_W { w: self }
1021 }
1022 #[doc = "Bit 29 - Always Transmit When RX Not Full"]
1023 #[inline(always)]
1024 pub fn autotx(&mut self) -> AUTOTX_W {
1025 AUTOTX_W { w: self }
1026 }
1027 #[doc = "Bit 30 - Majority Vote Disable"]
1028 #[inline(always)]
1029 pub fn mvdis(&mut self) -> MVDIS_W {
1030 MVDIS_W { w: self }
1031 }
1032 #[doc = "Bit 31 - Synchronous Master Sample Delay"]
1033 #[inline(always)]
1034 pub fn smsdelay(&mut self) -> SMSDELAY_W {
1035 SMSDELAY_W { w: self }
1036 }
1037}