Struct efm32gg11b820::lesense::decctrl::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn disable(&mut self) -> _DISABLEW

Bit 0 - Disable the Decoder

pub fn errchk(&mut self) -> _ERRCHKW

Bit 1 - Enable Check of Current State

pub fn intmap(&mut self) -> _INTMAPW

Bit 2 - Enable Decoder to Channel Interrupt Mapping

pub fn hystprs0(&mut self) -> _HYSTPRS0W

Bit 3 - Enable Decoder Hysteresis on PRS0 Output

pub fn hystprs1(&mut self) -> _HYSTPRS1W

Bit 4 - Enable Decoder Hysteresis on PRS1 Output

pub fn hystprs2(&mut self) -> _HYSTPRS2W

Bit 5 - Enable Decoder Hysteresis on PRS2 Output

pub fn hystirq(&mut self) -> _HYSTIRQW

Bit 6 - Enable Decoder Hysteresis on Interrupt Requests

pub fn prscnt(&mut self) -> _PRSCNTW

Bit 7 - Enable Count Mode on Decoder PRS Channels 0 and 1

pub fn input(&mut self) -> _INPUTW

Bit 8 - LESENSE Decoder Input Configuration

pub fn prssel0(&mut self) -> _PRSSEL0W

Bits 10:14 - LESENSE Decoder PRS Input 0 Configuration

pub fn prssel1(&mut self) -> _PRSSEL1W

Bits 15:19 - LESENSE Decoder PRS Input 1 Configuration

pub fn prssel2(&mut self) -> _PRSSEL2W

Bits 20:24 - LESENSE Decoder PRS Input 2 Configuration

pub fn prssel3(&mut self) -> _PRSSEL3W

Bits 25:29 - LESENSE Decoder PRS Input 3 Configuration