efm32gg11b820_pac/timer6/
routepen.rs

1#[doc = "Register `ROUTEPEN` reader"]
2pub struct R(crate::R<ROUTEPEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTEPEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTEPEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTEPEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTEPEN` writer"]
17pub struct W(crate::W<ROUTEPEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTEPEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTEPEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTEPEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CC0PEN` reader - CC Channel 0 Pin Enable"]
38pub type CC0PEN_R = crate::BitReader<bool>;
39#[doc = "Field `CC0PEN` writer - CC Channel 0 Pin Enable"]
40pub type CC0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 0>;
41#[doc = "Field `CC1PEN` reader - CC Channel 1 Pin Enable"]
42pub type CC1PEN_R = crate::BitReader<bool>;
43#[doc = "Field `CC1PEN` writer - CC Channel 1 Pin Enable"]
44pub type CC1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 1>;
45#[doc = "Field `CC2PEN` reader - CC Channel 2 Pin Enable"]
46pub type CC2PEN_R = crate::BitReader<bool>;
47#[doc = "Field `CC2PEN` writer - CC Channel 2 Pin Enable"]
48pub type CC2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 2>;
49#[doc = "Field `CC3PEN` reader - CC Channel 3 Pin Enable"]
50pub type CC3PEN_R = crate::BitReader<bool>;
51#[doc = "Field `CC3PEN` writer - CC Channel 3 Pin Enable"]
52pub type CC3PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 3>;
53#[doc = "Field `CDTI0PEN` reader - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
54pub type CDTI0PEN_R = crate::BitReader<bool>;
55#[doc = "Field `CDTI0PEN` writer - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
56pub type CDTI0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 8>;
57#[doc = "Field `CDTI1PEN` reader - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
58pub type CDTI1PEN_R = crate::BitReader<bool>;
59#[doc = "Field `CDTI1PEN` writer - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
60pub type CDTI1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 9>;
61#[doc = "Field `CDTI2PEN` reader - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
62pub type CDTI2PEN_R = crate::BitReader<bool>;
63#[doc = "Field `CDTI2PEN` writer - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
64pub type CDTI2PEN_W<'a> = crate::BitWriter<'a, u32, ROUTEPEN_SPEC, bool, 10>;
65impl R {
66    #[doc = "Bit 0 - CC Channel 0 Pin Enable"]
67    #[inline(always)]
68    pub fn cc0pen(&self) -> CC0PEN_R {
69        CC0PEN_R::new((self.bits & 1) != 0)
70    }
71    #[doc = "Bit 1 - CC Channel 1 Pin Enable"]
72    #[inline(always)]
73    pub fn cc1pen(&self) -> CC1PEN_R {
74        CC1PEN_R::new(((self.bits >> 1) & 1) != 0)
75    }
76    #[doc = "Bit 2 - CC Channel 2 Pin Enable"]
77    #[inline(always)]
78    pub fn cc2pen(&self) -> CC2PEN_R {
79        CC2PEN_R::new(((self.bits >> 2) & 1) != 0)
80    }
81    #[doc = "Bit 3 - CC Channel 3 Pin Enable"]
82    #[inline(always)]
83    pub fn cc3pen(&self) -> CC3PEN_R {
84        CC3PEN_R::new(((self.bits >> 3) & 1) != 0)
85    }
86    #[doc = "Bit 8 - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
87    #[inline(always)]
88    pub fn cdti0pen(&self) -> CDTI0PEN_R {
89        CDTI0PEN_R::new(((self.bits >> 8) & 1) != 0)
90    }
91    #[doc = "Bit 9 - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
92    #[inline(always)]
93    pub fn cdti1pen(&self) -> CDTI1PEN_R {
94        CDTI1PEN_R::new(((self.bits >> 9) & 1) != 0)
95    }
96    #[doc = "Bit 10 - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
97    #[inline(always)]
98    pub fn cdti2pen(&self) -> CDTI2PEN_R {
99        CDTI2PEN_R::new(((self.bits >> 10) & 1) != 0)
100    }
101}
102impl W {
103    #[doc = "Bit 0 - CC Channel 0 Pin Enable"]
104    #[inline(always)]
105    pub fn cc0pen(&mut self) -> CC0PEN_W {
106        CC0PEN_W::new(self)
107    }
108    #[doc = "Bit 1 - CC Channel 1 Pin Enable"]
109    #[inline(always)]
110    pub fn cc1pen(&mut self) -> CC1PEN_W {
111        CC1PEN_W::new(self)
112    }
113    #[doc = "Bit 2 - CC Channel 2 Pin Enable"]
114    #[inline(always)]
115    pub fn cc2pen(&mut self) -> CC2PEN_W {
116        CC2PEN_W::new(self)
117    }
118    #[doc = "Bit 3 - CC Channel 3 Pin Enable"]
119    #[inline(always)]
120    pub fn cc3pen(&mut self) -> CC3PEN_W {
121        CC3PEN_W::new(self)
122    }
123    #[doc = "Bit 8 - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"]
124    #[inline(always)]
125    pub fn cdti0pen(&mut self) -> CDTI0PEN_W {
126        CDTI0PEN_W::new(self)
127    }
128    #[doc = "Bit 9 - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"]
129    #[inline(always)]
130    pub fn cdti1pen(&mut self) -> CDTI1PEN_W {
131        CDTI1PEN_W::new(self)
132    }
133    #[doc = "Bit 10 - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"]
134    #[inline(always)]
135    pub fn cdti2pen(&mut self) -> CDTI2PEN_W {
136        CDTI2PEN_W::new(self)
137    }
138    #[doc = "Writes raw bits to the register."]
139    #[inline(always)]
140    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
141        self.0.bits(bits);
142        self
143    }
144}
145#[doc = "I/O Routing Pin Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [routepen](index.html) module"]
146pub struct ROUTEPEN_SPEC;
147impl crate::RegisterSpec for ROUTEPEN_SPEC {
148    type Ux = u32;
149}
150#[doc = "`read()` method returns [routepen::R](R) reader structure"]
151impl crate::Readable for ROUTEPEN_SPEC {
152    type Reader = R;
153}
154#[doc = "`write(|w| ..)` method takes [routepen::W](W) writer structure"]
155impl crate::Writable for ROUTEPEN_SPEC {
156    type Writer = W;
157}
158#[doc = "`reset()` method sets ROUTEPEN to value 0"]
159impl crate::Resettable for ROUTEPEN_SPEC {
160    #[inline(always)]
161    fn reset_value() -> Self::Ux {
162        0
163    }
164}
efm32gg11b820_pac/timer6/routepen.rs

efm32gg11b820_pac/timer6/
routepen.rs
