efm32gg11b820_pac/ldma/
ch5_link.rs

1#[doc = "Register `CH5_LINK` reader"]
2pub struct R(crate::R<CH5_LINK_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH5_LINK_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH5_LINK_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH5_LINK_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH5_LINK` writer"]
17pub struct W(crate::W<CH5_LINK_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH5_LINK_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH5_LINK_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH5_LINK_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `LINKMODE` reader - Link Structure Addressing Mode"]
38pub type LINKMODE_R = crate::BitReader<bool>;
39#[doc = "Field `LINK` reader - Link Next Structure"]
40pub type LINK_R = crate::BitReader<bool>;
41#[doc = "Field `LINK` writer - Link Next Structure"]
42pub type LINK_W<'a> = crate::BitWriter<'a, u32, CH5_LINK_SPEC, bool, 1>;
43#[doc = "Field `LINKADDR` reader - Link Structure Address"]
44pub type LINKADDR_R = crate::FieldReader<u32, u32>;
45#[doc = "Field `LINKADDR` writer - Link Structure Address"]
46pub type LINKADDR_W<'a> = crate::FieldWriter<'a, u32, CH5_LINK_SPEC, u32, u32, 30, 2>;
47impl R {
48    #[doc = "Bit 0 - Link Structure Addressing Mode"]
49    #[inline(always)]
50    pub fn linkmode(&self) -> LINKMODE_R {
51        LINKMODE_R::new((self.bits & 1) != 0)
52    }
53    #[doc = "Bit 1 - Link Next Structure"]
54    #[inline(always)]
55    pub fn link(&self) -> LINK_R {
56        LINK_R::new(((self.bits >> 1) & 1) != 0)
57    }
58    #[doc = "Bits 2:31 - Link Structure Address"]
59    #[inline(always)]
60    pub fn linkaddr(&self) -> LINKADDR_R {
61        LINKADDR_R::new(((self.bits >> 2) & 0x3fff_ffff) as u32)
62    }
63}
64impl W {
65    #[doc = "Bit 1 - Link Next Structure"]
66    #[inline(always)]
67    pub fn link(&mut self) -> LINK_W {
68        LINK_W::new(self)
69    }
70    #[doc = "Bits 2:31 - Link Structure Address"]
71    #[inline(always)]
72    pub fn linkaddr(&mut self) -> LINKADDR_W {
73        LINKADDR_W::new(self)
74    }
75    #[doc = "Writes raw bits to the register."]
76    #[inline(always)]
77    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
78        self.0.bits(bits);
79        self
80    }
81}
82#[doc = "Channel Descriptor Link Structure Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5_link](index.html) module"]
83pub struct CH5_LINK_SPEC;
84impl crate::RegisterSpec for CH5_LINK_SPEC {
85    type Ux = u32;
86}
87#[doc = "`read()` method returns [ch5_link::R](R) reader structure"]
88impl crate::Readable for CH5_LINK_SPEC {
89    type Reader = R;
90}
91#[doc = "`write(|w| ..)` method takes [ch5_link::W](W) writer structure"]
92impl crate::Writable for CH5_LINK_SPEC {
93    type Writer = W;
94}
95#[doc = "`reset()` method sets CH5_LINK to value 0"]
96impl crate::Resettable for CH5_LINK_SPEC {
97    #[inline(always)]
98    fn reset_value() -> Self::Ux {
99        0
100    }
101}
efm32gg11b820_pac/ldma/ch5_link.rs

efm32gg11b820_pac/ldma/
ch5_link.rs
