efm32gg11b510_pac/vdac0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DIFF` reader - Differential Mode"]
38pub type DIFF_R = crate::BitReader<bool>;
39#[doc = "Field `DIFF` writer - Differential Mode"]
40pub type DIFF_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 0>;
41#[doc = "Field `SINEMODE` reader - Sine Mode"]
42pub type SINEMODE_R = crate::BitReader<bool>;
43#[doc = "Field `SINEMODE` writer - Sine Mode"]
44pub type SINEMODE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
45#[doc = "Field `OUTENPRS` reader - PRS Controlled Output Enable"]
46pub type OUTENPRS_R = crate::BitReader<bool>;
47#[doc = "Field `OUTENPRS` writer - PRS Controlled Output Enable"]
48pub type OUTENPRS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 5>;
49#[doc = "Field `CH0PRESCRST` reader - Channel 0 Start Reset Prescaler"]
50pub type CH0PRESCRST_R = crate::BitReader<bool>;
51#[doc = "Field `CH0PRESCRST` writer - Channel 0 Start Reset Prescaler"]
52pub type CH0PRESCRST_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 6>;
53#[doc = "Reference Selection\n\nValue on reset: 0"]
54#[derive(Clone, Copy, Debug, PartialEq)]
55#[repr(u8)]
56pub enum REFSEL_A {
57    #[doc = "0: Internal low noise 1.25 V bandgap reference"]
58    _1V25LN = 0,
59    #[doc = "1: Internal low noise 2.5 V bandgap reference"]
60    _2V5LN = 1,
61    #[doc = "2: Internal 1.25 V bandgap reference"]
62    _1V25 = 2,
63    #[doc = "3: Internal 2.5 V bandgap reference"]
64    _2V5 = 3,
65    #[doc = "4: AVDD reference"]
66    VDD = 4,
67    #[doc = "6: External pin reference"]
68    EXT = 6,
69}
70impl From<REFSEL_A> for u8 {
71    #[inline(always)]
72    fn from(variant: REFSEL_A) -> Self {
73        variant as _
74    }
75}
76#[doc = "Field `REFSEL` reader - Reference Selection"]
77pub type REFSEL_R = crate::FieldReader<u8, REFSEL_A>;
78impl REFSEL_R {
79    #[doc = "Get enumerated values variant"]
80    #[inline(always)]
81    pub fn variant(&self) -> Option<REFSEL_A> {
82        match self.bits {
83            0 => Some(REFSEL_A::_1V25LN),
84            1 => Some(REFSEL_A::_2V5LN),
85            2 => Some(REFSEL_A::_1V25),
86            3 => Some(REFSEL_A::_2V5),
87            4 => Some(REFSEL_A::VDD),
88            6 => Some(REFSEL_A::EXT),
89            _ => None,
90        }
91    }
92    #[doc = "Checks if the value of the field is `_1V25LN`"]
93    #[inline(always)]
94    pub fn is_1v25ln(&self) -> bool {
95        *self == REFSEL_A::_1V25LN
96    }
97    #[doc = "Checks if the value of the field is `_2V5LN`"]
98    #[inline(always)]
99    pub fn is_2v5ln(&self) -> bool {
100        *self == REFSEL_A::_2V5LN
101    }
102    #[doc = "Checks if the value of the field is `_1V25`"]
103    #[inline(always)]
104    pub fn is_1v25(&self) -> bool {
105        *self == REFSEL_A::_1V25
106    }
107    #[doc = "Checks if the value of the field is `_2V5`"]
108    #[inline(always)]
109    pub fn is_2v5(&self) -> bool {
110        *self == REFSEL_A::_2V5
111    }
112    #[doc = "Checks if the value of the field is `VDD`"]
113    #[inline(always)]
114    pub fn is_vdd(&self) -> bool {
115        *self == REFSEL_A::VDD
116    }
117    #[doc = "Checks if the value of the field is `EXT`"]
118    #[inline(always)]
119    pub fn is_ext(&self) -> bool {
120        *self == REFSEL_A::EXT
121    }
122}
123#[doc = "Field `REFSEL` writer - Reference Selection"]
124pub type REFSEL_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, REFSEL_A, 3, 8>;
125impl<'a> REFSEL_W<'a> {
126    #[doc = "Internal low noise 1.25 V bandgap reference"]
127    #[inline(always)]
128    pub fn _1v25ln(self) -> &'a mut W {
129        self.variant(REFSEL_A::_1V25LN)
130    }
131    #[doc = "Internal low noise 2.5 V bandgap reference"]
132    #[inline(always)]
133    pub fn _2v5ln(self) -> &'a mut W {
134        self.variant(REFSEL_A::_2V5LN)
135    }
136    #[doc = "Internal 1.25 V bandgap reference"]
137    #[inline(always)]
138    pub fn _1v25(self) -> &'a mut W {
139        self.variant(REFSEL_A::_1V25)
140    }
141    #[doc = "Internal 2.5 V bandgap reference"]
142    #[inline(always)]
143    pub fn _2v5(self) -> &'a mut W {
144        self.variant(REFSEL_A::_2V5)
145    }
146    #[doc = "AVDD reference"]
147    #[inline(always)]
148    pub fn vdd(self) -> &'a mut W {
149        self.variant(REFSEL_A::VDD)
150    }
151    #[doc = "External pin reference"]
152    #[inline(always)]
153    pub fn ext(self) -> &'a mut W {
154        self.variant(REFSEL_A::EXT)
155    }
156}
157#[doc = "Prescaler Setting for DAC Clock\n\nValue on reset: 0"]
158#[derive(Clone, Copy, Debug, PartialEq)]
159#[repr(u8)]
160pub enum PRESC_A {
161    #[doc = "0: `0`"]
162    NODIVISION = 0,
163}
164impl From<PRESC_A> for u8 {
165    #[inline(always)]
166    fn from(variant: PRESC_A) -> Self {
167        variant as _
168    }
169}
170#[doc = "Field `PRESC` reader - Prescaler Setting for DAC Clock"]
171pub type PRESC_R = crate::FieldReader<u8, PRESC_A>;
172impl PRESC_R {
173    #[doc = "Get enumerated values variant"]
174    #[inline(always)]
175    pub fn variant(&self) -> Option<PRESC_A> {
176        match self.bits {
177            0 => Some(PRESC_A::NODIVISION),
178            _ => None,
179        }
180    }
181    #[doc = "Checks if the value of the field is `NODIVISION`"]
182    #[inline(always)]
183    pub fn is_nodivision(&self) -> bool {
184        *self == PRESC_A::NODIVISION
185    }
186}
187#[doc = "Field `PRESC` writer - Prescaler Setting for DAC Clock"]
188pub type PRESC_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRESC_A, 7, 16>;
189impl<'a> PRESC_W<'a> {
190    #[doc = "`0`"]
191    #[inline(always)]
192    pub fn nodivision(self) -> &'a mut W {
193        self.variant(PRESC_A::NODIVISION)
194    }
195}
196#[doc = "Refresh Period\n\nValue on reset: 0"]
197#[derive(Clone, Copy, Debug, PartialEq)]
198#[repr(u8)]
199pub enum REFRESHPERIOD_A {
200    #[doc = "0: All channels with enabled refresh are refreshed every 8 DAC_CLK cycles"]
201    _8CYCLES = 0,
202    #[doc = "1: All channels with enabled refresh are refreshed every 16 DAC_CLK cycles"]
203    _16CYCLES = 1,
204    #[doc = "2: All channels with enabled refresh are refreshed every 32 DAC_CLK cycles"]
205    _32CYCLES = 2,
206    #[doc = "3: All channels with enabled refresh are refreshed every 64 DAC_CLK cycles"]
207    _64CYCLES = 3,
208}
209impl From<REFRESHPERIOD_A> for u8 {
210    #[inline(always)]
211    fn from(variant: REFRESHPERIOD_A) -> Self {
212        variant as _
213    }
214}
215#[doc = "Field `REFRESHPERIOD` reader - Refresh Period"]
216pub type REFRESHPERIOD_R = crate::FieldReader<u8, REFRESHPERIOD_A>;
217impl REFRESHPERIOD_R {
218    #[doc = "Get enumerated values variant"]
219    #[inline(always)]
220    pub fn variant(&self) -> REFRESHPERIOD_A {
221        match self.bits {
222            0 => REFRESHPERIOD_A::_8CYCLES,
223            1 => REFRESHPERIOD_A::_16CYCLES,
224            2 => REFRESHPERIOD_A::_32CYCLES,
225            3 => REFRESHPERIOD_A::_64CYCLES,
226            _ => unreachable!(),
227        }
228    }
229    #[doc = "Checks if the value of the field is `_8CYCLES`"]
230    #[inline(always)]
231    pub fn is_8cycles(&self) -> bool {
232        *self == REFRESHPERIOD_A::_8CYCLES
233    }
234    #[doc = "Checks if the value of the field is `_16CYCLES`"]
235    #[inline(always)]
236    pub fn is_16cycles(&self) -> bool {
237        *self == REFRESHPERIOD_A::_16CYCLES
238    }
239    #[doc = "Checks if the value of the field is `_32CYCLES`"]
240    #[inline(always)]
241    pub fn is_32cycles(&self) -> bool {
242        *self == REFRESHPERIOD_A::_32CYCLES
243    }
244    #[doc = "Checks if the value of the field is `_64CYCLES`"]
245    #[inline(always)]
246    pub fn is_64cycles(&self) -> bool {
247        *self == REFRESHPERIOD_A::_64CYCLES
248    }
249}
250#[doc = "Field `REFRESHPERIOD` writer - Refresh Period"]
251pub type REFRESHPERIOD_W<'a> =
252    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, REFRESHPERIOD_A, 2, 24>;
253impl<'a> REFRESHPERIOD_W<'a> {
254    #[doc = "All channels with enabled refresh are refreshed every 8 DAC_CLK cycles"]
255    #[inline(always)]
256    pub fn _8cycles(self) -> &'a mut W {
257        self.variant(REFRESHPERIOD_A::_8CYCLES)
258    }
259    #[doc = "All channels with enabled refresh are refreshed every 16 DAC_CLK cycles"]
260    #[inline(always)]
261    pub fn _16cycles(self) -> &'a mut W {
262        self.variant(REFRESHPERIOD_A::_16CYCLES)
263    }
264    #[doc = "All channels with enabled refresh are refreshed every 32 DAC_CLK cycles"]
265    #[inline(always)]
266    pub fn _32cycles(self) -> &'a mut W {
267        self.variant(REFRESHPERIOD_A::_32CYCLES)
268    }
269    #[doc = "All channels with enabled refresh are refreshed every 64 DAC_CLK cycles"]
270    #[inline(always)]
271    pub fn _64cycles(self) -> &'a mut W {
272        self.variant(REFRESHPERIOD_A::_64CYCLES)
273    }
274}
275#[doc = "Field `WARMUPMODE` reader - Warm-up Mode"]
276pub type WARMUPMODE_R = crate::BitReader<bool>;
277#[doc = "Field `WARMUPMODE` writer - Warm-up Mode"]
278pub type WARMUPMODE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 28>;
279#[doc = "Field `DACCLKMODE` reader - Clock Mode"]
280pub type DACCLKMODE_R = crate::BitReader<bool>;
281#[doc = "Field `DACCLKMODE` writer - Clock Mode"]
282pub type DACCLKMODE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 31>;
283impl R {
284    #[doc = "Bit 0 - Differential Mode"]
285    #[inline(always)]
286    pub fn diff(&self) -> DIFF_R {
287        DIFF_R::new((self.bits & 1) != 0)
288    }
289    #[doc = "Bit 4 - Sine Mode"]
290    #[inline(always)]
291    pub fn sinemode(&self) -> SINEMODE_R {
292        SINEMODE_R::new(((self.bits >> 4) & 1) != 0)
293    }
294    #[doc = "Bit 5 - PRS Controlled Output Enable"]
295    #[inline(always)]
296    pub fn outenprs(&self) -> OUTENPRS_R {
297        OUTENPRS_R::new(((self.bits >> 5) & 1) != 0)
298    }
299    #[doc = "Bit 6 - Channel 0 Start Reset Prescaler"]
300    #[inline(always)]
301    pub fn ch0prescrst(&self) -> CH0PRESCRST_R {
302        CH0PRESCRST_R::new(((self.bits >> 6) & 1) != 0)
303    }
304    #[doc = "Bits 8:10 - Reference Selection"]
305    #[inline(always)]
306    pub fn refsel(&self) -> REFSEL_R {
307        REFSEL_R::new(((self.bits >> 8) & 7) as u8)
308    }
309    #[doc = "Bits 16:22 - Prescaler Setting for DAC Clock"]
310    #[inline(always)]
311    pub fn presc(&self) -> PRESC_R {
312        PRESC_R::new(((self.bits >> 16) & 0x7f) as u8)
313    }
314    #[doc = "Bits 24:25 - Refresh Period"]
315    #[inline(always)]
316    pub fn refreshperiod(&self) -> REFRESHPERIOD_R {
317        REFRESHPERIOD_R::new(((self.bits >> 24) & 3) as u8)
318    }
319    #[doc = "Bit 28 - Warm-up Mode"]
320    #[inline(always)]
321    pub fn warmupmode(&self) -> WARMUPMODE_R {
322        WARMUPMODE_R::new(((self.bits >> 28) & 1) != 0)
323    }
324    #[doc = "Bit 31 - Clock Mode"]
325    #[inline(always)]
326    pub fn dacclkmode(&self) -> DACCLKMODE_R {
327        DACCLKMODE_R::new(((self.bits >> 31) & 1) != 0)
328    }
329}
330impl W {
331    #[doc = "Bit 0 - Differential Mode"]
332    #[inline(always)]
333    pub fn diff(&mut self) -> DIFF_W {
334        DIFF_W::new(self)
335    }
336    #[doc = "Bit 4 - Sine Mode"]
337    #[inline(always)]
338    pub fn sinemode(&mut self) -> SINEMODE_W {
339        SINEMODE_W::new(self)
340    }
341    #[doc = "Bit 5 - PRS Controlled Output Enable"]
342    #[inline(always)]
343    pub fn outenprs(&mut self) -> OUTENPRS_W {
344        OUTENPRS_W::new(self)
345    }
346    #[doc = "Bit 6 - Channel 0 Start Reset Prescaler"]
347    #[inline(always)]
348    pub fn ch0prescrst(&mut self) -> CH0PRESCRST_W {
349        CH0PRESCRST_W::new(self)
350    }
351    #[doc = "Bits 8:10 - Reference Selection"]
352    #[inline(always)]
353    pub fn refsel(&mut self) -> REFSEL_W {
354        REFSEL_W::new(self)
355    }
356    #[doc = "Bits 16:22 - Prescaler Setting for DAC Clock"]
357    #[inline(always)]
358    pub fn presc(&mut self) -> PRESC_W {
359        PRESC_W::new(self)
360    }
361    #[doc = "Bits 24:25 - Refresh Period"]
362    #[inline(always)]
363    pub fn refreshperiod(&mut self) -> REFRESHPERIOD_W {
364        REFRESHPERIOD_W::new(self)
365    }
366    #[doc = "Bit 28 - Warm-up Mode"]
367    #[inline(always)]
368    pub fn warmupmode(&mut self) -> WARMUPMODE_W {
369        WARMUPMODE_W::new(self)
370    }
371    #[doc = "Bit 31 - Clock Mode"]
372    #[inline(always)]
373    pub fn dacclkmode(&mut self) -> DACCLKMODE_W {
374        DACCLKMODE_W::new(self)
375    }
376    #[doc = "Writes raw bits to the register."]
377    #[inline(always)]
378    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
379        self.0.bits(bits);
380        self
381    }
382}
383#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
384pub struct CTRL_SPEC;
385impl crate::RegisterSpec for CTRL_SPEC {
386    type Ux = u32;
387}
388#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
389impl crate::Readable for CTRL_SPEC {
390    type Reader = R;
391}
392#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
393impl crate::Writable for CTRL_SPEC {
394    type Writer = W;
395}
396#[doc = "`reset()` method sets CTRL to value 0"]
397impl crate::Resettable for CTRL_SPEC {
398    #[inline(always)]
399    fn reset_value() -> Self::Ux {
400        0
401    }
402}
efm32gg11b510_pac/vdac0/ctrl.rs

efm32gg11b510_pac/vdac0/
ctrl.rs
