efm32gg11b510_pac/lesense/
perctrl.rs

1#[doc = "Register `PERCTRL` reader"]
2pub struct R(crate::R<PERCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PERCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PERCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PERCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PERCTRL` writer"]
17pub struct W(crate::W<PERCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PERCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PERCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PERCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DACCH0EN` reader - VDAC CH0 Enable"]
38pub type DACCH0EN_R = crate::BitReader<bool>;
39#[doc = "Field `DACCH0EN` writer - VDAC CH0 Enable"]
40pub type DACCH0EN_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 0>;
41#[doc = "Field `DACCH1EN` reader - VDAC CH1 Enable"]
42pub type DACCH1EN_R = crate::BitReader<bool>;
43#[doc = "Field `DACCH1EN` writer - VDAC CH1 Enable"]
44pub type DACCH1EN_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 1>;
45#[doc = "Field `DACCH0DATA` reader - VDAC CH0 Data Selection"]
46pub type DACCH0DATA_R = crate::BitReader<bool>;
47#[doc = "Field `DACCH0DATA` writer - VDAC CH0 Data Selection"]
48pub type DACCH0DATA_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 2>;
49#[doc = "Field `DACCH1DATA` reader - VDAC CH1 Data Selection"]
50pub type DACCH1DATA_R = crate::BitReader<bool>;
51#[doc = "Field `DACCH1DATA` writer - VDAC CH1 Data Selection"]
52pub type DACCH1DATA_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 3>;
53#[doc = "Field `DACSTARTUP` reader - VDAC Startup Configuration"]
54pub type DACSTARTUP_R = crate::BitReader<bool>;
55#[doc = "Field `DACSTARTUP` writer - VDAC Startup Configuration"]
56pub type DACSTARTUP_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 6>;
57#[doc = "Field `DACCONVTRIG` reader - VDAC Conversion Trigger Configuration"]
58pub type DACCONVTRIG_R = crate::BitReader<bool>;
59#[doc = "Field `DACCONVTRIG` writer - VDAC Conversion Trigger Configuration"]
60pub type DACCONVTRIG_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 8>;
61#[doc = "ACMP0 Mode\n\nValue on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq)]
63#[repr(u8)]
64pub enum ACMP0MODE_A {
65    #[doc = "0: LESENSE does not control ACMP0"]
66    DISABLE = 0,
67    #[doc = "1: LESENSE controls the input mux (POSSEL) of ACMP0"]
68    MUX = 1,
69    #[doc = "2: LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0"]
70    MUXTHRES = 2,
71}
72impl From<ACMP0MODE_A> for u8 {
73    #[inline(always)]
74    fn from(variant: ACMP0MODE_A) -> Self {
75        variant as _
76    }
77}
78#[doc = "Field `ACMP0MODE` reader - ACMP0 Mode"]
79pub type ACMP0MODE_R = crate::FieldReader<u8, ACMP0MODE_A>;
80impl ACMP0MODE_R {
81    #[doc = "Get enumerated values variant"]
82    #[inline(always)]
83    pub fn variant(&self) -> Option<ACMP0MODE_A> {
84        match self.bits {
85            0 => Some(ACMP0MODE_A::DISABLE),
86            1 => Some(ACMP0MODE_A::MUX),
87            2 => Some(ACMP0MODE_A::MUXTHRES),
88            _ => None,
89        }
90    }
91    #[doc = "Checks if the value of the field is `DISABLE`"]
92    #[inline(always)]
93    pub fn is_disable(&self) -> bool {
94        *self == ACMP0MODE_A::DISABLE
95    }
96    #[doc = "Checks if the value of the field is `MUX`"]
97    #[inline(always)]
98    pub fn is_mux(&self) -> bool {
99        *self == ACMP0MODE_A::MUX
100    }
101    #[doc = "Checks if the value of the field is `MUXTHRES`"]
102    #[inline(always)]
103    pub fn is_muxthres(&self) -> bool {
104        *self == ACMP0MODE_A::MUXTHRES
105    }
106}
107#[doc = "Field `ACMP0MODE` writer - ACMP0 Mode"]
108pub type ACMP0MODE_W<'a> = crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, ACMP0MODE_A, 2, 20>;
109impl<'a> ACMP0MODE_W<'a> {
110    #[doc = "LESENSE does not control ACMP0"]
111    #[inline(always)]
112    pub fn disable(self) -> &'a mut W {
113        self.variant(ACMP0MODE_A::DISABLE)
114    }
115    #[doc = "LESENSE controls the input mux (POSSEL) of ACMP0"]
116    #[inline(always)]
117    pub fn mux(self) -> &'a mut W {
118        self.variant(ACMP0MODE_A::MUX)
119    }
120    #[doc = "LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0"]
121    #[inline(always)]
122    pub fn muxthres(self) -> &'a mut W {
123        self.variant(ACMP0MODE_A::MUXTHRES)
124    }
125}
126#[doc = "ACMP1 Mode\n\nValue on reset: 0"]
127#[derive(Clone, Copy, Debug, PartialEq)]
128#[repr(u8)]
129pub enum ACMP1MODE_A {
130    #[doc = "0: LESENSE does not control ACMP1"]
131    DISABLE = 0,
132    #[doc = "1: LESENSE controls the input mux (POSSEL) of ACMP1"]
133    MUX = 1,
134    #[doc = "2: LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1"]
135    MUXTHRES = 2,
136}
137impl From<ACMP1MODE_A> for u8 {
138    #[inline(always)]
139    fn from(variant: ACMP1MODE_A) -> Self {
140        variant as _
141    }
142}
143#[doc = "Field `ACMP1MODE` reader - ACMP1 Mode"]
144pub type ACMP1MODE_R = crate::FieldReader<u8, ACMP1MODE_A>;
145impl ACMP1MODE_R {
146    #[doc = "Get enumerated values variant"]
147    #[inline(always)]
148    pub fn variant(&self) -> Option<ACMP1MODE_A> {
149        match self.bits {
150            0 => Some(ACMP1MODE_A::DISABLE),
151            1 => Some(ACMP1MODE_A::MUX),
152            2 => Some(ACMP1MODE_A::MUXTHRES),
153            _ => None,
154        }
155    }
156    #[doc = "Checks if the value of the field is `DISABLE`"]
157    #[inline(always)]
158    pub fn is_disable(&self) -> bool {
159        *self == ACMP1MODE_A::DISABLE
160    }
161    #[doc = "Checks if the value of the field is `MUX`"]
162    #[inline(always)]
163    pub fn is_mux(&self) -> bool {
164        *self == ACMP1MODE_A::MUX
165    }
166    #[doc = "Checks if the value of the field is `MUXTHRES`"]
167    #[inline(always)]
168    pub fn is_muxthres(&self) -> bool {
169        *self == ACMP1MODE_A::MUXTHRES
170    }
171}
172#[doc = "Field `ACMP1MODE` writer - ACMP1 Mode"]
173pub type ACMP1MODE_W<'a> = crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, ACMP1MODE_A, 2, 22>;
174impl<'a> ACMP1MODE_W<'a> {
175    #[doc = "LESENSE does not control ACMP1"]
176    #[inline(always)]
177    pub fn disable(self) -> &'a mut W {
178        self.variant(ACMP1MODE_A::DISABLE)
179    }
180    #[doc = "LESENSE controls the input mux (POSSEL) of ACMP1"]
181    #[inline(always)]
182    pub fn mux(self) -> &'a mut W {
183        self.variant(ACMP1MODE_A::MUX)
184    }
185    #[doc = "LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1"]
186    #[inline(always)]
187    pub fn muxthres(self) -> &'a mut W {
188        self.variant(ACMP1MODE_A::MUXTHRES)
189    }
190}
191#[doc = "Field `ACMP0INV` reader - Invert Analog Comparator 0 Output"]
192pub type ACMP0INV_R = crate::BitReader<bool>;
193#[doc = "Field `ACMP0INV` writer - Invert Analog Comparator 0 Output"]
194pub type ACMP0INV_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 24>;
195#[doc = "Field `ACMP1INV` reader - Invert Analog Comparator 1 Output"]
196pub type ACMP1INV_R = crate::BitReader<bool>;
197#[doc = "Field `ACMP1INV` writer - Invert Analog Comparator 1 Output"]
198pub type ACMP1INV_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 25>;
199#[doc = "Field `ACMP0HYSTEN` reader - ACMP0 Hysteresis Enable"]
200pub type ACMP0HYSTEN_R = crate::BitReader<bool>;
201#[doc = "Field `ACMP0HYSTEN` writer - ACMP0 Hysteresis Enable"]
202pub type ACMP0HYSTEN_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 26>;
203#[doc = "Field `ACMP1HYSTEN` reader - ACMP1 Hysteresis Enable"]
204pub type ACMP1HYSTEN_R = crate::BitReader<bool>;
205#[doc = "Field `ACMP1HYSTEN` writer - ACMP1 Hysteresis Enable"]
206pub type ACMP1HYSTEN_W<'a> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, 27>;
207#[doc = "ACMP and VDAC Duty Cycle Mode\n\nValue on reset: 0"]
208#[derive(Clone, Copy, Debug, PartialEq)]
209#[repr(u8)]
210pub enum WARMUPMODE_A {
211    #[doc = "0: The analog comparators and VDAC are shut down when LESENSE is idle"]
212    NORMAL = 0,
213    #[doc = "1: The analog comparators are kept powered up when LESENSE is idle"]
214    KEEPACMPWARM = 1,
215    #[doc = "2: The VDAC is kept powered up when LESENSE is idle"]
216    KEEPDACWARM = 2,
217    #[doc = "3: The analog comparators and VDAC are kept powered up when LESENSE is idle"]
218    KEEPACMPDACWARM = 3,
219}
220impl From<WARMUPMODE_A> for u8 {
221    #[inline(always)]
222    fn from(variant: WARMUPMODE_A) -> Self {
223        variant as _
224    }
225}
226#[doc = "Field `WARMUPMODE` reader - ACMP and VDAC Duty Cycle Mode"]
227pub type WARMUPMODE_R = crate::FieldReader<u8, WARMUPMODE_A>;
228impl WARMUPMODE_R {
229    #[doc = "Get enumerated values variant"]
230    #[inline(always)]
231    pub fn variant(&self) -> WARMUPMODE_A {
232        match self.bits {
233            0 => WARMUPMODE_A::NORMAL,
234            1 => WARMUPMODE_A::KEEPACMPWARM,
235            2 => WARMUPMODE_A::KEEPDACWARM,
236            3 => WARMUPMODE_A::KEEPACMPDACWARM,
237            _ => unreachable!(),
238        }
239    }
240    #[doc = "Checks if the value of the field is `NORMAL`"]
241    #[inline(always)]
242    pub fn is_normal(&self) -> bool {
243        *self == WARMUPMODE_A::NORMAL
244    }
245    #[doc = "Checks if the value of the field is `KEEPACMPWARM`"]
246    #[inline(always)]
247    pub fn is_keepacmpwarm(&self) -> bool {
248        *self == WARMUPMODE_A::KEEPACMPWARM
249    }
250    #[doc = "Checks if the value of the field is `KEEPDACWARM`"]
251    #[inline(always)]
252    pub fn is_keepdacwarm(&self) -> bool {
253        *self == WARMUPMODE_A::KEEPDACWARM
254    }
255    #[doc = "Checks if the value of the field is `KEEPACMPDACWARM`"]
256    #[inline(always)]
257    pub fn is_keepacmpdacwarm(&self) -> bool {
258        *self == WARMUPMODE_A::KEEPACMPDACWARM
259    }
260}
261#[doc = "Field `WARMUPMODE` writer - ACMP and VDAC Duty Cycle Mode"]
262pub type WARMUPMODE_W<'a> = crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, WARMUPMODE_A, 2, 28>;
263impl<'a> WARMUPMODE_W<'a> {
264    #[doc = "The analog comparators and VDAC are shut down when LESENSE is idle"]
265    #[inline(always)]
266    pub fn normal(self) -> &'a mut W {
267        self.variant(WARMUPMODE_A::NORMAL)
268    }
269    #[doc = "The analog comparators are kept powered up when LESENSE is idle"]
270    #[inline(always)]
271    pub fn keepacmpwarm(self) -> &'a mut W {
272        self.variant(WARMUPMODE_A::KEEPACMPWARM)
273    }
274    #[doc = "The VDAC is kept powered up when LESENSE is idle"]
275    #[inline(always)]
276    pub fn keepdacwarm(self) -> &'a mut W {
277        self.variant(WARMUPMODE_A::KEEPDACWARM)
278    }
279    #[doc = "The analog comparators and VDAC are kept powered up when LESENSE is idle"]
280    #[inline(always)]
281    pub fn keepacmpdacwarm(self) -> &'a mut W {
282        self.variant(WARMUPMODE_A::KEEPACMPDACWARM)
283    }
284}
285impl R {
286    #[doc = "Bit 0 - VDAC CH0 Enable"]
287    #[inline(always)]
288    pub fn dacch0en(&self) -> DACCH0EN_R {
289        DACCH0EN_R::new((self.bits & 1) != 0)
290    }
291    #[doc = "Bit 1 - VDAC CH1 Enable"]
292    #[inline(always)]
293    pub fn dacch1en(&self) -> DACCH1EN_R {
294        DACCH1EN_R::new(((self.bits >> 1) & 1) != 0)
295    }
296    #[doc = "Bit 2 - VDAC CH0 Data Selection"]
297    #[inline(always)]
298    pub fn dacch0data(&self) -> DACCH0DATA_R {
299        DACCH0DATA_R::new(((self.bits >> 2) & 1) != 0)
300    }
301    #[doc = "Bit 3 - VDAC CH1 Data Selection"]
302    #[inline(always)]
303    pub fn dacch1data(&self) -> DACCH1DATA_R {
304        DACCH1DATA_R::new(((self.bits >> 3) & 1) != 0)
305    }
306    #[doc = "Bit 6 - VDAC Startup Configuration"]
307    #[inline(always)]
308    pub fn dacstartup(&self) -> DACSTARTUP_R {
309        DACSTARTUP_R::new(((self.bits >> 6) & 1) != 0)
310    }
311    #[doc = "Bit 8 - VDAC Conversion Trigger Configuration"]
312    #[inline(always)]
313    pub fn dacconvtrig(&self) -> DACCONVTRIG_R {
314        DACCONVTRIG_R::new(((self.bits >> 8) & 1) != 0)
315    }
316    #[doc = "Bits 20:21 - ACMP0 Mode"]
317    #[inline(always)]
318    pub fn acmp0mode(&self) -> ACMP0MODE_R {
319        ACMP0MODE_R::new(((self.bits >> 20) & 3) as u8)
320    }
321    #[doc = "Bits 22:23 - ACMP1 Mode"]
322    #[inline(always)]
323    pub fn acmp1mode(&self) -> ACMP1MODE_R {
324        ACMP1MODE_R::new(((self.bits >> 22) & 3) as u8)
325    }
326    #[doc = "Bit 24 - Invert Analog Comparator 0 Output"]
327    #[inline(always)]
328    pub fn acmp0inv(&self) -> ACMP0INV_R {
329        ACMP0INV_R::new(((self.bits >> 24) & 1) != 0)
330    }
331    #[doc = "Bit 25 - Invert Analog Comparator 1 Output"]
332    #[inline(always)]
333    pub fn acmp1inv(&self) -> ACMP1INV_R {
334        ACMP1INV_R::new(((self.bits >> 25) & 1) != 0)
335    }
336    #[doc = "Bit 26 - ACMP0 Hysteresis Enable"]
337    #[inline(always)]
338    pub fn acmp0hysten(&self) -> ACMP0HYSTEN_R {
339        ACMP0HYSTEN_R::new(((self.bits >> 26) & 1) != 0)
340    }
341    #[doc = "Bit 27 - ACMP1 Hysteresis Enable"]
342    #[inline(always)]
343    pub fn acmp1hysten(&self) -> ACMP1HYSTEN_R {
344        ACMP1HYSTEN_R::new(((self.bits >> 27) & 1) != 0)
345    }
346    #[doc = "Bits 28:29 - ACMP and VDAC Duty Cycle Mode"]
347    #[inline(always)]
348    pub fn warmupmode(&self) -> WARMUPMODE_R {
349        WARMUPMODE_R::new(((self.bits >> 28) & 3) as u8)
350    }
351}
352impl W {
353    #[doc = "Bit 0 - VDAC CH0 Enable"]
354    #[inline(always)]
355    pub fn dacch0en(&mut self) -> DACCH0EN_W {
356        DACCH0EN_W::new(self)
357    }
358    #[doc = "Bit 1 - VDAC CH1 Enable"]
359    #[inline(always)]
360    pub fn dacch1en(&mut self) -> DACCH1EN_W {
361        DACCH1EN_W::new(self)
362    }
363    #[doc = "Bit 2 - VDAC CH0 Data Selection"]
364    #[inline(always)]
365    pub fn dacch0data(&mut self) -> DACCH0DATA_W {
366        DACCH0DATA_W::new(self)
367    }
368    #[doc = "Bit 3 - VDAC CH1 Data Selection"]
369    #[inline(always)]
370    pub fn dacch1data(&mut self) -> DACCH1DATA_W {
371        DACCH1DATA_W::new(self)
372    }
373    #[doc = "Bit 6 - VDAC Startup Configuration"]
374    #[inline(always)]
375    pub fn dacstartup(&mut self) -> DACSTARTUP_W {
376        DACSTARTUP_W::new(self)
377    }
378    #[doc = "Bit 8 - VDAC Conversion Trigger Configuration"]
379    #[inline(always)]
380    pub fn dacconvtrig(&mut self) -> DACCONVTRIG_W {
381        DACCONVTRIG_W::new(self)
382    }
383    #[doc = "Bits 20:21 - ACMP0 Mode"]
384    #[inline(always)]
385    pub fn acmp0mode(&mut self) -> ACMP0MODE_W {
386        ACMP0MODE_W::new(self)
387    }
388    #[doc = "Bits 22:23 - ACMP1 Mode"]
389    #[inline(always)]
390    pub fn acmp1mode(&mut self) -> ACMP1MODE_W {
391        ACMP1MODE_W::new(self)
392    }
393    #[doc = "Bit 24 - Invert Analog Comparator 0 Output"]
394    #[inline(always)]
395    pub fn acmp0inv(&mut self) -> ACMP0INV_W {
396        ACMP0INV_W::new(self)
397    }
398    #[doc = "Bit 25 - Invert Analog Comparator 1 Output"]
399    #[inline(always)]
400    pub fn acmp1inv(&mut self) -> ACMP1INV_W {
401        ACMP1INV_W::new(self)
402    }
403    #[doc = "Bit 26 - ACMP0 Hysteresis Enable"]
404    #[inline(always)]
405    pub fn acmp0hysten(&mut self) -> ACMP0HYSTEN_W {
406        ACMP0HYSTEN_W::new(self)
407    }
408    #[doc = "Bit 27 - ACMP1 Hysteresis Enable"]
409    #[inline(always)]
410    pub fn acmp1hysten(&mut self) -> ACMP1HYSTEN_W {
411        ACMP1HYSTEN_W::new(self)
412    }
413    #[doc = "Bits 28:29 - ACMP and VDAC Duty Cycle Mode"]
414    #[inline(always)]
415    pub fn warmupmode(&mut self) -> WARMUPMODE_W {
416        WARMUPMODE_W::new(self)
417    }
418    #[doc = "Writes raw bits to the register."]
419    #[inline(always)]
420    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
421        self.0.bits(bits);
422        self
423    }
424}
425#[doc = "Peripheral Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perctrl](index.html) module"]
426pub struct PERCTRL_SPEC;
427impl crate::RegisterSpec for PERCTRL_SPEC {
428    type Ux = u32;
429}
430#[doc = "`read()` method returns [perctrl::R](R) reader structure"]
431impl crate::Readable for PERCTRL_SPEC {
432    type Reader = R;
433}
434#[doc = "`write(|w| ..)` method takes [perctrl::W](W) writer structure"]
435impl crate::Writable for PERCTRL_SPEC {
436    type Writer = W;
437}
438#[doc = "`reset()` method sets PERCTRL to value 0"]
439impl crate::Resettable for PERCTRL_SPEC {
440    #[inline(always)]
441    fn reset_value() -> Self::Ux {
442        0
443    }
444}
efm32gg11b510_pac/lesense/perctrl.rs

efm32gg11b510_pac/lesense/
perctrl.rs
