efm32gg11b510_pac/cmu/
syncbusy.rs

1#[doc = "Register `SYNCBUSY` reader"]
2pub struct R(crate::R<SYNCBUSY_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SYNCBUSY_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SYNCBUSY_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SYNCBUSY_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `LFACLKEN0` reader - Low Frequency a Clock Enable 0 Busy"]
17pub type LFACLKEN0_R = crate::BitReader<bool>;
18#[doc = "Field `LFAPRESC0` reader - Low Frequency a Prescaler 0 Busy"]
19pub type LFAPRESC0_R = crate::BitReader<bool>;
20#[doc = "Field `LFBCLKEN0` reader - Low Frequency B Clock Enable 0 Busy"]
21pub type LFBCLKEN0_R = crate::BitReader<bool>;
22#[doc = "Field `LFBPRESC0` reader - Low Frequency B Prescaler 0 Busy"]
23pub type LFBPRESC0_R = crate::BitReader<bool>;
24#[doc = "Field `LFCCLKEN0` reader - Low Frequency C Clock Enable 0 Busy"]
25pub type LFCCLKEN0_R = crate::BitReader<bool>;
26#[doc = "Field `LFECLKEN0` reader - Low Frequency E Clock Enable 0 Busy"]
27pub type LFECLKEN0_R = crate::BitReader<bool>;
28#[doc = "Field `LFEPRESC0` reader - Low Frequency E Prescaler 0 Busy"]
29pub type LFEPRESC0_R = crate::BitReader<bool>;
30#[doc = "Field `HFRCOBSY` reader - HFRCO Busy"]
31pub type HFRCOBSY_R = crate::BitReader<bool>;
32#[doc = "Field `AUXHFRCOBSY` reader - AUXHFRCO Busy"]
33pub type AUXHFRCOBSY_R = crate::BitReader<bool>;
34#[doc = "Field `LFRCOBSY` reader - LFRCO Busy"]
35pub type LFRCOBSY_R = crate::BitReader<bool>;
36#[doc = "Field `LFRCOVREFBSY` reader - LFRCO VREF Busy"]
37pub type LFRCOVREFBSY_R = crate::BitReader<bool>;
38#[doc = "Field `HFXOBSY` reader - HFXO Busy"]
39pub type HFXOBSY_R = crate::BitReader<bool>;
40#[doc = "Field `LFXOBSY` reader - LFXO Busy"]
41pub type LFXOBSY_R = crate::BitReader<bool>;
42#[doc = "Field `USHFRCOBSY` reader - USHFRCO Busy"]
43pub type USHFRCOBSY_R = crate::BitReader<bool>;
44impl R {
45    #[doc = "Bit 0 - Low Frequency a Clock Enable 0 Busy"]
46    #[inline(always)]
47    pub fn lfaclken0(&self) -> LFACLKEN0_R {
48        LFACLKEN0_R::new((self.bits & 1) != 0)
49    }
50    #[doc = "Bit 2 - Low Frequency a Prescaler 0 Busy"]
51    #[inline(always)]
52    pub fn lfapresc0(&self) -> LFAPRESC0_R {
53        LFAPRESC0_R::new(((self.bits >> 2) & 1) != 0)
54    }
55    #[doc = "Bit 4 - Low Frequency B Clock Enable 0 Busy"]
56    #[inline(always)]
57    pub fn lfbclken0(&self) -> LFBCLKEN0_R {
58        LFBCLKEN0_R::new(((self.bits >> 4) & 1) != 0)
59    }
60    #[doc = "Bit 6 - Low Frequency B Prescaler 0 Busy"]
61    #[inline(always)]
62    pub fn lfbpresc0(&self) -> LFBPRESC0_R {
63        LFBPRESC0_R::new(((self.bits >> 6) & 1) != 0)
64    }
65    #[doc = "Bit 8 - Low Frequency C Clock Enable 0 Busy"]
66    #[inline(always)]
67    pub fn lfcclken0(&self) -> LFCCLKEN0_R {
68        LFCCLKEN0_R::new(((self.bits >> 8) & 1) != 0)
69    }
70    #[doc = "Bit 16 - Low Frequency E Clock Enable 0 Busy"]
71    #[inline(always)]
72    pub fn lfeclken0(&self) -> LFECLKEN0_R {
73        LFECLKEN0_R::new(((self.bits >> 16) & 1) != 0)
74    }
75    #[doc = "Bit 18 - Low Frequency E Prescaler 0 Busy"]
76    #[inline(always)]
77    pub fn lfepresc0(&self) -> LFEPRESC0_R {
78        LFEPRESC0_R::new(((self.bits >> 18) & 1) != 0)
79    }
80    #[doc = "Bit 24 - HFRCO Busy"]
81    #[inline(always)]
82    pub fn hfrcobsy(&self) -> HFRCOBSY_R {
83        HFRCOBSY_R::new(((self.bits >> 24) & 1) != 0)
84    }
85    #[doc = "Bit 25 - AUXHFRCO Busy"]
86    #[inline(always)]
87    pub fn auxhfrcobsy(&self) -> AUXHFRCOBSY_R {
88        AUXHFRCOBSY_R::new(((self.bits >> 25) & 1) != 0)
89    }
90    #[doc = "Bit 26 - LFRCO Busy"]
91    #[inline(always)]
92    pub fn lfrcobsy(&self) -> LFRCOBSY_R {
93        LFRCOBSY_R::new(((self.bits >> 26) & 1) != 0)
94    }
95    #[doc = "Bit 27 - LFRCO VREF Busy"]
96    #[inline(always)]
97    pub fn lfrcovrefbsy(&self) -> LFRCOVREFBSY_R {
98        LFRCOVREFBSY_R::new(((self.bits >> 27) & 1) != 0)
99    }
100    #[doc = "Bit 28 - HFXO Busy"]
101    #[inline(always)]
102    pub fn hfxobsy(&self) -> HFXOBSY_R {
103        HFXOBSY_R::new(((self.bits >> 28) & 1) != 0)
104    }
105    #[doc = "Bit 29 - LFXO Busy"]
106    #[inline(always)]
107    pub fn lfxobsy(&self) -> LFXOBSY_R {
108        LFXOBSY_R::new(((self.bits >> 29) & 1) != 0)
109    }
110    #[doc = "Bit 30 - USHFRCO Busy"]
111    #[inline(always)]
112    pub fn ushfrcobsy(&self) -> USHFRCOBSY_R {
113        USHFRCOBSY_R::new(((self.bits >> 30) & 1) != 0)
114    }
115}
116#[doc = "Synchronization Busy Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syncbusy](index.html) module"]
117pub struct SYNCBUSY_SPEC;
118impl crate::RegisterSpec for SYNCBUSY_SPEC {
119    type Ux = u32;
120}
121#[doc = "`read()` method returns [syncbusy::R](R) reader structure"]
122impl crate::Readable for SYNCBUSY_SPEC {
123    type Reader = R;
124}
125#[doc = "`reset()` method sets SYNCBUSY to value 0"]
126impl crate::Resettable for SYNCBUSY_SPEC {
127    #[inline(always)]
128    fn reset_value() -> Self::Ux {
129        0
130    }
131}