efm32gg11b510_pac/rtcc/
ien.rs1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<IEN_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<IEN_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<IEN_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<IEN_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `OF` reader - OF Interrupt Enable"]
38pub type OF_R = crate::BitReader<bool>;
39#[doc = "Field `OF` writer - OF Interrupt Enable"]
40pub type OF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `CC0` reader - CC0 Interrupt Enable"]
42pub type CC0_R = crate::BitReader<bool>;
43#[doc = "Field `CC0` writer - CC0 Interrupt Enable"]
44pub type CC0_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `CC1` reader - CC1 Interrupt Enable"]
46pub type CC1_R = crate::BitReader<bool>;
47#[doc = "Field `CC1` writer - CC1 Interrupt Enable"]
48pub type CC1_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `CC2` reader - CC2 Interrupt Enable"]
50pub type CC2_R = crate::BitReader<bool>;
51#[doc = "Field `CC2` writer - CC2 Interrupt Enable"]
52pub type CC2_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `OSCFAIL` reader - OSCFAIL Interrupt Enable"]
54pub type OSCFAIL_R = crate::BitReader<bool>;
55#[doc = "Field `OSCFAIL` writer - OSCFAIL Interrupt Enable"]
56pub type OSCFAIL_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `CNTTICK` reader - CNTTICK Interrupt Enable"]
58pub type CNTTICK_R = crate::BitReader<bool>;
59#[doc = "Field `CNTTICK` writer - CNTTICK Interrupt Enable"]
60pub type CNTTICK_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `MINTICK` reader - MINTICK Interrupt Enable"]
62pub type MINTICK_R = crate::BitReader<bool>;
63#[doc = "Field `MINTICK` writer - MINTICK Interrupt Enable"]
64pub type MINTICK_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65#[doc = "Field `HOURTICK` reader - HOURTICK Interrupt Enable"]
66pub type HOURTICK_R = crate::BitReader<bool>;
67#[doc = "Field `HOURTICK` writer - HOURTICK Interrupt Enable"]
68pub type HOURTICK_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 7>;
69#[doc = "Field `DAYTICK` reader - DAYTICK Interrupt Enable"]
70pub type DAYTICK_R = crate::BitReader<bool>;
71#[doc = "Field `DAYTICK` writer - DAYTICK Interrupt Enable"]
72pub type DAYTICK_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 8>;
73#[doc = "Field `DAYOWOF` reader - DAYOWOF Interrupt Enable"]
74pub type DAYOWOF_R = crate::BitReader<bool>;
75#[doc = "Field `DAYOWOF` writer - DAYOWOF Interrupt Enable"]
76pub type DAYOWOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 9>;
77#[doc = "Field `MONTHTICK` reader - MONTHTICK Interrupt Enable"]
78pub type MONTHTICK_R = crate::BitReader<bool>;
79#[doc = "Field `MONTHTICK` writer - MONTHTICK Interrupt Enable"]
80pub type MONTHTICK_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 10>;
81impl R {
82 #[doc = "Bit 0 - OF Interrupt Enable"]
83 #[inline(always)]
84 pub fn of(&self) -> OF_R {
85 OF_R::new((self.bits & 1) != 0)
86 }
87 #[doc = "Bit 1 - CC0 Interrupt Enable"]
88 #[inline(always)]
89 pub fn cc0(&self) -> CC0_R {
90 CC0_R::new(((self.bits >> 1) & 1) != 0)
91 }
92 #[doc = "Bit 2 - CC1 Interrupt Enable"]
93 #[inline(always)]
94 pub fn cc1(&self) -> CC1_R {
95 CC1_R::new(((self.bits >> 2) & 1) != 0)
96 }
97 #[doc = "Bit 3 - CC2 Interrupt Enable"]
98 #[inline(always)]
99 pub fn cc2(&self) -> CC2_R {
100 CC2_R::new(((self.bits >> 3) & 1) != 0)
101 }
102 #[doc = "Bit 4 - OSCFAIL Interrupt Enable"]
103 #[inline(always)]
104 pub fn oscfail(&self) -> OSCFAIL_R {
105 OSCFAIL_R::new(((self.bits >> 4) & 1) != 0)
106 }
107 #[doc = "Bit 5 - CNTTICK Interrupt Enable"]
108 #[inline(always)]
109 pub fn cnttick(&self) -> CNTTICK_R {
110 CNTTICK_R::new(((self.bits >> 5) & 1) != 0)
111 }
112 #[doc = "Bit 6 - MINTICK Interrupt Enable"]
113 #[inline(always)]
114 pub fn mintick(&self) -> MINTICK_R {
115 MINTICK_R::new(((self.bits >> 6) & 1) != 0)
116 }
117 #[doc = "Bit 7 - HOURTICK Interrupt Enable"]
118 #[inline(always)]
119 pub fn hourtick(&self) -> HOURTICK_R {
120 HOURTICK_R::new(((self.bits >> 7) & 1) != 0)
121 }
122 #[doc = "Bit 8 - DAYTICK Interrupt Enable"]
123 #[inline(always)]
124 pub fn daytick(&self) -> DAYTICK_R {
125 DAYTICK_R::new(((self.bits >> 8) & 1) != 0)
126 }
127 #[doc = "Bit 9 - DAYOWOF Interrupt Enable"]
128 #[inline(always)]
129 pub fn dayowof(&self) -> DAYOWOF_R {
130 DAYOWOF_R::new(((self.bits >> 9) & 1) != 0)
131 }
132 #[doc = "Bit 10 - MONTHTICK Interrupt Enable"]
133 #[inline(always)]
134 pub fn monthtick(&self) -> MONTHTICK_R {
135 MONTHTICK_R::new(((self.bits >> 10) & 1) != 0)
136 }
137}
138impl W {
139 #[doc = "Bit 0 - OF Interrupt Enable"]
140 #[inline(always)]
141 pub fn of(&mut self) -> OF_W {
142 OF_W::new(self)
143 }
144 #[doc = "Bit 1 - CC0 Interrupt Enable"]
145 #[inline(always)]
146 pub fn cc0(&mut self) -> CC0_W {
147 CC0_W::new(self)
148 }
149 #[doc = "Bit 2 - CC1 Interrupt Enable"]
150 #[inline(always)]
151 pub fn cc1(&mut self) -> CC1_W {
152 CC1_W::new(self)
153 }
154 #[doc = "Bit 3 - CC2 Interrupt Enable"]
155 #[inline(always)]
156 pub fn cc2(&mut self) -> CC2_W {
157 CC2_W::new(self)
158 }
159 #[doc = "Bit 4 - OSCFAIL Interrupt Enable"]
160 #[inline(always)]
161 pub fn oscfail(&mut self) -> OSCFAIL_W {
162 OSCFAIL_W::new(self)
163 }
164 #[doc = "Bit 5 - CNTTICK Interrupt Enable"]
165 #[inline(always)]
166 pub fn cnttick(&mut self) -> CNTTICK_W {
167 CNTTICK_W::new(self)
168 }
169 #[doc = "Bit 6 - MINTICK Interrupt Enable"]
170 #[inline(always)]
171 pub fn mintick(&mut self) -> MINTICK_W {
172 MINTICK_W::new(self)
173 }
174 #[doc = "Bit 7 - HOURTICK Interrupt Enable"]
175 #[inline(always)]
176 pub fn hourtick(&mut self) -> HOURTICK_W {
177 HOURTICK_W::new(self)
178 }
179 #[doc = "Bit 8 - DAYTICK Interrupt Enable"]
180 #[inline(always)]
181 pub fn daytick(&mut self) -> DAYTICK_W {
182 DAYTICK_W::new(self)
183 }
184 #[doc = "Bit 9 - DAYOWOF Interrupt Enable"]
185 #[inline(always)]
186 pub fn dayowof(&mut self) -> DAYOWOF_W {
187 DAYOWOF_W::new(self)
188 }
189 #[doc = "Bit 10 - MONTHTICK Interrupt Enable"]
190 #[inline(always)]
191 pub fn monthtick(&mut self) -> MONTHTICK_W {
192 MONTHTICK_W::new(self)
193 }
194 #[doc = "Writes raw bits to the register."]
195 #[inline(always)]
196 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
197 self.0.bits(bits);
198 self
199 }
200}
201#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
202pub struct IEN_SPEC;
203impl crate::RegisterSpec for IEN_SPEC {
204 type Ux = u32;
205}
206#[doc = "`read()` method returns [ien::R](R) reader structure"]
207impl crate::Readable for IEN_SPEC {
208 type Reader = R;
209}
210#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
211impl crate::Writable for IEN_SPEC {
212 type Writer = W;
213}
214#[doc = "`reset()` method sets IEN to value 0"]
215impl crate::Resettable for IEN_SPEC {
216 #[inline(always)]
217 fn reset_value() -> Self::Ux {
218 0
219 }
220}