efm32gg11b420_pac/usb/
diepmsk.rs1#[doc = "Register `DIEPMSK` reader"]
2pub struct R(crate::R<DIEPMSK_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<DIEPMSK_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<DIEPMSK_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<DIEPMSK_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `DIEPMSK` writer"]
17pub struct W(crate::W<DIEPMSK_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<DIEPMSK_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<DIEPMSK_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<DIEPMSK_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `XFERCOMPLMSK` reader - Transfer Completed Interrupt Mask"]
38pub type XFERCOMPLMSK_R = crate::BitReader<bool>;
39#[doc = "Field `XFERCOMPLMSK` writer - Transfer Completed Interrupt Mask"]
40pub type XFERCOMPLMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 0>;
41#[doc = "Field `EPDISBLDMSK` reader - Endpoint Disabled Interrupt Mask"]
42pub type EPDISBLDMSK_R = crate::BitReader<bool>;
43#[doc = "Field `EPDISBLDMSK` writer - Endpoint Disabled Interrupt Mask"]
44pub type EPDISBLDMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 1>;
45#[doc = "Field `AHBERRMSK` reader - AHB Error Mask"]
46pub type AHBERRMSK_R = crate::BitReader<bool>;
47#[doc = "Field `AHBERRMSK` writer - AHB Error Mask"]
48pub type AHBERRMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 2>;
49#[doc = "Field `TIMEOUTMSK` reader - Timeout Condition Mask"]
50pub type TIMEOUTMSK_R = crate::BitReader<bool>;
51#[doc = "Field `TIMEOUTMSK` writer - Timeout Condition Mask"]
52pub type TIMEOUTMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 3>;
53#[doc = "Field `INTKNTXFEMPMSK` reader - IN Token Received When TxFIFO Empty Mask"]
54pub type INTKNTXFEMPMSK_R = crate::BitReader<bool>;
55#[doc = "Field `INTKNTXFEMPMSK` writer - IN Token Received When TxFIFO Empty Mask"]
56pub type INTKNTXFEMPMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 4>;
57#[doc = "Field `INTKNEPMISMSK` reader - IN Token received with EP Mismatch Mask"]
58pub type INTKNEPMISMSK_R = crate::BitReader<bool>;
59#[doc = "Field `INTKNEPMISMSK` writer - IN Token received with EP Mismatch Mask"]
60pub type INTKNEPMISMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 5>;
61#[doc = "Field `INEPNAKEFFMSK` reader - IN Endpoint NAK Effective Mask"]
62pub type INEPNAKEFFMSK_R = crate::BitReader<bool>;
63#[doc = "Field `INEPNAKEFFMSK` writer - IN Endpoint NAK Effective Mask"]
64pub type INEPNAKEFFMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 6>;
65#[doc = "Field `TXFIFOUNDRNMSK` reader - Fifo Underrun Mask"]
66pub type TXFIFOUNDRNMSK_R = crate::BitReader<bool>;
67#[doc = "Field `TXFIFOUNDRNMSK` writer - Fifo Underrun Mask"]
68pub type TXFIFOUNDRNMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 8>;
69#[doc = "Field `NAKMSK` reader - NAK interrupt Mask"]
70pub type NAKMSK_R = crate::BitReader<bool>;
71#[doc = "Field `NAKMSK` writer - NAK interrupt Mask"]
72pub type NAKMSK_W<'a> = crate::BitWriter<'a, u32, DIEPMSK_SPEC, bool, 13>;
73impl R {
74 #[doc = "Bit 0 - Transfer Completed Interrupt Mask"]
75 #[inline(always)]
76 pub fn xfercomplmsk(&self) -> XFERCOMPLMSK_R {
77 XFERCOMPLMSK_R::new((self.bits & 1) != 0)
78 }
79 #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"]
80 #[inline(always)]
81 pub fn epdisbldmsk(&self) -> EPDISBLDMSK_R {
82 EPDISBLDMSK_R::new(((self.bits >> 1) & 1) != 0)
83 }
84 #[doc = "Bit 2 - AHB Error Mask"]
85 #[inline(always)]
86 pub fn ahberrmsk(&self) -> AHBERRMSK_R {
87 AHBERRMSK_R::new(((self.bits >> 2) & 1) != 0)
88 }
89 #[doc = "Bit 3 - Timeout Condition Mask"]
90 #[inline(always)]
91 pub fn timeoutmsk(&self) -> TIMEOUTMSK_R {
92 TIMEOUTMSK_R::new(((self.bits >> 3) & 1) != 0)
93 }
94 #[doc = "Bit 4 - IN Token Received When TxFIFO Empty Mask"]
95 #[inline(always)]
96 pub fn intkntxfempmsk(&self) -> INTKNTXFEMPMSK_R {
97 INTKNTXFEMPMSK_R::new(((self.bits >> 4) & 1) != 0)
98 }
99 #[doc = "Bit 5 - IN Token received with EP Mismatch Mask"]
100 #[inline(always)]
101 pub fn intknepmismsk(&self) -> INTKNEPMISMSK_R {
102 INTKNEPMISMSK_R::new(((self.bits >> 5) & 1) != 0)
103 }
104 #[doc = "Bit 6 - IN Endpoint NAK Effective Mask"]
105 #[inline(always)]
106 pub fn inepnakeffmsk(&self) -> INEPNAKEFFMSK_R {
107 INEPNAKEFFMSK_R::new(((self.bits >> 6) & 1) != 0)
108 }
109 #[doc = "Bit 8 - Fifo Underrun Mask"]
110 #[inline(always)]
111 pub fn txfifoundrnmsk(&self) -> TXFIFOUNDRNMSK_R {
112 TXFIFOUNDRNMSK_R::new(((self.bits >> 8) & 1) != 0)
113 }
114 #[doc = "Bit 13 - NAK interrupt Mask"]
115 #[inline(always)]
116 pub fn nakmsk(&self) -> NAKMSK_R {
117 NAKMSK_R::new(((self.bits >> 13) & 1) != 0)
118 }
119}
120impl W {
121 #[doc = "Bit 0 - Transfer Completed Interrupt Mask"]
122 #[inline(always)]
123 pub fn xfercomplmsk(&mut self) -> XFERCOMPLMSK_W {
124 XFERCOMPLMSK_W::new(self)
125 }
126 #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"]
127 #[inline(always)]
128 pub fn epdisbldmsk(&mut self) -> EPDISBLDMSK_W {
129 EPDISBLDMSK_W::new(self)
130 }
131 #[doc = "Bit 2 - AHB Error Mask"]
132 #[inline(always)]
133 pub fn ahberrmsk(&mut self) -> AHBERRMSK_W {
134 AHBERRMSK_W::new(self)
135 }
136 #[doc = "Bit 3 - Timeout Condition Mask"]
137 #[inline(always)]
138 pub fn timeoutmsk(&mut self) -> TIMEOUTMSK_W {
139 TIMEOUTMSK_W::new(self)
140 }
141 #[doc = "Bit 4 - IN Token Received When TxFIFO Empty Mask"]
142 #[inline(always)]
143 pub fn intkntxfempmsk(&mut self) -> INTKNTXFEMPMSK_W {
144 INTKNTXFEMPMSK_W::new(self)
145 }
146 #[doc = "Bit 5 - IN Token received with EP Mismatch Mask"]
147 #[inline(always)]
148 pub fn intknepmismsk(&mut self) -> INTKNEPMISMSK_W {
149 INTKNEPMISMSK_W::new(self)
150 }
151 #[doc = "Bit 6 - IN Endpoint NAK Effective Mask"]
152 #[inline(always)]
153 pub fn inepnakeffmsk(&mut self) -> INEPNAKEFFMSK_W {
154 INEPNAKEFFMSK_W::new(self)
155 }
156 #[doc = "Bit 8 - Fifo Underrun Mask"]
157 #[inline(always)]
158 pub fn txfifoundrnmsk(&mut self) -> TXFIFOUNDRNMSK_W {
159 TXFIFOUNDRNMSK_W::new(self)
160 }
161 #[doc = "Bit 13 - NAK interrupt Mask"]
162 #[inline(always)]
163 pub fn nakmsk(&mut self) -> NAKMSK_W {
164 NAKMSK_W::new(self)
165 }
166 #[doc = "Writes raw bits to the register."]
167 #[inline(always)]
168 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
169 self.0.bits(bits);
170 self
171 }
172}
173#[doc = "Device IN Endpoint Common Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diepmsk](index.html) module"]
174pub struct DIEPMSK_SPEC;
175impl crate::RegisterSpec for DIEPMSK_SPEC {
176 type Ux = u32;
177}
178#[doc = "`read()` method returns [diepmsk::R](R) reader structure"]
179impl crate::Readable for DIEPMSK_SPEC {
180 type Reader = R;
181}
182#[doc = "`write(|w| ..)` method takes [diepmsk::W](W) writer structure"]
183impl crate::Writable for DIEPMSK_SPEC {
184 type Writer = W;
185}
186#[doc = "`reset()` method sets DIEPMSK to value 0"]
187impl crate::Resettable for DIEPMSK_SPEC {
188 #[inline(always)]
189 fn reset_value() -> Self::Ux {
190 0
191 }
192}