efm32gg11b320_pac/wtimer0/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `OF` reader - OF Interrupt Enable"]
38pub type OF_R = crate::BitReader<bool>;
39#[doc = "Field `OF` writer - OF Interrupt Enable"]
40pub type OF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `UF` reader - UF Interrupt Enable"]
42pub type UF_R = crate::BitReader<bool>;
43#[doc = "Field `UF` writer - UF Interrupt Enable"]
44pub type UF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `DIRCHG` reader - DIRCHG Interrupt Enable"]
46pub type DIRCHG_R = crate::BitReader<bool>;
47#[doc = "Field `DIRCHG` writer - DIRCHG Interrupt Enable"]
48pub type DIRCHG_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `CC0` reader - CC0 Interrupt Enable"]
50pub type CC0_R = crate::BitReader<bool>;
51#[doc = "Field `CC0` writer - CC0 Interrupt Enable"]
52pub type CC0_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
53#[doc = "Field `CC1` reader - CC1 Interrupt Enable"]
54pub type CC1_R = crate::BitReader<bool>;
55#[doc = "Field `CC1` writer - CC1 Interrupt Enable"]
56pub type CC1_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
57#[doc = "Field `CC2` reader - CC2 Interrupt Enable"]
58pub type CC2_R = crate::BitReader<bool>;
59#[doc = "Field `CC2` writer - CC2 Interrupt Enable"]
60pub type CC2_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
61#[doc = "Field `CC3` reader - CC3 Interrupt Enable"]
62pub type CC3_R = crate::BitReader<bool>;
63#[doc = "Field `CC3` writer - CC3 Interrupt Enable"]
64pub type CC3_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 7>;
65#[doc = "Field `ICBOF0` reader - ICBOF0 Interrupt Enable"]
66pub type ICBOF0_R = crate::BitReader<bool>;
67#[doc = "Field `ICBOF0` writer - ICBOF0 Interrupt Enable"]
68pub type ICBOF0_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 8>;
69#[doc = "Field `ICBOF1` reader - ICBOF1 Interrupt Enable"]
70pub type ICBOF1_R = crate::BitReader<bool>;
71#[doc = "Field `ICBOF1` writer - ICBOF1 Interrupt Enable"]
72pub type ICBOF1_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 9>;
73#[doc = "Field `ICBOF2` reader - ICBOF2 Interrupt Enable"]
74pub type ICBOF2_R = crate::BitReader<bool>;
75#[doc = "Field `ICBOF2` writer - ICBOF2 Interrupt Enable"]
76pub type ICBOF2_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 10>;
77#[doc = "Field `ICBOF3` reader - ICBOF3 Interrupt Enable"]
78pub type ICBOF3_R = crate::BitReader<bool>;
79#[doc = "Field `ICBOF3` writer - ICBOF3 Interrupt Enable"]
80pub type ICBOF3_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 11>;
81impl R {
82    #[doc = "Bit 0 - OF Interrupt Enable"]
83    #[inline(always)]
84    pub fn of(&self) -> OF_R {
85        OF_R::new((self.bits & 1) != 0)
86    }
87    #[doc = "Bit 1 - UF Interrupt Enable"]
88    #[inline(always)]
89    pub fn uf(&self) -> UF_R {
90        UF_R::new(((self.bits >> 1) & 1) != 0)
91    }
92    #[doc = "Bit 2 - DIRCHG Interrupt Enable"]
93    #[inline(always)]
94    pub fn dirchg(&self) -> DIRCHG_R {
95        DIRCHG_R::new(((self.bits >> 2) & 1) != 0)
96    }
97    #[doc = "Bit 4 - CC0 Interrupt Enable"]
98    #[inline(always)]
99    pub fn cc0(&self) -> CC0_R {
100        CC0_R::new(((self.bits >> 4) & 1) != 0)
101    }
102    #[doc = "Bit 5 - CC1 Interrupt Enable"]
103    #[inline(always)]
104    pub fn cc1(&self) -> CC1_R {
105        CC1_R::new(((self.bits >> 5) & 1) != 0)
106    }
107    #[doc = "Bit 6 - CC2 Interrupt Enable"]
108    #[inline(always)]
109    pub fn cc2(&self) -> CC2_R {
110        CC2_R::new(((self.bits >> 6) & 1) != 0)
111    }
112    #[doc = "Bit 7 - CC3 Interrupt Enable"]
113    #[inline(always)]
114    pub fn cc3(&self) -> CC3_R {
115        CC3_R::new(((self.bits >> 7) & 1) != 0)
116    }
117    #[doc = "Bit 8 - ICBOF0 Interrupt Enable"]
118    #[inline(always)]
119    pub fn icbof0(&self) -> ICBOF0_R {
120        ICBOF0_R::new(((self.bits >> 8) & 1) != 0)
121    }
122    #[doc = "Bit 9 - ICBOF1 Interrupt Enable"]
123    #[inline(always)]
124    pub fn icbof1(&self) -> ICBOF1_R {
125        ICBOF1_R::new(((self.bits >> 9) & 1) != 0)
126    }
127    #[doc = "Bit 10 - ICBOF2 Interrupt Enable"]
128    #[inline(always)]
129    pub fn icbof2(&self) -> ICBOF2_R {
130        ICBOF2_R::new(((self.bits >> 10) & 1) != 0)
131    }
132    #[doc = "Bit 11 - ICBOF3 Interrupt Enable"]
133    #[inline(always)]
134    pub fn icbof3(&self) -> ICBOF3_R {
135        ICBOF3_R::new(((self.bits >> 11) & 1) != 0)
136    }
137}
138impl W {
139    #[doc = "Bit 0 - OF Interrupt Enable"]
140    #[inline(always)]
141    pub fn of(&mut self) -> OF_W {
142        OF_W::new(self)
143    }
144    #[doc = "Bit 1 - UF Interrupt Enable"]
145    #[inline(always)]
146    pub fn uf(&mut self) -> UF_W {
147        UF_W::new(self)
148    }
149    #[doc = "Bit 2 - DIRCHG Interrupt Enable"]
150    #[inline(always)]
151    pub fn dirchg(&mut self) -> DIRCHG_W {
152        DIRCHG_W::new(self)
153    }
154    #[doc = "Bit 4 - CC0 Interrupt Enable"]
155    #[inline(always)]
156    pub fn cc0(&mut self) -> CC0_W {
157        CC0_W::new(self)
158    }
159    #[doc = "Bit 5 - CC1 Interrupt Enable"]
160    #[inline(always)]
161    pub fn cc1(&mut self) -> CC1_W {
162        CC1_W::new(self)
163    }
164    #[doc = "Bit 6 - CC2 Interrupt Enable"]
165    #[inline(always)]
166    pub fn cc2(&mut self) -> CC2_W {
167        CC2_W::new(self)
168    }
169    #[doc = "Bit 7 - CC3 Interrupt Enable"]
170    #[inline(always)]
171    pub fn cc3(&mut self) -> CC3_W {
172        CC3_W::new(self)
173    }
174    #[doc = "Bit 8 - ICBOF0 Interrupt Enable"]
175    #[inline(always)]
176    pub fn icbof0(&mut self) -> ICBOF0_W {
177        ICBOF0_W::new(self)
178    }
179    #[doc = "Bit 9 - ICBOF1 Interrupt Enable"]
180    #[inline(always)]
181    pub fn icbof1(&mut self) -> ICBOF1_W {
182        ICBOF1_W::new(self)
183    }
184    #[doc = "Bit 10 - ICBOF2 Interrupt Enable"]
185    #[inline(always)]
186    pub fn icbof2(&mut self) -> ICBOF2_W {
187        ICBOF2_W::new(self)
188    }
189    #[doc = "Bit 11 - ICBOF3 Interrupt Enable"]
190    #[inline(always)]
191    pub fn icbof3(&mut self) -> ICBOF3_W {
192        ICBOF3_W::new(self)
193    }
194    #[doc = "Writes raw bits to the register."]
195    #[inline(always)]
196    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
197        self.0.bits(bits);
198        self
199    }
200}
201#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
202pub struct IEN_SPEC;
203impl crate::RegisterSpec for IEN_SPEC {
204    type Ux = u32;
205}
206#[doc = "`read()` method returns [ien::R](R) reader structure"]
207impl crate::Readable for IEN_SPEC {
208    type Reader = R;
209}
210#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
211impl crate::Writable for IEN_SPEC {
212    type Writer = W;
213}
214#[doc = "`reset()` method sets IEN to value 0"]
215impl crate::Resettable for IEN_SPEC {
216    #[inline(always)]
217    fn reset_value() -> Self::Ux {
218        0
219    }
220}
efm32gg11b320_pac/wtimer0/ien.rs

efm32gg11b320_pac/wtimer0/
ien.rs
