efm32gg11b310_pac/vdac0/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CH0CD` writer - Clear CH0CD Interrupt Flag"]
23pub type CH0CD_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `CH1CD` writer - Clear CH1CD Interrupt Flag"]
25pub type CH1CD_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 1>;
26#[doc = "Field `CH0OF` writer - Clear CH0OF Interrupt Flag"]
27pub type CH0OF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 2>;
28#[doc = "Field `CH1OF` writer - Clear CH1OF Interrupt Flag"]
29pub type CH1OF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 3>;
30#[doc = "Field `CH0UF` writer - Clear CH0UF Interrupt Flag"]
31pub type CH0UF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 4>;
32#[doc = "Field `CH1UF` writer - Clear CH1UF Interrupt Flag"]
33pub type CH1UF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 5>;
34#[doc = "Field `EM23ERR` writer - Clear EM23ERR Interrupt Flag"]
35pub type EM23ERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 15>;
36#[doc = "Field `OPA0APORTCONFLICT` writer - Clear OPA0APORTCONFLICT Interrupt Flag"]
37pub type OPA0APORTCONFLICT_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 16>;
38#[doc = "Field `OPA1APORTCONFLICT` writer - Clear OPA1APORTCONFLICT Interrupt Flag"]
39pub type OPA1APORTCONFLICT_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 17>;
40#[doc = "Field `OPA2APORTCONFLICT` writer - Clear OPA2APORTCONFLICT Interrupt Flag"]
41pub type OPA2APORTCONFLICT_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 18>;
42#[doc = "Field `OPA3APORTCONFLICT` writer - Clear OPA3APORTCONFLICT Interrupt Flag"]
43pub type OPA3APORTCONFLICT_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 19>;
44#[doc = "Field `OPA0PRSTIMEDERR` writer - Clear OPA0PRSTIMEDERR Interrupt Flag"]
45pub type OPA0PRSTIMEDERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 20>;
46#[doc = "Field `OPA1PRSTIMEDERR` writer - Clear OPA1PRSTIMEDERR Interrupt Flag"]
47pub type OPA1PRSTIMEDERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 21>;
48#[doc = "Field `OPA2PRSTIMEDERR` writer - Clear OPA2PRSTIMEDERR Interrupt Flag"]
49pub type OPA2PRSTIMEDERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 22>;
50#[doc = "Field `OPA3PRSTIMEDERR` writer - Clear OPA3PRSTIMEDERR Interrupt Flag"]
51pub type OPA3PRSTIMEDERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 23>;
52#[doc = "Field `OPA0OUTVALID` writer - Clear OPA0OUTVALID Interrupt Flag"]
53pub type OPA0OUTVALID_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 28>;
54#[doc = "Field `OPA1OUTVALID` writer - Clear OPA1OUTVALID Interrupt Flag"]
55pub type OPA1OUTVALID_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 29>;
56#[doc = "Field `OPA2OUTVALID` writer - Clear OPA2OUTVALID Interrupt Flag"]
57pub type OPA2OUTVALID_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 30>;
58#[doc = "Field `OPA3OUTVALID` writer - Clear OPA3OUTVALID Interrupt Flag"]
59pub type OPA3OUTVALID_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 31>;
60impl W {
61    #[doc = "Bit 0 - Clear CH0CD Interrupt Flag"]
62    #[inline(always)]
63    pub fn ch0cd(&mut self) -> CH0CD_W {
64        CH0CD_W::new(self)
65    }
66    #[doc = "Bit 1 - Clear CH1CD Interrupt Flag"]
67    #[inline(always)]
68    pub fn ch1cd(&mut self) -> CH1CD_W {
69        CH1CD_W::new(self)
70    }
71    #[doc = "Bit 2 - Clear CH0OF Interrupt Flag"]
72    #[inline(always)]
73    pub fn ch0of(&mut self) -> CH0OF_W {
74        CH0OF_W::new(self)
75    }
76    #[doc = "Bit 3 - Clear CH1OF Interrupt Flag"]
77    #[inline(always)]
78    pub fn ch1of(&mut self) -> CH1OF_W {
79        CH1OF_W::new(self)
80    }
81    #[doc = "Bit 4 - Clear CH0UF Interrupt Flag"]
82    #[inline(always)]
83    pub fn ch0uf(&mut self) -> CH0UF_W {
84        CH0UF_W::new(self)
85    }
86    #[doc = "Bit 5 - Clear CH1UF Interrupt Flag"]
87    #[inline(always)]
88    pub fn ch1uf(&mut self) -> CH1UF_W {
89        CH1UF_W::new(self)
90    }
91    #[doc = "Bit 15 - Clear EM23ERR Interrupt Flag"]
92    #[inline(always)]
93    pub fn em23err(&mut self) -> EM23ERR_W {
94        EM23ERR_W::new(self)
95    }
96    #[doc = "Bit 16 - Clear OPA0APORTCONFLICT Interrupt Flag"]
97    #[inline(always)]
98    pub fn opa0aportconflict(&mut self) -> OPA0APORTCONFLICT_W {
99        OPA0APORTCONFLICT_W::new(self)
100    }
101    #[doc = "Bit 17 - Clear OPA1APORTCONFLICT Interrupt Flag"]
102    #[inline(always)]
103    pub fn opa1aportconflict(&mut self) -> OPA1APORTCONFLICT_W {
104        OPA1APORTCONFLICT_W::new(self)
105    }
106    #[doc = "Bit 18 - Clear OPA2APORTCONFLICT Interrupt Flag"]
107    #[inline(always)]
108    pub fn opa2aportconflict(&mut self) -> OPA2APORTCONFLICT_W {
109        OPA2APORTCONFLICT_W::new(self)
110    }
111    #[doc = "Bit 19 - Clear OPA3APORTCONFLICT Interrupt Flag"]
112    #[inline(always)]
113    pub fn opa3aportconflict(&mut self) -> OPA3APORTCONFLICT_W {
114        OPA3APORTCONFLICT_W::new(self)
115    }
116    #[doc = "Bit 20 - Clear OPA0PRSTIMEDERR Interrupt Flag"]
117    #[inline(always)]
118    pub fn opa0prstimederr(&mut self) -> OPA0PRSTIMEDERR_W {
119        OPA0PRSTIMEDERR_W::new(self)
120    }
121    #[doc = "Bit 21 - Clear OPA1PRSTIMEDERR Interrupt Flag"]
122    #[inline(always)]
123    pub fn opa1prstimederr(&mut self) -> OPA1PRSTIMEDERR_W {
124        OPA1PRSTIMEDERR_W::new(self)
125    }
126    #[doc = "Bit 22 - Clear OPA2PRSTIMEDERR Interrupt Flag"]
127    #[inline(always)]
128    pub fn opa2prstimederr(&mut self) -> OPA2PRSTIMEDERR_W {
129        OPA2PRSTIMEDERR_W::new(self)
130    }
131    #[doc = "Bit 23 - Clear OPA3PRSTIMEDERR Interrupt Flag"]
132    #[inline(always)]
133    pub fn opa3prstimederr(&mut self) -> OPA3PRSTIMEDERR_W {
134        OPA3PRSTIMEDERR_W::new(self)
135    }
136    #[doc = "Bit 28 - Clear OPA0OUTVALID Interrupt Flag"]
137    #[inline(always)]
138    pub fn opa0outvalid(&mut self) -> OPA0OUTVALID_W {
139        OPA0OUTVALID_W::new(self)
140    }
141    #[doc = "Bit 29 - Clear OPA1OUTVALID Interrupt Flag"]
142    #[inline(always)]
143    pub fn opa1outvalid(&mut self) -> OPA1OUTVALID_W {
144        OPA1OUTVALID_W::new(self)
145    }
146    #[doc = "Bit 30 - Clear OPA2OUTVALID Interrupt Flag"]
147    #[inline(always)]
148    pub fn opa2outvalid(&mut self) -> OPA2OUTVALID_W {
149        OPA2OUTVALID_W::new(self)
150    }
151    #[doc = "Bit 31 - Clear OPA3OUTVALID Interrupt Flag"]
152    #[inline(always)]
153    pub fn opa3outvalid(&mut self) -> OPA3OUTVALID_W {
154        OPA3OUTVALID_W::new(self)
155    }
156    #[doc = "Writes raw bits to the register."]
157    #[inline(always)]
158    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
159        self.0.bits(bits);
160        self
161    }
162}
163#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
164pub struct IFC_SPEC;
165impl crate::RegisterSpec for IFC_SPEC {
166    type Ux = u32;
167}
168#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
169impl crate::Writable for IFC_SPEC {
170    type Writer = W;
171}
172#[doc = "`reset()` method sets IFC to value 0"]
173impl crate::Resettable for IFC_SPEC {
174    #[inline(always)]
175    fn reset_value() -> Self::Ux {
176        0
177    }
178}
efm32gg11b310_pac/vdac0/ifc.rs

efm32gg11b310_pac/vdac0/
ifc.rs
