efm32gg11b310_pac/msc/
ien.rs1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<IEN_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<IEN_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<IEN_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<IEN_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `ERASE` reader - ERASE Interrupt Enable"]
38pub type ERASE_R = crate::BitReader<bool>;
39#[doc = "Field `ERASE` writer - ERASE Interrupt Enable"]
40pub type ERASE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `WRITE` reader - WRITE Interrupt Enable"]
42pub type WRITE_R = crate::BitReader<bool>;
43#[doc = "Field `WRITE` writer - WRITE Interrupt Enable"]
44pub type WRITE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `CHOF` reader - CHOF Interrupt Enable"]
46pub type CHOF_R = crate::BitReader<bool>;
47#[doc = "Field `CHOF` writer - CHOF Interrupt Enable"]
48pub type CHOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 2>;
49#[doc = "Field `CMOF` reader - CMOF Interrupt Enable"]
50pub type CMOF_R = crate::BitReader<bool>;
51#[doc = "Field `CMOF` writer - CMOF Interrupt Enable"]
52pub type CMOF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 3>;
53#[doc = "Field `PWRUPF` reader - PWRUPF Interrupt Enable"]
54pub type PWRUPF_R = crate::BitReader<bool>;
55#[doc = "Field `PWRUPF` writer - PWRUPF Interrupt Enable"]
56pub type PWRUPF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
57#[doc = "Field `ICACHERR` reader - ICACHERR Interrupt Enable"]
58pub type ICACHERR_R = crate::BitReader<bool>;
59#[doc = "Field `ICACHERR` writer - ICACHERR Interrupt Enable"]
60pub type ICACHERR_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
61#[doc = "Field `WDATAOV` reader - WDATAOV Interrupt Enable"]
62pub type WDATAOV_R = crate::BitReader<bool>;
63#[doc = "Field `WDATAOV` writer - WDATAOV Interrupt Enable"]
64pub type WDATAOV_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 6>;
65#[doc = "Field `LVEWRITE` reader - LVEWRITE Interrupt Enable"]
66pub type LVEWRITE_R = crate::BitReader<bool>;
67#[doc = "Field `LVEWRITE` writer - LVEWRITE Interrupt Enable"]
68pub type LVEWRITE_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 8>;
69#[doc = "Field `RAMERR1B` reader - RAMERR1B Interrupt Enable"]
70pub type RAMERR1B_R = crate::BitReader<bool>;
71#[doc = "Field `RAMERR1B` writer - RAMERR1B Interrupt Enable"]
72pub type RAMERR1B_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 16>;
73#[doc = "Field `RAMERR2B` reader - RAMERR2B Interrupt Enable"]
74pub type RAMERR2B_R = crate::BitReader<bool>;
75#[doc = "Field `RAMERR2B` writer - RAMERR2B Interrupt Enable"]
76pub type RAMERR2B_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 17>;
77#[doc = "Field `RAM1ERR1B` reader - RAM1ERR1B Interrupt Enable"]
78pub type RAM1ERR1B_R = crate::BitReader<bool>;
79#[doc = "Field `RAM1ERR1B` writer - RAM1ERR1B Interrupt Enable"]
80pub type RAM1ERR1B_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 18>;
81#[doc = "Field `RAM1ERR2B` reader - RAM1ERR2B Interrupt Enable"]
82pub type RAM1ERR2B_R = crate::BitReader<bool>;
83#[doc = "Field `RAM1ERR2B` writer - RAM1ERR2B Interrupt Enable"]
84pub type RAM1ERR2B_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 19>;
85impl R {
86 #[doc = "Bit 0 - ERASE Interrupt Enable"]
87 #[inline(always)]
88 pub fn erase(&self) -> ERASE_R {
89 ERASE_R::new((self.bits & 1) != 0)
90 }
91 #[doc = "Bit 1 - WRITE Interrupt Enable"]
92 #[inline(always)]
93 pub fn write(&self) -> WRITE_R {
94 WRITE_R::new(((self.bits >> 1) & 1) != 0)
95 }
96 #[doc = "Bit 2 - CHOF Interrupt Enable"]
97 #[inline(always)]
98 pub fn chof(&self) -> CHOF_R {
99 CHOF_R::new(((self.bits >> 2) & 1) != 0)
100 }
101 #[doc = "Bit 3 - CMOF Interrupt Enable"]
102 #[inline(always)]
103 pub fn cmof(&self) -> CMOF_R {
104 CMOF_R::new(((self.bits >> 3) & 1) != 0)
105 }
106 #[doc = "Bit 4 - PWRUPF Interrupt Enable"]
107 #[inline(always)]
108 pub fn pwrupf(&self) -> PWRUPF_R {
109 PWRUPF_R::new(((self.bits >> 4) & 1) != 0)
110 }
111 #[doc = "Bit 5 - ICACHERR Interrupt Enable"]
112 #[inline(always)]
113 pub fn icacherr(&self) -> ICACHERR_R {
114 ICACHERR_R::new(((self.bits >> 5) & 1) != 0)
115 }
116 #[doc = "Bit 6 - WDATAOV Interrupt Enable"]
117 #[inline(always)]
118 pub fn wdataov(&self) -> WDATAOV_R {
119 WDATAOV_R::new(((self.bits >> 6) & 1) != 0)
120 }
121 #[doc = "Bit 8 - LVEWRITE Interrupt Enable"]
122 #[inline(always)]
123 pub fn lvewrite(&self) -> LVEWRITE_R {
124 LVEWRITE_R::new(((self.bits >> 8) & 1) != 0)
125 }
126 #[doc = "Bit 16 - RAMERR1B Interrupt Enable"]
127 #[inline(always)]
128 pub fn ramerr1b(&self) -> RAMERR1B_R {
129 RAMERR1B_R::new(((self.bits >> 16) & 1) != 0)
130 }
131 #[doc = "Bit 17 - RAMERR2B Interrupt Enable"]
132 #[inline(always)]
133 pub fn ramerr2b(&self) -> RAMERR2B_R {
134 RAMERR2B_R::new(((self.bits >> 17) & 1) != 0)
135 }
136 #[doc = "Bit 18 - RAM1ERR1B Interrupt Enable"]
137 #[inline(always)]
138 pub fn ram1err1b(&self) -> RAM1ERR1B_R {
139 RAM1ERR1B_R::new(((self.bits >> 18) & 1) != 0)
140 }
141 #[doc = "Bit 19 - RAM1ERR2B Interrupt Enable"]
142 #[inline(always)]
143 pub fn ram1err2b(&self) -> RAM1ERR2B_R {
144 RAM1ERR2B_R::new(((self.bits >> 19) & 1) != 0)
145 }
146}
147impl W {
148 #[doc = "Bit 0 - ERASE Interrupt Enable"]
149 #[inline(always)]
150 pub fn erase(&mut self) -> ERASE_W {
151 ERASE_W::new(self)
152 }
153 #[doc = "Bit 1 - WRITE Interrupt Enable"]
154 #[inline(always)]
155 pub fn write(&mut self) -> WRITE_W {
156 WRITE_W::new(self)
157 }
158 #[doc = "Bit 2 - CHOF Interrupt Enable"]
159 #[inline(always)]
160 pub fn chof(&mut self) -> CHOF_W {
161 CHOF_W::new(self)
162 }
163 #[doc = "Bit 3 - CMOF Interrupt Enable"]
164 #[inline(always)]
165 pub fn cmof(&mut self) -> CMOF_W {
166 CMOF_W::new(self)
167 }
168 #[doc = "Bit 4 - PWRUPF Interrupt Enable"]
169 #[inline(always)]
170 pub fn pwrupf(&mut self) -> PWRUPF_W {
171 PWRUPF_W::new(self)
172 }
173 #[doc = "Bit 5 - ICACHERR Interrupt Enable"]
174 #[inline(always)]
175 pub fn icacherr(&mut self) -> ICACHERR_W {
176 ICACHERR_W::new(self)
177 }
178 #[doc = "Bit 6 - WDATAOV Interrupt Enable"]
179 #[inline(always)]
180 pub fn wdataov(&mut self) -> WDATAOV_W {
181 WDATAOV_W::new(self)
182 }
183 #[doc = "Bit 8 - LVEWRITE Interrupt Enable"]
184 #[inline(always)]
185 pub fn lvewrite(&mut self) -> LVEWRITE_W {
186 LVEWRITE_W::new(self)
187 }
188 #[doc = "Bit 16 - RAMERR1B Interrupt Enable"]
189 #[inline(always)]
190 pub fn ramerr1b(&mut self) -> RAMERR1B_W {
191 RAMERR1B_W::new(self)
192 }
193 #[doc = "Bit 17 - RAMERR2B Interrupt Enable"]
194 #[inline(always)]
195 pub fn ramerr2b(&mut self) -> RAMERR2B_W {
196 RAMERR2B_W::new(self)
197 }
198 #[doc = "Bit 18 - RAM1ERR1B Interrupt Enable"]
199 #[inline(always)]
200 pub fn ram1err1b(&mut self) -> RAM1ERR1B_W {
201 RAM1ERR1B_W::new(self)
202 }
203 #[doc = "Bit 19 - RAM1ERR2B Interrupt Enable"]
204 #[inline(always)]
205 pub fn ram1err2b(&mut self) -> RAM1ERR2B_W {
206 RAM1ERR2B_W::new(self)
207 }
208 #[doc = "Writes raw bits to the register."]
209 #[inline(always)]
210 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
211 self.0.bits(bits);
212 self
213 }
214}
215#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
216pub struct IEN_SPEC;
217impl crate::RegisterSpec for IEN_SPEC {
218 type Ux = u32;
219}
220#[doc = "`read()` method returns [ien::R](R) reader structure"]
221impl crate::Readable for IEN_SPEC {
222 type Reader = R;
223}
224#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
225impl crate::Writable for IEN_SPEC {
226 type Writer = W;
227}
228#[doc = "`reset()` method sets IEN to value 0"]
229impl crate::Resettable for IEN_SPEC {
230 #[inline(always)]
231 fn reset_value() -> Self::Ux {
232 0
233 }
234}