efm32gg11b110_pac/vdac0/
cmd.rs

1#[doc = "Register `CMD` writer"]
2pub struct W(crate::W<CMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CH0EN` writer - DAC Channel 0 Enable"]
23pub type CH0EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 0>;
24#[doc = "Field `CH0DIS` writer - DAC Channel 0 Disable"]
25pub type CH0DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 1>;
26#[doc = "Field `CH1EN` writer - DAC Channel 1 Enable"]
27pub type CH1EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 2>;
28#[doc = "Field `CH1DIS` writer - DAC Channel 1 Disable"]
29pub type CH1DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 3>;
30#[doc = "Field `OPA0EN` writer - OPA0 Enable"]
31pub type OPA0EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 16>;
32#[doc = "Field `OPA0DIS` writer - OPA0 Disable"]
33pub type OPA0DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 17>;
34#[doc = "Field `OPA1EN` writer - OPA1 Enable"]
35pub type OPA1EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 18>;
36#[doc = "Field `OPA1DIS` writer - OPA1 Disable"]
37pub type OPA1DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 19>;
38#[doc = "Field `OPA2EN` writer - OPA2 Enable"]
39pub type OPA2EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 20>;
40#[doc = "Field `OPA2DIS` writer - OPA2 Disable"]
41pub type OPA2DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 21>;
42#[doc = "Field `OPA3EN` writer - OPA3 Enable"]
43pub type OPA3EN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 22>;
44#[doc = "Field `OPA3DIS` writer - OPA3 Disable"]
45pub type OPA3DIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 23>;
46impl W {
47    #[doc = "Bit 0 - DAC Channel 0 Enable"]
48    #[inline(always)]
49    pub fn ch0en(&mut self) -> CH0EN_W {
50        CH0EN_W::new(self)
51    }
52    #[doc = "Bit 1 - DAC Channel 0 Disable"]
53    #[inline(always)]
54    pub fn ch0dis(&mut self) -> CH0DIS_W {
55        CH0DIS_W::new(self)
56    }
57    #[doc = "Bit 2 - DAC Channel 1 Enable"]
58    #[inline(always)]
59    pub fn ch1en(&mut self) -> CH1EN_W {
60        CH1EN_W::new(self)
61    }
62    #[doc = "Bit 3 - DAC Channel 1 Disable"]
63    #[inline(always)]
64    pub fn ch1dis(&mut self) -> CH1DIS_W {
65        CH1DIS_W::new(self)
66    }
67    #[doc = "Bit 16 - OPA0 Enable"]
68    #[inline(always)]
69    pub fn opa0en(&mut self) -> OPA0EN_W {
70        OPA0EN_W::new(self)
71    }
72    #[doc = "Bit 17 - OPA0 Disable"]
73    #[inline(always)]
74    pub fn opa0dis(&mut self) -> OPA0DIS_W {
75        OPA0DIS_W::new(self)
76    }
77    #[doc = "Bit 18 - OPA1 Enable"]
78    #[inline(always)]
79    pub fn opa1en(&mut self) -> OPA1EN_W {
80        OPA1EN_W::new(self)
81    }
82    #[doc = "Bit 19 - OPA1 Disable"]
83    #[inline(always)]
84    pub fn opa1dis(&mut self) -> OPA1DIS_W {
85        OPA1DIS_W::new(self)
86    }
87    #[doc = "Bit 20 - OPA2 Enable"]
88    #[inline(always)]
89    pub fn opa2en(&mut self) -> OPA2EN_W {
90        OPA2EN_W::new(self)
91    }
92    #[doc = "Bit 21 - OPA2 Disable"]
93    #[inline(always)]
94    pub fn opa2dis(&mut self) -> OPA2DIS_W {
95        OPA2DIS_W::new(self)
96    }
97    #[doc = "Bit 22 - OPA3 Enable"]
98    #[inline(always)]
99    pub fn opa3en(&mut self) -> OPA3EN_W {
100        OPA3EN_W::new(self)
101    }
102    #[doc = "Bit 23 - OPA3 Disable"]
103    #[inline(always)]
104    pub fn opa3dis(&mut self) -> OPA3DIS_W {
105        OPA3DIS_W::new(self)
106    }
107    #[doc = "Writes raw bits to the register."]
108    #[inline(always)]
109    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
110        self.0.bits(bits);
111        self
112    }
113}
114#[doc = "Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"]
115pub struct CMD_SPEC;
116impl crate::RegisterSpec for CMD_SPEC {
117    type Ux = u32;
118}
119#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"]
120impl crate::Writable for CMD_SPEC {
121    type Writer = W;
122}
123#[doc = "`reset()` method sets CMD to value 0"]
124impl crate::Resettable for CMD_SPEC {
125    #[inline(always)]
126    fn reset_value() -> Self::Ux {
127        0
128    }
129}
efm32gg11b110_pac/vdac0/cmd.rs

efm32gg11b110_pac/vdac0/
cmd.rs
