efm32gg11b110_pac/usart2/
ctrlx.rs1#[doc = "Register `CTRLX` reader"]
2pub struct R(crate::R<CTRLX_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRLX_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRLX_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRLX_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRLX` writer"]
17pub struct W(crate::W<CTRLX_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRLX_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRLX_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRLX_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `DBGHALT` reader - Debug Halt"]
38pub type DBGHALT_R = crate::BitReader<bool>;
39#[doc = "Field `DBGHALT` writer - Debug Halt"]
40pub type DBGHALT_W<'a> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, 0>;
41#[doc = "Field `CTSINV` reader - CTS Pin Inversion"]
42pub type CTSINV_R = crate::BitReader<bool>;
43#[doc = "Field `CTSINV` writer - CTS Pin Inversion"]
44pub type CTSINV_W<'a> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, 1>;
45#[doc = "Field `CTSEN` reader - CTS Function Enabled"]
46pub type CTSEN_R = crate::BitReader<bool>;
47#[doc = "Field `CTSEN` writer - CTS Function Enabled"]
48pub type CTSEN_W<'a> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, 2>;
49#[doc = "Field `RTSINV` reader - RTS Pin Inversion"]
50pub type RTSINV_R = crate::BitReader<bool>;
51#[doc = "Field `RTSINV` writer - RTS Pin Inversion"]
52pub type RTSINV_W<'a> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, 3>;
53impl R {
54 #[doc = "Bit 0 - Debug Halt"]
55 #[inline(always)]
56 pub fn dbghalt(&self) -> DBGHALT_R {
57 DBGHALT_R::new((self.bits & 1) != 0)
58 }
59 #[doc = "Bit 1 - CTS Pin Inversion"]
60 #[inline(always)]
61 pub fn ctsinv(&self) -> CTSINV_R {
62 CTSINV_R::new(((self.bits >> 1) & 1) != 0)
63 }
64 #[doc = "Bit 2 - CTS Function Enabled"]
65 #[inline(always)]
66 pub fn ctsen(&self) -> CTSEN_R {
67 CTSEN_R::new(((self.bits >> 2) & 1) != 0)
68 }
69 #[doc = "Bit 3 - RTS Pin Inversion"]
70 #[inline(always)]
71 pub fn rtsinv(&self) -> RTSINV_R {
72 RTSINV_R::new(((self.bits >> 3) & 1) != 0)
73 }
74}
75impl W {
76 #[doc = "Bit 0 - Debug Halt"]
77 #[inline(always)]
78 pub fn dbghalt(&mut self) -> DBGHALT_W {
79 DBGHALT_W::new(self)
80 }
81 #[doc = "Bit 1 - CTS Pin Inversion"]
82 #[inline(always)]
83 pub fn ctsinv(&mut self) -> CTSINV_W {
84 CTSINV_W::new(self)
85 }
86 #[doc = "Bit 2 - CTS Function Enabled"]
87 #[inline(always)]
88 pub fn ctsen(&mut self) -> CTSEN_W {
89 CTSEN_W::new(self)
90 }
91 #[doc = "Bit 3 - RTS Pin Inversion"]
92 #[inline(always)]
93 pub fn rtsinv(&mut self) -> RTSINV_W {
94 RTSINV_W::new(self)
95 }
96 #[doc = "Writes raw bits to the register."]
97 #[inline(always)]
98 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
99 self.0.bits(bits);
100 self
101 }
102}
103#[doc = "Control Register Extended\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlx](index.html) module"]
104pub struct CTRLX_SPEC;
105impl crate::RegisterSpec for CTRLX_SPEC {
106 type Ux = u32;
107}
108#[doc = "`read()` method returns [ctrlx::R](R) reader structure"]
109impl crate::Readable for CTRLX_SPEC {
110 type Reader = R;
111}
112#[doc = "`write(|w| ..)` method takes [ctrlx::W](W) writer structure"]
113impl crate::Writable for CTRLX_SPEC {
114 type Writer = W;
115}
116#[doc = "`reset()` method sets CTRLX to value 0"]
117impl crate::Resettable for CTRLX_SPEC {
118 #[inline(always)]
119 fn reset_value() -> Self::Ux {
120 0
121 }
122}